diff options
-rw-r--r-- | fw/fe310/eos/dev/bq25895.c | 46 | ||||
-rw-r--r-- | fw/fe310/eos/dev/bq25895.h | 5 | ||||
-rw-r--r-- | fw/fe310/eos/dev/drv/apds9151.c (renamed from fw/fe310/eos/dev/apds9151.c) | 4 | ||||
-rw-r--r-- | fw/fe310/eos/dev/drv/apds9151.h (renamed from fw/fe310/eos/dev/apds9151.h) | 4 | ||||
-rw-r--r-- | fw/fe310/eos/dev/drv/bq25895.c | 21 | ||||
-rw-r--r-- | fw/fe310/eos/dev/drv/bq25895.h | 8 | ||||
-rw-r--r-- | fw/fe310/eos/dev/drv/drv2605.h (renamed from fw/fe310/eos/dev/drv2605.h) | 0 | ||||
-rw-r--r-- | fw/fe310/eos/dev/drv/flash.c (renamed from fw/fe310/eos/dev/flash.c) | 0 | ||||
-rw-r--r-- | fw/fe310/eos/dev/drv/flash.h (renamed from fw/fe310/eos/dev/flash.h) | 0 | ||||
-rw-r--r-- | fw/fe310/eos/dev/drv/fxl6408.c (renamed from fw/fe310/eos/dev/fxl6408.c) | 23 | ||||
-rw-r--r-- | fw/fe310/eos/dev/drv/fxl6408.h (renamed from fw/fe310/eos/dev/fxl6408.h) | 8 | ||||
-rw-r--r-- | fw/fe310/eos/dev/drv/gt911.c (renamed from fw/fe310/eos/dev/gt911.c) | 183 | ||||
-rw-r--r-- | fw/fe310/eos/dev/drv/gt911.h (renamed from fw/fe310/eos/dev/gt911.h) | 20 | ||||
-rw-r--r-- | fw/fe310/eos/dev/drv/ili9806e.c (renamed from fw/fe310/eos/dev/ili9806e.c) | 21 | ||||
-rw-r--r-- | fw/fe310/eos/dev/drv/ili9806e.h | 3 | ||||
-rw-r--r-- | fw/fe310/eos/dev/drv/lsm9ds1.h (renamed from fw/fe310/eos/dev/lsm9ds1.h) | 0 | ||||
-rw-r--r-- | fw/fe310/eos/dev/drv/ov2640.c (renamed from fw/fe310/eos/dev/ov2640.c) | 112 | ||||
-rw-r--r-- | fw/fe310/eos/dev/drv/ov2640.h | 74 | ||||
-rw-r--r-- | fw/fe310/eos/dev/drv/ov2640_regs.h (renamed from fw/fe310/eos/dev/ov2640_regs.h) | 0 | ||||
-rw-r--r-- | fw/fe310/eos/dev/drv/tps61052.c (renamed from fw/fe310/eos/dev/tps61052.c) | 50 | ||||
-rw-r--r-- | fw/fe310/eos/dev/drv/tps61052.h | 34 | ||||
-rw-r--r-- | fw/fe310/eos/dev/ili9806e.h | 3 | ||||
-rw-r--r-- | fw/fe310/eos/dev/ov2640.h | 8 | ||||
-rw-r--r-- | fw/fe310/eos/dev/tps61052.h | 34 |
24 files changed, 330 insertions, 331 deletions
diff --git a/fw/fe310/eos/dev/bq25895.c b/fw/fe310/eos/dev/bq25895.c deleted file mode 100644 index 85635bb..0000000 --- a/fw/fe310/eos/dev/bq25895.c +++ /dev/null @@ -1,46 +0,0 @@ -#include <stdlib.h> -#include <stdint.h> -#include <stdio.h> - -#include "eos.h" -#include "soc/pwr.h" -#include "soc/i2c.h" - -#include "bq25895.h" - -static int reg_read(uint8_t reg, uint8_t *data) { - return eos_i2c_read8(BQ25895_ADDR, reg, data, 1); -} - -static int reg_write(uint8_t reg, uint8_t data) { - return eos_i2c_write8(BQ25895_ADDR, reg, &data, 1); -} - -int eos_bq25895_init(uint8_t wakeup_cause) { - int rst = (wakeup_cause == EOS_PWR_WAKE_RST); - int i, rv = EOS_OK; - uint8_t data = 0; - - if (rst) { - rv = reg_write(0x14, 0x80); // reset - if (rv) printf("I2C ERROR 0x14\n"); - rv = reg_write(0x14, 0x00); - if (rv) printf("I2C ERROR 0x14\n"); - rv = reg_write(0x07, 0x8d); // disable watchdog - if (rv) printf("I2C ERROR 0x07\n"); - rv = reg_write(0x00, 0x2a); // disable ILIM pin, 2.1A input current - if (rv) printf("I2C ERROR 0x00\n"); - rv = reg_write(0x02, 0x31); // enable ICO, disaable MaxCharge and HVDCP - if (rv) printf("I2C ERROR 0x02\n"); - // rv = reg_write(0x03, 0x1a); // disable OTG - // if (rv) printf("I2C ERROR 0x02\n"); - } - - printf("BQ25895:\n"); - for (i=0; i<0x15; i++) { - rv = reg_read(i, &data); - if (!rv) printf("REG%02x: %02x\n", i, data); - } - - return EOS_OK; -} diff --git a/fw/fe310/eos/dev/bq25895.h b/fw/fe310/eos/dev/bq25895.h deleted file mode 100644 index cbef36e..0000000 --- a/fw/fe310/eos/dev/bq25895.h +++ /dev/null @@ -1,5 +0,0 @@ -#include <stdint.h> - -#define BQ25895_ADDR 0x6A - -int eos_bq25895_init(uint8_t wakeup_cause); diff --git a/fw/fe310/eos/dev/apds9151.c b/fw/fe310/eos/dev/drv/apds9151.c index 9e0237e..a96b70b 100644 --- a/fw/fe310/eos/dev/apds9151.c +++ b/fw/fe310/eos/dev/drv/apds9151.c @@ -74,7 +74,7 @@ static int reg_write32(uint8_t reg, uint32_t data) { return EOS_OK; } -int eos_apds9151_reg_read(uint8_t reg, void *data) { +int apds9151_reg_read(uint8_t reg, void *data) { int rv = EOS_OK; switch (reg & (~APDS9151_REG_MASK)) { @@ -96,7 +96,7 @@ int eos_apds9151_reg_read(uint8_t reg, void *data) { return rv; } -int eos_apds9151_reg_write(uint8_t reg, uint32_t data) { +int apds9151_reg_write(uint8_t reg, uint32_t data) { int rv = EOS_OK; switch (reg & (~APDS9151_REG_MASK)) { diff --git a/fw/fe310/eos/dev/apds9151.h b/fw/fe310/eos/dev/drv/apds9151.h index 2827dfe..af0be4c 100644 --- a/fw/fe310/eos/dev/apds9151.h +++ b/fw/fe310/eos/dev/drv/apds9151.h @@ -28,5 +28,5 @@ #define APDS9151_REG_MASK 0x3F -int eos_apds9151_reg_read(uint8_t reg, void *data); -int eos_apds9151_reg_write(uint8_t reg, uint32_t data);
\ No newline at end of file +int apds9151_reg_read(uint8_t reg, void *data); +int apds9151_reg_write(uint8_t reg, uint32_t data);
\ No newline at end of file diff --git a/fw/fe310/eos/dev/drv/bq25895.c b/fw/fe310/eos/dev/drv/bq25895.c new file mode 100644 index 0000000..6007598 --- /dev/null +++ b/fw/fe310/eos/dev/drv/bq25895.c @@ -0,0 +1,21 @@ +#include <stdlib.h> + +#include "eos.h" +#include "soc/i2c.h" + +#include "bq25895.h" + +int bq25895_reg_read(uint8_t reg, uint8_t *data) { + return eos_i2c_read8(BQ25895_ADDR, reg, data, 1); +} + +int bq25895_reg_write(uint8_t reg, uint8_t data) { + return eos_i2c_write8(BQ25895_ADDR, reg, &data, 1); +} + +int bq25895_read_fault(uint8_t *fault) { + int rv; + + rv = bq25895_reg_read(0x0c, fault); + return rv; +} diff --git a/fw/fe310/eos/dev/drv/bq25895.h b/fw/fe310/eos/dev/drv/bq25895.h new file mode 100644 index 0000000..3fa8cfc --- /dev/null +++ b/fw/fe310/eos/dev/drv/bq25895.h @@ -0,0 +1,8 @@ +#include <stdint.h> + +#define BQ25895_ADDR 0x6A + +int bq25895_init(uint8_t wakeup_cause); +int bq25895_reg_read(uint8_t reg, uint8_t *data); +int bq25895_reg_write(uint8_t reg, uint8_t data); +int bq25895_read_fault(uint8_t *fault);
\ No newline at end of file diff --git a/fw/fe310/eos/dev/drv2605.h b/fw/fe310/eos/dev/drv/drv2605.h index fe90a9b..fe90a9b 100644 --- a/fw/fe310/eos/dev/drv2605.h +++ b/fw/fe310/eos/dev/drv/drv2605.h diff --git a/fw/fe310/eos/dev/flash.c b/fw/fe310/eos/dev/drv/flash.c index 4f017b3..4f017b3 100644 --- a/fw/fe310/eos/dev/flash.c +++ b/fw/fe310/eos/dev/drv/flash.c diff --git a/fw/fe310/eos/dev/flash.h b/fw/fe310/eos/dev/drv/flash.h index 6f792cb..6f792cb 100644 --- a/fw/fe310/eos/dev/flash.h +++ b/fw/fe310/eos/dev/drv/flash.h diff --git a/fw/fe310/eos/dev/fxl6408.c b/fw/fe310/eos/dev/drv/fxl6408.c index 812c584..2647598 100644 --- a/fw/fe310/eos/dev/fxl6408.c +++ b/fw/fe310/eos/dev/drv/fxl6408.c @@ -6,10 +6,10 @@ #include "fxl6408.h" -#define FXL6408_ADDR0 0x43 -#define FXL6408_ADDR1 0x44 +#define FXL6408_ADDR0 0x44 +#define FXL6408_ADDR1 0x43 -int eos_fxl6408_reg_read(uint8_t chip_id, uint8_t reg, uint8_t *data) { +int fxl6408_reg_read(uint8_t chip_id, uint8_t reg, uint8_t *data) { uint8_t addr = chip_id ? FXL6408_ADDR1 : FXL6408_ADDR0; int rv; @@ -17,7 +17,7 @@ int eos_fxl6408_reg_read(uint8_t chip_id, uint8_t reg, uint8_t *data) { return rv; } -int eos_fxl6408_reg_write(uint8_t chip_id, uint8_t reg, uint8_t data) { +int fxl6408_reg_write(uint8_t chip_id, uint8_t reg, uint8_t data) { uint8_t addr = chip_id ? FXL6408_ADDR1 : FXL6408_ADDR0; int rv; @@ -25,31 +25,30 @@ int eos_fxl6408_reg_write(uint8_t chip_id, uint8_t reg, uint8_t data) { return rv; } -int eos_fxl6408_pin_get(uint8_t chip_id, uint8_t reg, uint8_t pin, uint8_t *val) { +int fxl6408_get_pin(uint8_t chip_id, uint8_t reg, uint8_t pin, uint8_t *val) { uint8_t addr = chip_id ? FXL6408_ADDR1 : FXL6408_ADDR0; - uint8_t data; int rv; if (reg == FXL6408_REG_ID_CTRL) return EOS_ERR; - rv = eos_i2c_read8(addr, reg, &data, 1); - return rv; + rv = eos_i2c_read8(addr, reg, val, 1); + if (rv) return rv; - *val = data >> pin; + *val = *val >> pin; *val &= 0x01; return EOS_OK; } -int eos_fxl6408_pin_set(uint8_t chip_id, uint8_t reg, uint8_t pin, uint8_t val) { +int fxl6408_set_pin(uint8_t chip_id, uint8_t reg, uint8_t pin, uint8_t val) { uint8_t addr = chip_id ? FXL6408_ADDR1 : FXL6408_ADDR0; uint8_t data; int rv; - if (reg == FXL6408_REG_ID_CTRL || FXL6408_REG_I_STATE) return EOS_ERR; + if ((reg == FXL6408_REG_ID_CTRL) || (reg == FXL6408_REG_I_STATE)) return EOS_ERR; rv = eos_i2c_read8(addr, reg, &data, 1); - return rv; + if (rv) return rv; val &= 0x01; data &= ~(1 << pin); diff --git a/fw/fe310/eos/dev/fxl6408.h b/fw/fe310/eos/dev/drv/fxl6408.h index f0e9c3a..c8e1507 100644 --- a/fw/fe310/eos/dev/fxl6408.h +++ b/fw/fe310/eos/dev/drv/fxl6408.h @@ -11,7 +11,7 @@ #define FXL6408_REG_INT_MASK 0x11 #define FXL6408_REG_INT_STATE 0x13 -int eos_fxl6408_reg_read(uint8_t chip_id, uint8_t reg, uint8_t *data); -int eos_fxl6408_reg_write(uint8_t chip_id, uint8_t reg, uint8_t data); -int eos_fxl6408_pin_get(uint8_t chip_id, uint8_t reg, uint8_t pin, uint8_t *val); -int eos_fxl6408_pin_set(uint8_t chip_id, uint8_t reg, uint8_t pin, uint8_t val);
\ No newline at end of file +int fxl6408_reg_read(uint8_t chip_id, uint8_t reg, uint8_t *data); +int fxl6408_reg_write(uint8_t chip_id, uint8_t reg, uint8_t data); +int fxl6408_get_pin(uint8_t chip_id, uint8_t reg, uint8_t pin, uint8_t *val); +int fxl6408_set_pin(uint8_t chip_id, uint8_t reg, uint8_t pin, uint8_t val);
\ No newline at end of file diff --git a/fw/fe310/eos/dev/gt911.c b/fw/fe310/eos/dev/drv/gt911.c index 7487f85..22b82c6 100644 --- a/fw/fe310/eos/dev/gt911.c +++ b/fw/fe310/eos/dev/drv/gt911.c @@ -3,23 +3,14 @@ #include <string.h> #include <stdio.h> -#include "platform.h" #include "encoding.h" +#include "platform.h" #include "board.h" #include "eos.h" -#include "event.h" -#include "soc/interrupt.h" -#include "soc/timer.h" -#include "soc/pwr.h" #include "soc/i2c.h" -#include "soc/i2s.h" - -#include "dev/eve.h" - -#include "eve/eve.h" -#include "eve/eve_touch_engine.h" +#include "soc/timer.h" #include "gt911.h" @@ -42,78 +33,7 @@ #define REG_PROD_ID 0x8140 #define REG_FW_VER 0x8144 -#define SIZE_POINT_BUF 8 -#define MAX_POINTS 5 - -static int clear_tag0 = 0; - -static void handle_evt(unsigned char type, unsigned char *buffer, uint16_t len) { - uint8_t status; - uint8_t points[SIZE_POINT_BUF * MAX_POINTS]; - int i, num_points; - int rv; - - if (!eos_gt911_intr_enabled()) return; - - rv = eos_i2c_read16(GT911_ADDR, REG_STATUS, &status, 1); - if (rv) goto handle_evt_fin1; - - if (!(status & 0x80)) goto handle_evt_fin1; - - num_points = status & 0xf; - if (num_points > 5) goto handle_evt_fin1; - - rv = eos_spi_select(EOS_SPI_DEV_EVE); - if (rv) goto handle_evt_fin0; - while (!eve_touch_ehost_ready()); - - if (num_points) { - if (clear_tag0) { - eve_touch_clear_tag0(); - clear_tag0 = 0; - } - rv = eos_i2c_read16(GT911_ADDR, REG_POINTS, points, SIZE_POINT_BUF * num_points); - if (rv) goto handle_evt_fin0; - - for (i=0; i<num_points; i++) { - uint8_t *point_buf; - uint8_t point_id; - uint16_t point_x; - uint16_t point_y; - - point_buf = points + SIZE_POINT_BUF * i; - point_id = point_buf[0]; - point_x = point_buf[1] | (point_buf[2] << 8); - point_y = point_buf[3] | (point_buf[4] << 8); - eve_touch_ehost_enter(point_id, point_x, point_y); - } - } else { - eve_touch_ehost_enter(0, 0x8000, 0x8000); - clear_tag0 = 1; - } - - eve_touch_ehost_end(); - eos_spi_deselect(); - - if (!eos_eve_intr_enabled()) { - eos_eve_poll(); - } - -handle_evt_fin0: - status = 0; - rv = eos_i2c_write16(GT911_ADDR, REG_STATUS, &status, 1); - -handle_evt_fin1: - GPIO_REG(GPIO_FALL_IE) |= (1 << CTP_PIN_INT); -} - -static void handle_intr(void) { - GPIO_REG(GPIO_FALL_IE) &= ~(1 << CTP_PIN_INT); - GPIO_REG(GPIO_RISE_IP) = (1 << CTP_PIN_INT); - eos_evtq_push_isr(EOS_EVT_CTP | CTP_ETYPE_INTR, NULL, 0); -} - -int g911_command(uint8_t command) { +static int g911_command(uint8_t command) { int rv; if (command > 0x07) { @@ -155,51 +75,13 @@ static int gt911_fw_ver(char *buf) { return rv; } -int eos_gt911_init(uint8_t wakeup_cause) { - int rst = (wakeup_cause == EOS_PWR_WAKE_RST); - - eos_intr_set_handler(INT_GPIO_BASE + CTP_PIN_INT, handle_intr); - eos_intr_set_priority(INT_GPIO_BASE + CTP_PIN_INT, IRQ_PRIORITY_CTP); - eos_evtq_set_handler(EOS_EVT_CTP, handle_evt); - - if (rst) { - eos_gt911_reset(); - } else { - /* There is a problem with GT911 and sleep */ - // eos_gt911_wake(); - eos_gt911_reset(); - } - - return EOS_OK; -} - -void eos_gt911_intr_enable(void) { - GPIO_REG(GPIO_INPUT_EN) |= (1 << CTP_PIN_INT); - GPIO_REG(GPIO_FALL_IE) |= (1 << CTP_PIN_INT); - eos_intr_enable(INT_GPIO_BASE + CTP_PIN_INT); -} - -void eos_gt911_intr_disable(void) { - eos_intr_disable(INT_GPIO_BASE + CTP_PIN_INT); - GPIO_REG(GPIO_FALL_IE) &= ~(1 << CTP_PIN_INT); - GPIO_REG(GPIO_INPUT_EN) &= ~(1 << CTP_PIN_INT); -} - -int eos_gt911_intr_enabled(void) { - return !!(GPIO_REG(GPIO_INPUT_EN) & (1 << CTP_PIN_INT)); -} - -int eos_gt911_reset(void) { - if (eos_i2s_running()) return EOS_ERR_BUSY; - - eos_gt911_intr_disable(); - +void eos_gt911_reset(void) { /* INT and RST output and low */ GPIO_REG(GPIO_OUTPUT_VAL) &= ~((1 << CTP_PIN_INT) | (1 << CTP_PIN_RST)); GPIO_REG(GPIO_OUTPUT_EN) |= ((1 << CTP_PIN_INT) | (1 << CTP_PIN_RST)); /* T2: > 10ms */ - eos_time_sleep(12); + eos_sleep(12); /* high: 0x28/0x29 (0x14 7bit), low: 0xBA/0xBB (0x5D 7bit) */ if (GT911_ADDR == 0x14) { @@ -207,49 +89,41 @@ int eos_gt911_reset(void) { } /* T3: > 100us */ - eos_time_sleep(1); + eos_sleep(1); GPIO_REG(GPIO_OUTPUT_EN) &= ~(1 << CTP_PIN_RST); /* T4: > 5ms */ - eos_time_sleep(6); + eos_sleep(6); GPIO_REG(GPIO_OUTPUT_VAL) &= ~(1 << CTP_PIN_INT); /* end select I2C slave addr */ /* T5: > 50ms */ - eos_time_sleep(51); + eos_sleep(51); /* set INT as input */ GPIO_REG(GPIO_OUTPUT_EN) &= ~(1 << CTP_PIN_INT); - eos_gt911_intr_enable(); - - return EOS_OK; } -void eos_gt911_sleep(void) { - eos_gt911_intr_disable(); +int eos_gt911_sleep(void) { + int rv; - clear_csr(mstatus, MSTATUS_MIE); GPIO_REG(GPIO_OUTPUT_VAL) &= ~(1 << CTP_PIN_INT); GPIO_REG(GPIO_OUTPUT_EN) |= (1 << CTP_PIN_INT); - set_csr(mstatus, MSTATUS_MIE); - g911_command(CMD_SLEEP); + rv = g911_command(CMD_SLEEP); + if (rv) return rv; + + return EOS_OK; } void eos_gt911_wake(void) { - clear_csr(mstatus, MSTATUS_MIE); GPIO_REG(GPIO_OUTPUT_VAL) |= (1 << CTP_PIN_INT); GPIO_REG(GPIO_OUTPUT_EN) |= (1 << CTP_PIN_INT); - set_csr(mstatus, MSTATUS_MIE); - eos_time_sleep(5); + eos_sleep(5); - clear_csr(mstatus, MSTATUS_MIE); GPIO_REG(GPIO_OUTPUT_EN) &= ~(1 << CTP_PIN_INT); GPIO_REG(GPIO_OUTPUT_VAL) &= ~(1 << CTP_PIN_INT); - set_csr(mstatus, MSTATUS_MIE); - - eos_gt911_intr_enable(); } int eos_gt911_cfg_read(uint8_t *cfg_buf) { @@ -286,7 +160,8 @@ int eos_gt911_cfg_print(void) { } } - gt911_fw_ver(cfg_buf); + rv = gt911_fw_ver(cfg_buf); + if (rv) return rv; printf("GT911 FW VER:%.2X%.2X\n", cfg_buf[1], cfg_buf[0]); @@ -309,14 +184,17 @@ int eos_gt911_configure(void) { rv = eos_gt911_cfg_read(cfg_buf); if (rv) return rv; + /* XY coordinate output threshold: 1 */ eos_gt911_set_reg(cfg_buf, REG_X_THR, 1); eos_gt911_set_reg(cfg_buf, REG_Y_THR, 1); + /* INT triggering mechanism: falling edge */ reg = eos_gt911_get_reg(cfg_buf, REG_MOD_SW1); reg &= 0xFC; reg |= 1; eos_gt911_set_reg(cfg_buf, REG_MOD_SW1, reg); + /* Coordinates report rate: 5 ms */ reg = eos_gt911_get_reg(cfg_buf, REG_REF_RATE); reg &= 0xF0; eos_gt911_set_reg(cfg_buf, REG_REF_RATE, reg); @@ -324,3 +202,24 @@ int eos_gt911_configure(void) { rv = eos_gt911_cfg_write(cfg_buf); return rv; } + +int eos_gt911_set_status(uint8_t status) { + int rv; + + rv = eos_i2c_write16(GT911_ADDR, REG_STATUS, &status, 1); + return rv; +} + +int eos_gt911_get_status(uint8_t *status) { + int rv; + + rv = eos_i2c_read16(GT911_ADDR, REG_STATUS, status, 1); + return rv; +} + +int eos_gt911_get_points(int num_points, uint8_t *points) { + int rv; + + rv = eos_i2c_read16(GT911_ADDR, REG_POINTS, points, GT911_SIZE_PBUF * num_points); + return rv; +} diff --git a/fw/fe310/eos/dev/gt911.h b/fw/fe310/eos/dev/drv/gt911.h index 2f91646..46f8132 100644 --- a/fw/fe310/eos/dev/gt911.h +++ b/fw/fe310/eos/dev/drv/gt911.h @@ -1,18 +1,14 @@ #include <stdint.h> -#define CTP_ETYPE_INTR 1 +#define GT911_ADDR 0x5d #define GT911_SIZE_CFG 186 -#define GT911_ADDR 0x5d - -int eos_gt911_init(uint8_t wakeup_cause); -void eos_gt911_intr_enable(void); -void eos_gt911_intr_disable(void); -int eos_gt911_intr_enabled(void); +#define GT911_SIZE_PBUF 8 +#define GT911_MAX_POINTS 5 -int eos_gt911_reset(void); -void eos_gt911_sleep(void); +void eos_gt911_reset(void); +int eos_gt911_sleep(void); void eos_gt911_wake(void); int eos_gt911_cfg_read(uint8_t *cfg_buf); @@ -21,4 +17,8 @@ int eos_gt911_cfg_print(void); void eos_gt911_set_reg(uint8_t *cfg_buf, uint16_t reg, uint8_t val); uint8_t eos_gt911_get_reg(uint8_t *cfg_buf, uint16_t reg); -int eos_gt911_configure(void);
\ No newline at end of file +int eos_gt911_configure(void); + +int eos_gt911_set_status(uint8_t status); +int eos_gt911_get_status(uint8_t *status); +int eos_gt911_get_points(int num_points, uint8_t *points);
\ No newline at end of file diff --git a/fw/fe310/eos/dev/ili9806e.c b/fw/fe310/eos/dev/drv/ili9806e.c index 8876769..ff7a8cb 100644 --- a/fw/fe310/eos/dev/ili9806e.c +++ b/fw/fe310/eos/dev/drv/ili9806e.c @@ -1,7 +1,6 @@ #include <stdlib.h> #include <stdint.h> #include <string.h> -#include <stdio.h> #include "eos.h" @@ -11,7 +10,11 @@ #include "ili9806e.h" -int eos_ili9806e_init(void) { +#ifdef EOS_DEBUG +#include <stdio.h> +#endif + +int ili9806e_init(void) { int rv; uint8_t chip_id[3]; @@ -40,7 +43,9 @@ int eos_ili9806e_init(void) { eos_spi9bit_write(0, 0x02); eos_spi9bit_read(&chip_id[2]); +#ifdef EOS_DEBUG printf("LCD CHIP ID: %.2x%.2x%.2x\n", chip_id[0], chip_id[1], chip_id[2]); +#endif eos_spi9bit_write(0, 0xFE); // disable read eos_spi9bit_write(1, 0x00); @@ -400,31 +405,31 @@ int eos_ili9806e_init(void) { eos_spi9bit_write(1, 0x70); // 24BIT eos_spi9bit_write(0, 0x11); - eos_time_sleep(120); + eos_sleep(120); eos_spi9bit_write(0, 0x29); - eos_time_sleep(25); + eos_sleep(25); eos_spi_cs_clear(); return EOS_OK; } -void eos_ili9806e_sleep(void) { +void ili9806e_sleep(void) { eos_spi_cs_set(); eos_spi9bit_write(0, 0x28); - eos_time_sleep(10); + eos_sleep(10); eos_spi9bit_write(0, 0x10); eos_spi_cs_clear(); } -void eos_ili9806e_wake(void) { +void ili9806e_wake(void) { eos_spi_cs_set(); eos_spi9bit_write(0, 0x11); - eos_time_sleep(120); + eos_sleep(120); eos_spi9bit_write(0, 0x29); eos_spi_cs_clear(); diff --git a/fw/fe310/eos/dev/drv/ili9806e.h b/fw/fe310/eos/dev/drv/ili9806e.h new file mode 100644 index 0000000..b697eee --- /dev/null +++ b/fw/fe310/eos/dev/drv/ili9806e.h @@ -0,0 +1,3 @@ +int ili9806e_init(void); +void ili9806e_sleep(void); +void ili9806e_wake(void); diff --git a/fw/fe310/eos/dev/lsm9ds1.h b/fw/fe310/eos/dev/drv/lsm9ds1.h index 92220e7..92220e7 100644 --- a/fw/fe310/eos/dev/lsm9ds1.h +++ b/fw/fe310/eos/dev/drv/lsm9ds1.h diff --git a/fw/fe310/eos/dev/ov2640.c b/fw/fe310/eos/dev/drv/ov2640.c index e84a59b..b801e20 100644 --- a/fw/fe310/eos/dev/ov2640.c +++ b/fw/fe310/eos/dev/drv/ov2640.c @@ -6,7 +6,6 @@ #include "soc/timer.h" #include "soc/i2c.h" -#include "cam.h" #include "ov2640_regs.h" #include "ov2640.h" @@ -22,6 +21,59 @@ #define UXGA_WIDTH (1600) #define UXGA_HEIGHT (1200) +#define IM_LOG2_2(x) (((x) & 0x2ULL) ? ( 2 ) : 1) // NO ({ ... }) ! +#define IM_LOG2_4(x) (((x) & 0xCULL) ? ( 2 + IM_LOG2_2((x) >> 2)) : IM_LOG2_2(x)) // NO ({ ... }) ! +#define IM_LOG2_8(x) (((x) & 0xF0ULL) ? ( 4 + IM_LOG2_4((x) >> 4)) : IM_LOG2_4(x)) // NO ({ ... }) ! +#define IM_LOG2_16(x) (((x) & 0xFF00ULL) ? ( 8 + IM_LOG2_8((x) >> 8)) : IM_LOG2_8(x)) // NO ({ ... }) ! +#define IM_LOG2_32(x) (((x) & 0xFFFF0000ULL) ? (16 + IM_LOG2_16((x) >> 16)) : IM_LOG2_16(x)) // NO ({ ... }) ! +#define IM_LOG2(x) (((x) & 0xFFFFFFFF00000000ULL) ? (32 + IM_LOG2_32((x) >> 32)) : IM_LOG2_32(x)) // NO ({ ... }) ! + +#define IM_MAX(a,b) ({ __typeof__ (a) _a = (a); __typeof__ (b) _b = (b); _a > _b ? _a : _b; }) +#define IM_MIN(a,b) ({ __typeof__ (a) _a = (a); __typeof__ (b) _b = (b); _a < _b ? _a : _b; }) +#define IM_DIV(a,b) ({ __typeof__ (a) _a = (a); __typeof__ (b) _b = (b); _b ? (_a / _b) : 0; }) +#define IM_MOD(a,b) ({ __typeof__ (a) _a = (a); __typeof__ (b) _b = (b); _b ? (_a % _b) : 0; }) + +static const int resolution_arr[][2] = { + {0, 0 }, + // C/SIF Resolutions + {88, 72 }, /* QQCIF */ + {176, 144 }, /* QCIF */ + {352, 288 }, /* CIF */ + {88, 60 }, /* QQSIF */ + {176, 120 }, /* QSIF */ + {352, 240 }, /* SIF */ + // VGA Resolutions + {40, 30 }, /* QQQQVGA */ + {80, 60 }, /* QQQVGA */ + {160, 120 }, /* QQVGA */ + {320, 240 }, /* QVGA */ + {640, 480 }, /* VGA */ + {60, 40 }, /* HQQQVGA */ + {120, 80 }, /* HQQVGA */ + {240, 160 }, /* HQVGA */ + // FFT Resolutions + {64, 32 }, /* 64x32 */ + {64, 64 }, /* 64x64 */ + {128, 64 }, /* 128x64 */ + {128, 128 }, /* 128x128 */ + {320, 320 }, /* 128x128 */ + // Other + {128, 160 }, /* LCD */ + {128, 160 }, /* QQVGA2 */ + {720, 480 }, /* WVGA */ + {752, 480 }, /* WVGA2 */ + {800, 600 }, /* SVGA */ + {1024, 768 }, /* XGA */ + {1280, 1024}, /* SXGA */ + {1600, 1200}, /* UXGA */ + {1280, 720 }, /* HD */ + {1920, 1080}, /* FHD */ + {2560, 1440}, /* QHD */ + {2048, 1536}, /* QXGA */ + {2560, 1600}, /* WQXGA */ + {2592, 1944}, /* WQXGA2 */ +}; + static const uint8_t default_regs[][2] = { // From Linux Driver. @@ -360,7 +412,7 @@ static int regarr_write(const uint8_t (*regs)[2]) { return rv; } -int eos_ov2640_init(void) { +int ov2640_init(void) { int rv; // Reset all registers @@ -371,19 +423,19 @@ int eos_ov2640_init(void) { if (rv) return rv; // Delay 5 ms - eos_time_sleep(5); + eos_sleep(5); // Write default regsiters rv = regarr_write(default_regs); if (rv) return rv; // Delay 300 ms - eos_time_sleep(300); + eos_sleep(300); return EOS_OK; } -int eos_ov2640_sleep(int enable) { +int ov2640_sleep(int enable) { uint8_t reg; int rv; @@ -403,21 +455,21 @@ int eos_ov2640_sleep(int enable) { return reg_write(COM2, reg); } -int eos_ov2640_set_pixfmt(pixformat_t fmt) { +int ov2640_set_pixfmt(cam_pixformat_t fmt) { const uint8_t (*regs)[2]; switch (fmt) { - case PIXFORMAT_RGB565: + case CAM_PIXFORMAT_RGB565: regs = rgb565_regs; break; - case PIXFORMAT_YUV422: - case PIXFORMAT_GRAYSCALE: + case CAM_PIXFORMAT_YUV422: + case CAM_PIXFORMAT_GRAYSCALE: regs = yuv422_regs; break; - case PIXFORMAT_BAYER: + case CAM_PIXFORMAT_BAYER: regs = bayer_regs; break; - case PIXFORMAT_JPEG: + case CAM_PIXFORMAT_JPEG: regs = jpeg_regs; break; default: @@ -427,12 +479,12 @@ int eos_ov2640_set_pixfmt(pixformat_t fmt) { return regarr_write(regs); } -int eos_ov2640_set_framesize(framesize_t framesize) { +int ov2640_set_framesize(cam_framesize_t framesize) { const uint8_t (*regs)[2]; uint16_t sensor_w = 0; uint16_t sensor_h = 0; - uint16_t w = _eos_cam_resolution[framesize][0]; - uint16_t h = _eos_cam_resolution[framesize][1]; + uint16_t w = resolution_arr[framesize][0]; + uint16_t h = resolution_arr[framesize][1]; int rv; if ((w % 4) || (h % 4) || (w > UXGA_WIDTH) || (h > UXGA_HEIGHT)) { // w/h must be divisble by 4 @@ -483,7 +535,7 @@ int eos_ov2640_set_framesize(framesize_t framesize) { return rv; } -int eos_ov2640_set_contrast(int level) { +int ov2640_set_contrast(int level) { int rv = EOS_OK; level += (NUM_CONTRAST_LEVELS / 2) + 1; @@ -502,7 +554,7 @@ int eos_ov2640_set_contrast(int level) { return rv; } -int eos_ov2640_set_brightness(int level) { +int ov2640_set_brightness(int level) { int rv = EOS_OK; level += (NUM_BRIGHTNESS_LEVELS / 2) + 1; @@ -521,7 +573,7 @@ int eos_ov2640_set_brightness(int level) { return rv; } -int eos_ov2640_set_saturation(int level) { +int ov2640_set_saturation(int level) { int rv = EOS_OK; level += (NUM_SATURATION_LEVELS / 2) + 1; @@ -540,7 +592,7 @@ int eos_ov2640_set_saturation(int level) { return rv; } -int eos_ov2640_set_gainceiling(gainceiling_t gainceiling) { +int ov2640_set_gainceiling(cam_gainceiling_t gainceiling) { int rv = EOS_OK; /* Switch to SENSOR register bank */ @@ -552,7 +604,7 @@ int eos_ov2640_set_gainceiling(gainceiling_t gainceiling) { return rv; } -int eos_ov2640_set_quality(int qs) { +int ov2640_set_quality(int qs) { int rv = EOS_OK; /* Switch to DSP register bank */ @@ -564,7 +616,7 @@ int eos_ov2640_set_quality(int qs) { return rv; } -int eos_ov2640_set_colorbar(int enable) { +int ov2640_set_colorbar(int enable) { int rv = EOS_OK; uint8_t reg; @@ -583,7 +635,7 @@ int eos_ov2640_set_colorbar(int enable) { return reg_write(COM7, reg); } -int eos_ov2640_set_auto_gain(int enable, float gain_db, float gain_db_ceiling) { +int ov2640_set_auto_gain(int enable, float gain_db, float gain_db_ceiling) { int rv = EOS_OK; uint8_t reg; @@ -617,7 +669,7 @@ int eos_ov2640_set_auto_gain(int enable, float gain_db, float gain_db_ceiling) { return rv; } -int eos_ov2640_get_gain_db(float *gain_db) { +int ov2640_get_gain_db(float *gain_db) { int rv = EOS_OK; uint8_t reg, gain; @@ -651,7 +703,7 @@ int eos_ov2640_get_gain_db(float *gain_db) { return EOS_OK; } -int eos_ov2640_set_auto_exposure(int enable, int exposure_us) { +int ov2640_set_auto_exposure(int enable, int exposure_us) { int rv = EOS_OK; uint8_t reg; @@ -709,7 +761,7 @@ int eos_ov2640_set_auto_exposure(int enable, int exposure_us) { return rv; } -int eos_ov2640_get_exposure_us(int *exposure_us) { +int ov2640_get_exposure_us(int *exposure_us) { int rv = EOS_OK; uint8_t reg, aec_10, aec_92, aec_1510; @@ -775,7 +827,7 @@ int eos_ov2640_get_exposure_us(int *exposure_us) { return EOS_OK; } -int eos_ov2640_set_auto_whitebal(int enable, float r_gain_db, float g_gain_db, float b_gain_db) { +int ov2640_set_auto_whitebal(int enable, float r_gain_db, float g_gain_db, float b_gain_db) { int rv = EOS_OK; uint8_t reg; @@ -795,7 +847,7 @@ int eos_ov2640_set_auto_whitebal(int enable, float r_gain_db, float g_gain_db, f return rv; } -int eos_ov2640_set_hmirror(int enable) { +int ov2640_set_hmirror(int enable) { int rv = EOS_OK; uint8_t reg; @@ -814,7 +866,7 @@ int eos_ov2640_set_hmirror(int enable) { return reg_write(REG04, reg); } -int eos_ov2640_set_vflip(int enable) { +int ov2640_set_vflip(int enable) { int rv = EOS_OK; uint8_t reg; @@ -833,11 +885,11 @@ int eos_ov2640_set_vflip(int enable) { return reg_write(REG04, reg); } -int eos_ov2640_set_effect(sde_t sde) { +int ov2640_set_effect(cam_sde_t sde) { int rv = EOS_OK; switch (sde) { - case SDE_NEGATIVE: + case CAM_SDE_NEGATIVE: if (!rv) rv = reg_write(BANK_SEL, BANK_SEL_DSP); if (!rv) rv = reg_write(BPADDR, 0x00); if (!rv) rv = reg_write(BPDATA, 0x40); @@ -845,7 +897,7 @@ int eos_ov2640_set_effect(sde_t sde) { if (!rv) rv = reg_write(BPDATA, 0x80); if (!rv) rv = reg_write(BPDATA, 0x80); break; - case SDE_NORMAL: + case CAM_SDE_NORMAL: if (!rv) rv = reg_write(BANK_SEL, BANK_SEL_DSP); if (!rv) rv = reg_write(BPADDR, 0x00); if (!rv) rv = reg_write(BPDATA, 0x00); diff --git a/fw/fe310/eos/dev/drv/ov2640.h b/fw/fe310/eos/dev/drv/ov2640.h new file mode 100644 index 0000000..af282e0 --- /dev/null +++ b/fw/fe310/eos/dev/drv/ov2640.h @@ -0,0 +1,74 @@ +#include <stdint.h> + +#define OV2640_ADDR 0x30 + +typedef enum { + CAM_PIXFORMAT_INVALID = 0, + CAM_PIXFORMAT_BINARY, // 1BPP/BINARY + CAM_PIXFORMAT_GRAYSCALE, // 1BPP/GRAYSCALE + CAM_PIXFORMAT_RGB565, // 2BPP/RGB565 + CAM_PIXFORMAT_YUV422, // 2BPP/YUV422 + CAM_PIXFORMAT_BAYER, // 1BPP/RAW + CAM_PIXFORMAT_JPEG, // JPEG/COMPRESSED +} cam_pixformat_t; + +typedef enum { + CAM_FRAMESIZE_INVALID = 0, + // C/SIF Resolutions + CAM_FRAMESIZE_QQCIF, // 88x72 + CAM_FRAMESIZE_QCIF, // 176x144 + CAM_FRAMESIZE_CIF, // 352x288 + CAM_FRAMESIZE_QQSIF, // 88x60 + CAM_FRAMESIZE_QSIF, // 176x120 + CAM_FRAMESIZE_SIF, // 352x240 + // VGA Resolutions + CAM_FRAMESIZE_QQQQVGA, // 40x30 + CAM_FRAMESIZE_QQQVGA, // 80x60 + CAM_FRAMESIZE_QQVGA, // 160x120 + CAM_FRAMESIZE_QVGA, // 320x240 + CAM_FRAMESIZE_VGA, // 640x480 + CAM_FRAMESIZE_HQQQVGA, // 60x40 + CAM_FRAMESIZE_HQQVGA, // 120x80 + CAM_FRAMESIZE_HQVGA, // 240x160 + // FFT Resolutions + CAM_FRAMESIZE_64X32, // 64x32 + CAM_FRAMESIZE_64X64, // 64x64 + CAM_FRAMESIZE_128X64, // 128x64 + CAM_FRAMESIZE_128X128, // 128x128 + CAM_FRAMESIZE_320X320, // 320x320 + // Other + CAM_FRAMESIZE_LCD, // 128x160 + CAM_FRAMESIZE_QQVGA2, // 128x160 + CAM_FRAMESIZE_WVGA, // 720x480 + CAM_FRAMESIZE_WVGA2, // 752x480 + CAM_FRAMESIZE_SVGA, // 800x600 + CAM_FRAMESIZE_XGA, // 1024x768 + CAM_FRAMESIZE_SXGA, // 1280x1024 + CAM_FRAMESIZE_UXGA, // 1600x1200 + CAM_FRAMESIZE_HD, // 1280x720 + CAM_FRAMESIZE_FHD, // 1920x1080 + CAM_FRAMESIZE_QHD, // 2560x1440 + CAM_FRAMESIZE_QXGA, // 2048x1536 + CAM_FRAMESIZE_WQXGA, // 2560x1600 + CAM_FRAMESIZE_WQXGA2, // 2592x1944 +} cam_framesize_t; + +typedef enum { + CAM_GAINCEILING_2X, + CAM_GAINCEILING_4X, + CAM_GAINCEILING_8X, + CAM_GAINCEILING_16X, + CAM_GAINCEILING_32X, + CAM_GAINCEILING_64X, + CAM_GAINCEILING_128X, +} cam_gainceiling_t; + +typedef enum { + SDE_NORMAL, + SDE_NEGATIVE, +} cam_sde_t; + +int ov2640_init(void); +int ov2640_sleep(int enable); +int ov2640_set_pixfmt(cam_pixformat_t fmt); +int ov2640_set_framesize(cam_framesize_t framesize); diff --git a/fw/fe310/eos/dev/ov2640_regs.h b/fw/fe310/eos/dev/drv/ov2640_regs.h index deb7521..deb7521 100644 --- a/fw/fe310/eos/dev/ov2640_regs.h +++ b/fw/fe310/eos/dev/drv/ov2640_regs.h diff --git a/fw/fe310/eos/dev/tps61052.c b/fw/fe310/eos/dev/drv/tps61052.c index d2d431c..2908a45 100644 --- a/fw/fe310/eos/dev/tps61052.c +++ b/fw/fe310/eos/dev/drv/tps61052.c @@ -23,7 +23,7 @@ static int reg_write(uint8_t reg, uint8_t data) { } /* register b00 */ -int eos_tps61052_get_tc(uint8_t *tc) { +int tps61052_get_tc(uint8_t *tc) { int rv; rv = reg_read(0, tc); @@ -33,7 +33,7 @@ int eos_tps61052_get_tc(uint8_t *tc) { return EOS_OK; } -int eos_tps61052_set_tc(uint8_t tc) { +int tps61052_set_tc(uint8_t tc) { uint8_t data; int rv; @@ -47,7 +47,7 @@ int eos_tps61052_set_tc(uint8_t tc) { return rv; } -int eos_tps61052_get_dim(uint8_t *dim) { +int tps61052_get_dim(uint8_t *dim) { int rv; rv = reg_read(0, dim); @@ -58,7 +58,7 @@ int eos_tps61052_get_dim(uint8_t *dim) { return EOS_OK; } -int eos_tps61052_set_dim(uint8_t dim) { +int tps61052_set_dim(uint8_t dim) { uint8_t data; int rv; @@ -73,7 +73,7 @@ int eos_tps61052_set_dim(uint8_t dim) { return rv; } -int eos_tps61052_get_ov(uint8_t *ov) { +int tps61052_get_ov(uint8_t *ov) { int rv; rv = reg_read(0, ov); @@ -84,7 +84,7 @@ int eos_tps61052_get_ov(uint8_t *ov) { return EOS_OK; } -int eos_tps61052_set_ov(uint8_t ov) { +int tps61052_set_ov(uint8_t ov) { uint8_t data; int rv; @@ -99,7 +99,7 @@ int eos_tps61052_set_ov(uint8_t ov) { return rv; } -int eos_tps61052_get_mode0(uint8_t *mode) { +int tps61052_get_mode0(uint8_t *mode) { int rv; rv = reg_read(0, mode); @@ -110,7 +110,7 @@ int eos_tps61052_get_mode0(uint8_t *mode) { return EOS_OK; } -int eos_tps61052_set_mode0(uint8_t mode) { +int tps61052_set_mode0(uint8_t mode) { uint8_t data; int rv; @@ -126,7 +126,7 @@ int eos_tps61052_set_mode0(uint8_t mode) { } /* register b01 */ -int eos_tps61052_get_fc(uint8_t *fc) { +int tps61052_get_fc(uint8_t *fc) { int rv; rv = reg_read(1, fc); @@ -136,7 +136,7 @@ int eos_tps61052_get_fc(uint8_t *fc) { return EOS_OK; } -int eos_tps61052_set_fc(uint8_t fc) { +int tps61052_set_fc(uint8_t fc) { uint8_t data; int rv; @@ -150,7 +150,7 @@ int eos_tps61052_set_fc(uint8_t fc) { return rv; } -int eos_tps61052_get_sft(uint8_t *sft) { +int tps61052_get_sft(uint8_t *sft) { int rv; rv = reg_read(1, sft); @@ -161,7 +161,7 @@ int eos_tps61052_get_sft(uint8_t *sft) { return EOS_OK; } -int eos_tps61052_set_sft(uint8_t sft) { +int tps61052_set_sft(uint8_t sft) { uint8_t data; int rv; @@ -176,7 +176,7 @@ int eos_tps61052_set_sft(uint8_t sft) { return rv; } -int eos_tps61052_get_stt(uint8_t *stt) { +int tps61052_get_stt(uint8_t *stt) { int rv; rv = reg_read(1, stt); @@ -187,7 +187,7 @@ int eos_tps61052_get_stt(uint8_t *stt) { return EOS_OK; } -int eos_tps61052_set_stt(uint8_t stt) { +int tps61052_set_stt(uint8_t stt) { uint8_t data; int rv; @@ -202,7 +202,7 @@ int eos_tps61052_set_stt(uint8_t stt) { return rv; } -int eos_tps61052_get_to(uint8_t *to) { +int tps61052_get_to(uint8_t *to) { int rv; rv = reg_read(1, to); @@ -213,7 +213,7 @@ int eos_tps61052_get_to(uint8_t *to) { return EOS_OK; } -int eos_tps61052_get_mode1(uint8_t *mode) { +int tps61052_get_mode1(uint8_t *mode) { int rv; rv = reg_read(1, mode); @@ -224,7 +224,7 @@ int eos_tps61052_get_mode1(uint8_t *mode) { return EOS_OK; } -int eos_tps61052_set_mode1(uint8_t mode) { +int tps61052_set_mode1(uint8_t mode) { uint8_t data; int rv; @@ -240,7 +240,7 @@ int eos_tps61052_set_mode1(uint8_t mode) { } /* register b10 */ -int eos_tps61052_get_adc(uint8_t *adc) { +int tps61052_get_adc(uint8_t *adc) { int rv; rv = reg_read(2, adc); @@ -251,7 +251,7 @@ int eos_tps61052_get_adc(uint8_t *adc) { return EOS_OK; } -int eos_tps61052_get_lf(uint8_t *lf) { +int tps61052_get_lf(uint8_t *lf) { int rv; rv = reg_read(2, lf); @@ -262,7 +262,7 @@ int eos_tps61052_get_lf(uint8_t *lf) { return EOS_OK; } -int eos_tps61052_get_ot(uint8_t *ot) { +int tps61052_get_ot(uint8_t *ot) { int rv; rv = reg_read(2, ot); @@ -273,7 +273,7 @@ int eos_tps61052_get_ot(uint8_t *ot) { return EOS_OK; } -int eos_tps61052_set_ilim(uint8_t ilim) { +int tps61052_set_ilim(uint8_t ilim) { uint8_t data; int rv; @@ -289,7 +289,7 @@ int eos_tps61052_set_ilim(uint8_t ilim) { } /* register b11 */ -int eos_tps61052_get_stim(uint8_t *stim) { +int tps61052_get_stim(uint8_t *stim) { int rv; rv = reg_read(3, stim); @@ -299,7 +299,7 @@ int eos_tps61052_get_stim(uint8_t *stim) { return EOS_OK; } -int eos_tps61052_set_stim(uint8_t stim) { +int tps61052_set_stim(uint8_t stim) { uint8_t data; int rv; @@ -313,7 +313,7 @@ int eos_tps61052_set_stim(uint8_t stim) { return rv; } -int eos_tps61052_get_dctim(uint8_t *dctim) { +int tps61052_get_dctim(uint8_t *dctim) { int rv; rv = reg_read(3, dctim); @@ -324,7 +324,7 @@ int eos_tps61052_get_dctim(uint8_t *dctim) { return EOS_OK; } -int eos_tps61052_set_dctim(uint8_t dctim) { +int tps61052_set_dctim(uint8_t dctim) { uint8_t data; int rv; diff --git a/fw/fe310/eos/dev/drv/tps61052.h b/fw/fe310/eos/dev/drv/tps61052.h new file mode 100644 index 0000000..6232676 --- /dev/null +++ b/fw/fe310/eos/dev/drv/tps61052.h @@ -0,0 +1,34 @@ +#include <stdint.h> + +/* register b00 */ +int tps61052_get_tc(uint8_t *tc); +int tps61052_set_tc(uint8_t tc); +int tps61052_get_dim(uint8_t *dim); +int tps61052_set_dim(uint8_t dim); +int tps61052_get_ov(uint8_t *ov); +int tps61052_set_ov(uint8_t ov); +int tps61052_get_mode0(uint8_t *mode); +int tps61052_set_mode0(uint8_t mode); + +/* register b01 */ +int tps61052_get_fc(uint8_t *fc); +int tps61052_set_fc(uint8_t fc); +int tps61052_get_sft(uint8_t *sft); +int tps61052_set_sft(uint8_t sft); +int tps61052_get_stt(uint8_t *stt); +int tps61052_set_stt(uint8_t stt); +int tps61052_get_to(uint8_t *to); +int tps61052_get_mode1(uint8_t *mode); +int tps61052_set_mode1(uint8_t mode); + +/* register b10 */ +int tps61052_get_adc(uint8_t *adc); +int tps61052_get_lf(uint8_t *lf); +int tps61052_get_ot(uint8_t *ot); +int tps61052_set_ilim(uint8_t ilim); + +/* register b11 */ +int tps61052_get_stim(uint8_t *stim); +int tps61052_set_stim(uint8_t stim); +int tps61052_get_dctim(uint8_t *dctim); +int tps61052_set_dctim(uint8_t dctim); diff --git a/fw/fe310/eos/dev/ili9806e.h b/fw/fe310/eos/dev/ili9806e.h deleted file mode 100644 index 5e14c54..0000000 --- a/fw/fe310/eos/dev/ili9806e.h +++ /dev/null @@ -1,3 +0,0 @@ -int eos_ili9806e_init(void); -void eos_ili9806e_sleep(void); -void eos_ili9806e_wake(void); diff --git a/fw/fe310/eos/dev/ov2640.h b/fw/fe310/eos/dev/ov2640.h deleted file mode 100644 index 3d08c2a..0000000 --- a/fw/fe310/eos/dev/ov2640.h +++ /dev/null @@ -1,8 +0,0 @@ -#include <stdint.h> - -#define OV2640_ADDR 0x30 - -int eos_ov2640_init(void); -int eos_ov2640_sleep(int enable); -int eos_ov2640_set_pixfmt(pixformat_t fmt); -int eos_ov2640_set_framesize(framesize_t framesize); diff --git a/fw/fe310/eos/dev/tps61052.h b/fw/fe310/eos/dev/tps61052.h deleted file mode 100644 index 2711d2b..0000000 --- a/fw/fe310/eos/dev/tps61052.h +++ /dev/null @@ -1,34 +0,0 @@ -#include <stdint.h> - -/* register b00 */ -int eos_tps61052_get_tc(uint8_t *tc); -int eos_tps61052_set_tc(uint8_t tc); -int eos_tps61052_get_dim(uint8_t *dim); -int eos_tps61052_set_dim(uint8_t dim); -int eos_tps61052_get_ov(uint8_t *ov); -int eos_tps61052_set_ov(uint8_t ov); -int eos_tps61052_get_mode0(uint8_t *mode); -int eos_tps61052_set_mode0(uint8_t mode); - -/* register b01 */ -int eos_tps61052_get_fc(uint8_t *fc); -int eos_tps61052_set_fc(uint8_t fc); -int eos_tps61052_get_sft(uint8_t *sft); -int eos_tps61052_set_sft(uint8_t sft); -int eos_tps61052_get_stt(uint8_t *stt); -int eos_tps61052_set_stt(uint8_t stt); -int eos_tps61052_get_to(uint8_t *to); -int eos_tps61052_get_mode1(uint8_t *mode); -int eos_tps61052_set_mode1(uint8_t mode); - -/* register b10 */ -int eos_tps61052_get_adc(uint8_t *adc); -int eos_tps61052_get_lf(uint8_t *lf); -int eos_tps61052_get_ot(uint8_t *ot); -int eos_tps61052_set_ilim(uint8_t ilim); - -/* register b11 */ -int eos_tps61052_get_stim(uint8_t *stim); -int eos_tps61052_set_stim(uint8_t stim); -int eos_tps61052_get_dctim(uint8_t *dctim); -int eos_tps61052_set_dctim(uint8_t dctim); |