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-rw-r--r--code/esp32/components/eos/cell.c2
-rw-r--r--code/esp32/components/eos/cell_modem.c40
-rw-r--r--code/esp32/components/eos/cell_pcm.c83
-rw-r--r--code/esp32/components/eos/include/eos.h2
4 files changed, 76 insertions, 51 deletions
diff --git a/code/esp32/components/eos/cell.c b/code/esp32/components/eos/cell.c
index 49ddeda..26ad454 100644
--- a/code/esp32/components/eos/cell.c
+++ b/code/esp32/components/eos/cell.c
@@ -33,8 +33,6 @@ static void cell_handler(unsigned char _mtype, unsigned char *buffer, uint16_t s
}
void eos_cell_init(void) {
- eos_pcm_init();
- eos_modem_init();
eos_net_set_handler(EOS_NET_MTYPE_CELL, cell_handler);
}
diff --git a/code/esp32/components/eos/cell_modem.c b/code/esp32/components/eos/cell_modem.c
index af27093..4c964e1 100644
--- a/code/esp32/components/eos/cell_modem.c
+++ b/code/esp32/components/eos/cell_modem.c
@@ -23,11 +23,12 @@
#define UART_GPIO_RI 35
static QueueHandle_t uart_queue;
+static QueueHandle_t uart_ri_queue;
static const char *TAG = "EOS MODEM";
static void uart_event_task(void *pvParameters) {
- char mode = EOS_CELL_UART_MODE_RELAY;
+ char mode = EOS_CELL_UART_MODE_NONE;
uart_event_t event;
size_t len;
unsigned char *buf;
@@ -48,7 +49,7 @@ static void uart_event_task(void *pvParameters) {
buf = eos_net_alloc();
buf[0] = EOS_CELL_MTYPE_DATA;
len = uart_read_bytes(UART_NUM_2, buf+1, MIN(event.size, EOS_NET_SIZE_BUF-1), 100 / portTICK_RATE_MS);
- eos_net_send(EOS_NET_MTYPE_CELL, buf, len, 0);
+ eos_net_send(EOS_NET_MTYPE_CELL, buf, len+1, 0);
break;
default:
@@ -70,6 +71,28 @@ static void uart_event_task(void *pvParameters) {
vTaskDelete(NULL);
}
+static void uart_ri_event_task(void *pvParameters) {
+ int level;
+
+ while (1) {
+ if (xQueueReceive(uart_ri_queue, (void * )&level, (portTickType)portMAX_DELAY) && (level == 0)) {
+ uint64_t t_start = esp_timer_get_time();
+ if (xQueueReceive(uart_ri_queue, (void * )&level, 200 / portTICK_RATE_MS) && (level == 1)) {
+ uint64_t t_end = esp_timer_get_time();
+ ESP_LOGI(TAG, "TDELTA:%u", (uint32_t)(t_end - t_start));
+ } else {
+ ESP_LOGI(TAG, "RING");
+ }
+ }
+ }
+ vTaskDelete(NULL);
+}
+
+static void IRAM_ATTR uart_ri_isr_handler(void *arg) {
+ int level = gpio_get_level(UART_GPIO_RI);
+ xQueueSendFromISR(uart_ri_queue, &level, NULL);
+}
+
void eos_modem_init(void) {
/* Configure parameters of an UART driver,
* communication pins and install the driver */
@@ -90,11 +113,24 @@ void eos_modem_init(void) {
io_conf.intr_type = GPIO_INTR_DISABLE;
io_conf.mode = GPIO_MODE_OUTPUT;
io_conf.pin_bit_mask = ((uint64_t)1 << UART_GPIO_DTR);
+ io_conf.pull_up_en = 0;
+ io_conf.pull_down_en = 0;
gpio_config(&io_conf);
gpio_set_level(UART_GPIO_DTR, 1);
+ io_conf.intr_type = GPIO_PIN_INTR_ANYEDGE;
+ io_conf.mode = GPIO_MODE_INPUT;
+ io_conf.pin_bit_mask = ((uint64_t)1 << UART_GPIO_RI);
+ io_conf.pull_up_en = 0;
+ io_conf.pull_down_en = 0;
+ gpio_config(&io_conf);
+
+ uart_ri_queue = xQueueCreate(4, sizeof(int));
// Create a task to handle uart event from ISR
xTaskCreate(uart_event_task, "uart_event", EOS_TASK_SSIZE_UART, NULL, EOS_TASK_PRIORITY_UART, NULL);
+ xTaskCreate(uart_ri_event_task, "uart_ri_event", EOS_TASK_SSIZE_UART_RI, NULL, EOS_TASK_PRIORITY_UART_RI, NULL);
+
+ gpio_isr_handler_add(UART_GPIO_RI, uart_ri_isr_handler, NULL);
ESP_LOGI(TAG, "INIT");
}
diff --git a/code/esp32/components/eos/cell_pcm.c b/code/esp32/components/eos/cell_pcm.c
index 71fe2f9..79d654a 100644
--- a/code/esp32/components/eos/cell_pcm.c
+++ b/code/esp32/components/eos/cell_pcm.c
@@ -14,8 +14,8 @@
#include "cell.h"
#define PCM_MIC_WM 128
-#define PCM_HOLD_CNT_TX 2
-#define PCM_HOLD_CNT_RX 2
+#define PCM_HOLD_CNT_TX 3
+#define PCM_HOLD_CNT_RX 3
#define PCM_SIZE_BUFQ 4
#define PCM_SIZE_BUF (PCM_MIC_WM * 4)
@@ -31,7 +31,7 @@ static unsigned char *pcm_bufq_array[PCM_SIZE_BUFQ];
static EOSMsgQ pcm_evt_q;
static EOSMsgItem pcm_evtq_array[PCM_SIZE_BUFQ];
-static char pcm_running;
+static char pcm_hold_tx;
static i2s_dev_t* I2S[I2S_NUM_MAX] = {&I2S0, &I2S1};
@@ -49,8 +49,7 @@ static void i2s_event_task(void *pvParameters) {
uint16_t bytes_e;
ssize_t hold_bytes_r = 0;
unsigned char *hold_buf = NULL;
- static char hold_cnt_tx = 0;
- static char hold_cnt_rx = 0;
+ char hold_cnt = 0;
while (1) {
// Waiting for I2S event.
@@ -58,44 +57,43 @@ static void i2s_event_task(void *pvParameters) {
switch (event.type) {
case I2S_EVENT_RX_DONE:
// Event of I2S receiving data
- if (!hold_cnt_rx) {
+ if (!hold_cnt) {
buf = eos_net_alloc();
buf[0] = EOS_CELL_MTYPE_AUDIO;
bytes_r = eos_pcm_read(buf + 1, PCM_MIC_WM);
eos_net_send(EOS_NET_MTYPE_CELL, buf, bytes_r + 1, 0);
} else {
- hold_cnt_rx--;
+ hold_cnt--;
if (hold_buf == NULL) {
hold_buf = eos_net_alloc();
hold_buf[0] = EOS_CELL_MTYPE_AUDIO;
}
- hold_bytes_r += eos_pcm_read(hold_buf + 1 + hold_bytes_r, PCM_MIC_WM);
- if (hold_cnt_rx == 0) eos_net_send(EOS_NET_MTYPE_CELL, hold_buf, hold_bytes_r + 1, 0);
+ if (1 + hold_bytes_r + PCM_MIC_WM <= EOS_NET_SIZE_BUF) hold_bytes_r += eos_pcm_read(hold_buf + 1 + hold_bytes_r, PCM_MIC_WM);
+ if (hold_cnt == 0) {
+ eos_net_send(EOS_NET_MTYPE_CELL, hold_buf, hold_bytes_r + 1, 0);
+ hold_bytes_r = 0;
+ hold_buf = NULL;
+ }
}
- if (!hold_cnt_tx) {
+ buf = NULL;
+ xSemaphoreTake(mutex, portMAX_DELAY);
+ if (pcm_hold_tx && (eos_msgq_size(&pcm_evt_q) == PCM_HOLD_CNT_TX)) pcm_hold_tx = 0;
+ if (!pcm_hold_tx) eos_msgq_pop(&pcm_evt_q, &_type, &buf, &bytes_e, NULL);
+ xSemaphoreGive(mutex);
+
+ if (buf) {
+ i2s_write(I2S_NUM_0, (const void *)buf, bytes_e, &bytes_w, portMAX_DELAY);
xSemaphoreTake(mutex, portMAX_DELAY);
- eos_msgq_pop(&pcm_evt_q, &_type, &buf, &bytes_e, NULL);
+ eos_bufq_push(&pcm_buf_q, buf);
xSemaphoreGive(mutex);
-
- if (buf) {
- i2s_write(I2S_NUM_0, (const void *)buf, bytes_e, &bytes_w, portMAX_DELAY);
- xSemaphoreTake(mutex, portMAX_DELAY);
- eos_bufq_push(&pcm_buf_q, buf);
- xSemaphoreGive(mutex);
- }
- } else {
- hold_cnt_tx--;
}
break;
case I2S_EVENT_DMA_ERROR:
ESP_LOGE(TAG, "*** I2S DMA ERROR ***");
break;
case I2S_EVENT_MAX:
- hold_cnt_tx = PCM_HOLD_CNT_TX;
- hold_cnt_rx = PCM_HOLD_CNT_RX;
- hold_bytes_r = 0;
- hold_buf = NULL;
+ hold_cnt = PCM_HOLD_CNT_RX;
break;
default:
break;
@@ -186,17 +184,6 @@ ssize_t eos_pcm_expand(unsigned char *buf, unsigned char *data, size_t size) {
memset(buf, 0, PCM_SIZE_BUF);
for (i=0; i<size/2; i++) {
- /*
- unsigned char _d;
- if (i % 2 == 0) {
- _d = 0xAA;
- } else {
- _d = 0xF0;
- }
- _d = 0xF0;
- buf[i * 8 + 3] = _d;
- buf[i * 8 + 2] = _d;
- */
buf[i * 8 + 3] = data[i * 2];
buf[i * 8 + 2] = data[i * 2 + 1];
}
@@ -208,16 +195,20 @@ int eos_pcm_push(unsigned char *data, size_t size) {
unsigned char *buf = NULL;
ssize_t esize;
int rv;
- char running;
if (size > PCM_MIC_WM) return EOS_ERR;
xSemaphoreTake(mutex, portMAX_DELAY);
- running = pcm_running;
- if (running) buf = eos_bufq_pop(&pcm_buf_q);
+ if (pcm_hold_tx && (eos_msgq_size(&pcm_evt_q) == PCM_HOLD_CNT_TX)) {
+ unsigned char _type;
+ uint16_t _len;
+
+ eos_msgq_pop(&pcm_evt_q, &_type, &buf, &_len, NULL);
+ } else {
+ buf = eos_bufq_pop(&pcm_buf_q);
+ }
xSemaphoreGive(mutex);
- if (!running) return EOS_ERR;
if (buf == NULL) return EOS_ERR_EMPTY;
esize = eos_pcm_expand(buf, data, size);
@@ -239,10 +230,6 @@ int eos_pcm_push(unsigned char *data, size_t size) {
void eos_pcm_start(void) {
i2s_event_t evt;
- evt.type = I2S_EVENT_MAX; /* my type */
- xQueueSend(i2s_queue, (void *)&evt, portMAX_DELAY);
- i2s_zero_dma_buffer(I2S_NUM_0);
- i2s_start(I2S_NUM_0);
xSemaphoreTake(mutex, portMAX_DELAY);
while (1) {
unsigned char _type;
@@ -256,13 +243,15 @@ void eos_pcm_start(void) {
break;
}
}
- pcm_running = 1;
+ pcm_hold_tx = 1;
xSemaphoreGive(mutex);
+
+ evt.type = I2S_EVENT_MAX; /* my type */
+ xQueueSend(i2s_queue, (void *)&evt, portMAX_DELAY);
+ i2s_zero_dma_buffer(I2S_NUM_0);
+ i2s_start(I2S_NUM_0);
}
void eos_pcm_stop(void) {
i2s_stop(I2S_NUM_0);
- xSemaphoreTake(mutex, portMAX_DELAY);
- pcm_running = 0;
- xSemaphoreGive(mutex);
}
diff --git a/code/esp32/components/eos/include/eos.h b/code/esp32/components/eos/include/eos.h
index 97e1530..c3f83bb 100644
--- a/code/esp32/components/eos/include/eos.h
+++ b/code/esp32/components/eos/include/eos.h
@@ -4,11 +4,13 @@
#define EOS_ERR_EMPTY -11
#define EOS_TASK_PRIORITY_UART 1
+#define EOS_TASK_PRIORITY_UART_RI 1
#define EOS_TASK_PRIORITY_I2S 1
#define EOS_TASK_PRIORITY_NET_XCHG 1
#define EOS_TASK_PRIORITY_UDP_RCVR 1
#define EOS_TASK_SSIZE_UART 4096
+#define EOS_TASK_SSIZE_UART_RI 4096
#define EOS_TASK_SSIZE_I2S 4096
#define EOS_TASK_SSIZE_NET_XCHG 8192
#define EOS_TASK_SSIZE_UDP_RCVR 4096
generated by cgit v1.2.3 (git 2.25.1) at 2024-09-20 13:39:01 +0000