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-rw-r--r--code/fe310/eos/Makefile2
-rw-r--r--code/fe310/eos/eos.c15
-rw-r--r--code/fe310/eos/eos.h1
-rw-r--r--code/fe310/eos/eve.c289
-rw-r--r--code/fe310/eos/eve.h32
-rwxr-xr-xcode/fe310/eos/eve_config.h79
-rwxr-xr-xcode/fe310/eos/eve_def.h872
-rw-r--r--code/fe310/eos/net.c22
-rw-r--r--code/fe310/eos/net.h2
-rw-r--r--code/fe310/eos/sock.c6
-rw-r--r--code/fe310/eos/sock.h1
-rw-r--r--code/fe310/eos/spi.c149
-rw-r--r--code/fe310/eos/spi.h6
-rw-r--r--code/fe310/eos/wifi.c76
-rw-r--r--code/fe310/eos/wifi.h14
15 files changed, 1513 insertions, 53 deletions
diff --git a/code/fe310/eos/Makefile b/code/fe310/eos/Makefile
index cb91b59..485cd3c 100644
--- a/code/fe310/eos/Makefile
+++ b/code/fe310/eos/Makefile
@@ -2,7 +2,7 @@ include ../common.mk
CFLAGS += -I../include -I../drivers
-obj = trap_entry.o eos.o msgq.o event.o interrupt.o timer.o i2s.o spi.o net.o sock.o
+obj = trap_entry.o eos.o msgq.o event.o interrupt.o timer.o i2s.o spi.o net.o wifi.o sock.o eve.o
%.o: %.c %.h
diff --git a/code/fe310/eos/eos.c b/code/fe310/eos/eos.c
index b656f91..a0bf4c9 100644
--- a/code/fe310/eos/eos.c
+++ b/code/fe310/eos/eos.c
@@ -1,9 +1,12 @@
#include "event.h"
#include "interrupt.h"
#include "timer.h"
+#include "i2s.h"
#include "spi.h"
#include "net.h"
-#include "i2s.h"
+#include "wifi.h"
+#include "sock.h"
+#include "eve.h"
#include "eos.h"
@@ -11,8 +14,12 @@ void eos_init(void) {
eos_evtq_init();
eos_intr_init();
eos_timer_init();
- eos_net_init();
- eos_spi_init();
eos_i2s_init();
- eos_net_start();
+ eos_spi_init();
+ eos_net_init();
+ eos_wifi_init();
+ eos_sock_init();
+ eos_spi_dev_start(EOS_SPI_DEV_DISP);
+ eos_eve_init();
+ eos_spi_dev_stop();
}
diff --git a/code/fe310/eos/eos.h b/code/fe310/eos/eos.h
index 3314906..f1d7907 100644
--- a/code/fe310/eos/eos.h
+++ b/code/fe310/eos/eos.h
@@ -1,4 +1,5 @@
#define EOS_OK 0
+#define EOS_ERR -1
#define EOS_ERR_Q_FULL -10
#define EOS_ERR_Q_EMPTY -11
#define EOS_ERR_NET -20
diff --git a/code/fe310/eos/eve.c b/code/fe310/eos/eve.c
new file mode 100644
index 0000000..8c0a477
--- /dev/null
+++ b/code/fe310/eos/eve.c
@@ -0,0 +1,289 @@
+#include <stdarg.h>
+
+#include "eos.h"
+#include "spi.h"
+#include "timer.h"
+#include "eve.h"
+
+#define MEM_WRITE 0x800000
+
+static char cmd_burst;
+static uint16_t cmd_offset;
+static uint16_t dl_offset;
+
+void eos_eve_command(uint8_t command, uint8_t parameter) {
+ eos_spi_cs_set();
+ eos_spi_xchg24(((uint32_t)command << 16) | ((uint32_t)parameter << 8), 0);
+ eos_spi_cs_clear();
+}
+
+uint8_t eos_eve_read8(uint32_t addr) {
+ uint8_t r;
+ eos_spi_cs_set();
+ eos_spi_xchg32(addr << 8, 0);
+ r = eos_spi_xchg8(0, EOS_SPI_FLAG_BSWAP);
+ eos_spi_cs_clear();
+
+ return r;
+}
+
+uint16_t eos_eve_read16(uint32_t addr) {
+ uint16_t r;
+ eos_spi_cs_set();
+ eos_spi_xchg32(addr << 8, 0);
+ r = eos_spi_xchg16(0, EOS_SPI_FLAG_BSWAP);
+ eos_spi_cs_clear();
+
+ return r;
+}
+
+uint32_t eos_eve_read32(uint32_t addr) {
+ uint32_t r;
+ eos_spi_cs_set();
+ eos_spi_xchg32(addr << 8, 0);
+ r = eos_spi_xchg32(0, EOS_SPI_FLAG_BSWAP);
+ eos_spi_cs_clear();
+
+ return r;
+}
+
+void eos_eve_write8(uint32_t addr, uint8_t data) {
+ eos_spi_cs_set();
+ eos_spi_xchg24(addr | MEM_WRITE, 0);
+ eos_spi_xchg8(data, EOS_SPI_FLAG_BSWAP);
+ eos_spi_cs_clear();
+}
+
+void eos_eve_write16(uint32_t addr, uint16_t data) {
+ eos_spi_cs_set();
+ eos_spi_xchg24(addr | MEM_WRITE, 0);
+ eos_spi_xchg16(data, EOS_SPI_FLAG_BSWAP);
+ eos_spi_cs_clear();
+}
+
+void eos_eve_write32(uint32_t addr, uint32_t data) {
+ eos_spi_cs_set();
+ eos_spi_xchg24(addr | MEM_WRITE, 0);
+ eos_spi_xchg32(data, EOS_SPI_FLAG_BSWAP);
+ eos_spi_cs_clear();
+}
+
+void eos_eve_active(void) {
+ eos_eve_command(EVE_ACTIVE, 0);
+}
+
+void eos_eve_standby(void) {
+ eos_eve_command(EVE_STANDBY, 0);
+}
+
+void eos_eve_sleep(void) {
+ eos_eve_command(EVE_SLEEP, 0);
+}
+
+void eos_eve_pwrdown(void) {
+ eos_eve_command(EVE_PWRDOWN, 0);
+}
+
+void eos_eve_reset(void) {
+ eos_eve_command(EVE_RST_PULSE, 0);
+}
+
+void eos_eve_brightness(uint8_t b) {
+ eos_eve_write8(REG_PWM_DUTY, b);
+}
+
+static void _dl_inc(uint16_t i) {
+ dl_offset += i;
+}
+
+void eos_eve_dl_start(void) {
+ dl_offset = 0;
+}
+
+void eos_eve_dl_write(uint32_t dl) {
+ uint32_t addr = EVE_RAM_DL + dl_offset;
+ eos_eve_write32(addr, dl);
+ _dl_inc(4);
+}
+
+void eos_eve_dl_end(void) {
+ eos_eve_write8(REG_DLSWAP, EVE_DLSWAP_FRAME);
+}
+
+static void _cmd_inc(uint16_t i) {
+ cmd_offset += i;
+ cmd_offset &= 0x0fff;
+}
+
+static void _cmd_begin(uint32_t command) {
+ uint8_t flags = 0;
+
+ if (cmd_burst) {
+ flags = EOS_SPI_FLAG_TX;
+ } else {
+ uint32_t addr = EVE_RAM_CMD + cmd_offset;
+ eos_spi_cs_set();
+ eos_spi_xchg24(addr | MEM_WRITE, 0);
+ }
+ eos_spi_xchg32(command, EOS_SPI_FLAG_BSWAP | flags);
+ _cmd_inc(4);
+}
+
+static void _cmd_end(void) {
+ if (!cmd_burst) eos_spi_cs_clear();
+}
+
+static void _cmd_string(const char *s, uint8_t flags) {
+ int i = 0, p = 0;
+
+ while(s[i] != 0) {
+ eos_spi_xchg8(s[i], EOS_SPI_FLAG_BSWAP | flags);
+ i++;
+ }
+ /* padding */
+ p = i & 3; /* 0, 1, 2 or 3 */
+ p = 4 - p; /* 4, 3, 2 or 1 */
+ i += p;
+
+ while(p > 0)
+ {
+ eos_spi_xchg8(0, EOS_SPI_FLAG_BSWAP | flags);
+ p--;
+ }
+ _cmd_inc(i);
+}
+
+void eos_eve_cmd(uint32_t cmd, const char *fmt, ...) {
+ uint8_t flags = cmd_burst ? EOS_SPI_FLAG_TX : 0;
+ va_list argv;
+ int i;
+
+ va_start(argv, fmt);
+ _cmd_begin(cmd);
+ while (fmt[i]) {
+ switch (fmt[i]) {
+ case 'b':
+ eos_spi_xchg8(va_arg(argv, int), EOS_SPI_FLAG_BSWAP | flags);
+ _cmd_inc(1);
+ break;
+ case 'h':
+ eos_spi_xchg16(va_arg(argv, int), EOS_SPI_FLAG_BSWAP | flags);
+ _cmd_inc(2);
+ break;
+ case 'w':
+ eos_spi_xchg32(va_arg(argv, int), EOS_SPI_FLAG_BSWAP | flags);
+ _cmd_inc(4);
+ break;
+ case 's':
+ _cmd_string(va_arg(argv, const char *), flags);
+ break;
+ }
+ i++;
+ }
+ _cmd_end();
+ va_end(argv);
+}
+
+void eos_eve_cmd_dl(uint32_t dl) {
+ _cmd_begin(dl);
+ _cmd_end();
+}
+
+int eos_eve_cmd_done(void) {
+ uint16_t r = eos_eve_read16(REG_CMD_READ);
+ if (r == 0xfff) {
+ cmd_offset = 0;
+ eos_eve_write8(REG_CPURESET, 1);
+ eos_eve_write16(REG_CMD_READ, 0);
+ eos_eve_write16(REG_CMD_WRITE, 0);
+ eos_eve_write16(REG_CMD_DL, 0);
+ eos_eve_write8(REG_CPURESET, 0);
+ return -1;
+ }
+ return (r == cmd_offset);
+}
+
+int eos_eve_cmd_exec(int w) {
+ eos_eve_write16(REG_CMD_WRITE, cmd_offset);
+ if (w) {
+ int r;
+ do {
+ r = eos_eve_cmd_done();
+ } while (!r);
+ if (r < 0) return EOS_ERR;
+ }
+ return EOS_OK;
+}
+
+void eos_eve_cmd_burst_start(void) {
+ uint32_t addr = EVE_RAM_CMD + cmd_offset;
+ eos_spi_cs_set();
+ eos_spi_xchg24(addr | MEM_WRITE, EOS_SPI_FLAG_TX);
+ cmd_burst = 1;
+}
+
+void eos_eve_cmd_burst_end(void) {
+ eos_spi_cs_clear();
+ cmd_burst = 0;
+}
+
+int eos_eve_init(void) {
+ uint8_t chipid = 0;
+ uint16_t timeout = 0;
+
+ eos_eve_reset();
+ eos_eve_command(EVE_CLKEXT, 0);
+ eos_eve_active(); /* start EVE */
+
+ while(chipid != 0x7C) { /* if chipid is not 0x7c, continue to read it until it is, EVE needs a moment for it's power on self-test and configuration */
+ eos_timer_sleep(1);
+ chipid = eos_eve_read8(REG_ID);
+ timeout++;
+ if (timeout > 400) return EOS_ERR;
+ }
+
+ eos_eve_brightness(0);
+
+ /* Initialize Display */
+ eos_eve_write16(REG_HCYCLE, EVE_HCYCLE); /* total number of clocks per line, incl front/back porch */
+ eos_eve_write16(REG_HOFFSET, EVE_HOFFSET); /* start of active line */
+ eos_eve_write16(REG_HSYNC0, EVE_HSYNC0); /* start of horizontal sync pulse */
+ eos_eve_write16(REG_HSYNC1, EVE_HSYNC1); /* end of horizontal sync pulse */
+ eos_eve_write16(REG_VCYCLE, EVE_VCYCLE); /* total number of lines per screen, including pre/post */
+ eos_eve_write16(REG_VOFFSET, EVE_VOFFSET); /* start of active screen */
+ eos_eve_write16(REG_VSYNC0, EVE_VSYNC0); /* start of vertical sync pulse */
+ eos_eve_write16(REG_VSYNC1, EVE_VSYNC1); /* end of vertical sync pulse */
+ eos_eve_write8(REG_SWIZZLE, EVE_SWIZZLE); /* FT8xx output to LCD - pin order */
+ eos_eve_write8(REG_PCLK_POL, EVE_PCLKPOL); /* LCD data is clocked in on this PCLK edge */
+ eos_eve_write8(REG_CSPREAD, EVE_CSPREAD); /* helps with noise, when set to 1 fewer signals are changed simultaneously, reset-default: 1 */
+ eos_eve_write16(REG_HSIZE, EVE_HSIZE); /* active display width */
+ eos_eve_write16(REG_VSIZE, EVE_VSIZE); /* active display height */
+
+ /* do not set PCLK yet - wait for just after the first display list */
+
+ /* configure Touch */
+ eos_eve_write8(REG_TOUCH_MODE, EVE_TMODE_CONTINUOUS); /* enable touch */
+ eos_eve_write16(REG_TOUCH_RZTHRESH, EVE_TOUCH_RZTHRESH); /* eliminate any false touches */
+
+ /* disable Audio for now */
+ eos_eve_write8(REG_VOL_PB, 0x00); /* turn recorded audio volume down */
+ eos_eve_write8(REG_VOL_SOUND, 0x00); /* turn synthesizer volume off */
+ eos_eve_write16(REG_SOUND, 0x6000); /* set synthesizer to mute */
+
+ /* write a basic display-list to get things started */
+ eos_eve_dl_start();
+ eos_eve_dl_write(DL_CLEAR_RGB);
+ eos_eve_dl_write(DL_CLEAR | CLR_COL | CLR_STN | CLR_TAG);
+ eos_eve_dl_write(DL_DISPLAY);
+ eos_eve_dl_end();
+
+ /* nothing is being displayed yet... the pixel clock is still 0x00 */
+ eos_eve_write8(REG_GPIO, 0x80); /* enable the DISP signal to the LCD panel, it is set to output in REG_GPIO_DIR by default */
+ eos_eve_write8(REG_PCLK, EVE_PCLK); /* now start clocking data to the LCD panel */
+
+ eos_timer_sleep(500);
+ eos_eve_standby();
+
+ return EOS_OK;
+}
+
diff --git a/code/fe310/eos/eve.h b/code/fe310/eos/eve.h
new file mode 100644
index 0000000..b3c7ec2
--- /dev/null
+++ b/code/fe310/eos/eve.h
@@ -0,0 +1,32 @@
+#include <stdint.h>
+
+#include "eve_def.h"
+
+void eos_eve_command(uint8_t command, uint8_t parameter);
+
+uint8_t eos_eve_read8(uint32_t addr);
+uint16_t eos_eve_read16(uint32_t addr);
+uint32_t eos_eve_read32(uint32_t addr);
+void eos_eve_write8(uint32_t addr, uint8_t data);
+void eos_eve_write16(uint32_t addr, uint16_t data);
+void eos_eve_write32(uint32_t addr, uint32_t data);
+
+void eos_eve_active(void);
+void eos_eve_standby(void);
+void eos_eve_sleep(void);
+void eos_eve_reset(void);
+void eos_eve_brightness(uint8_t b);
+
+void eos_eve_dl_start(void);
+void eos_eve_dl_write(uint32_t dl);
+void eos_eve_dl_end(void);
+
+void eos_eve_cmd(uint32_t cmd, const char *fmt, ...);
+void eos_eve_cmd_dl(uint32_t dl);
+int eos_eve_cmd_done(void);
+int eos_eve_cmd_exec(int w);
+void eos_eve_cmd_burst_start(void);
+void eos_eve_cmd_burst_end(void);
+
+int eos_eve_init(void);
+
diff --git a/code/fe310/eos/eve_config.h b/code/fe310/eos/eve_config.h
new file mode 100755
index 0000000..bbfc0f0
--- /dev/null
+++ b/code/fe310/eos/eve_config.h
@@ -0,0 +1,79 @@
+/*
+@file EVE_config.h
+@brief configuration information for some TFTs
+@version 4.0
+@date 2019-09-14
+@author Rudolph Riedel
+
+@section LICENSE
+
+MIT License
+
+Copyright (c) 2016-2019 Rudolph Riedel
+
+Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"),
+to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute,
+sublicense, and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions:
+
+The above copyright notice and this permission notice shall be included in all copies or substantial portions of the Software.
+
+THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+
+@section History
+
+4.0
+- renamed from EVE_config.h to EVE_config.h
+- renamed EVE_81X_ENABLE to FT81X_ENABLE
+- added a fictitious BT81x entry under the made-up name EVE_EVE3_70G, just to see the project compile with additional BT81x includes and functions
+- added profiles for the BT81x 4.3", 5" and 7" modules from Riverdi - the only tested is the 4.3" with a RVT43ULBNWC00
+- moved all target specific lines from EVE_config.h to EVE_target.h
+- cleaned up history
+- added profiles for EVE3-35G, EVE3-43G, EVE3-50G
+- added a profile for the CFAF800480E0-050SC from Crystalfontz
+- changed EVE_RiTFT50 to use the RVT70 config instead of the RVT50 config since RVT50 uses a different HOFFSET value
+- added EVE_PAF90, a profile for the PAF90B5WFNWC01 from Panasys
+
+*/
+
+#ifndef EVE_CONFIG_H_
+#define EVE_CONFIG_H_
+
+/* my display */
+
+#define EVE_TH 1200L
+#define EVE_THD 800L
+#define EVE_THF 210L
+#define EVE_THP 20L
+#define EVE_THB 46L
+
+#define EVE_TV 650L
+#define EVE_TVD 480L
+#define EVE_TVF 22L
+#define EVE_TVP 12L
+#define EVE_TVB 23L
+
+
+#define EVE_HSIZE (EVE_THD) /* Thd Length of visible part of line (in PCLKs) - display width */
+#define EVE_HSYNC0 (EVE_THF) /* Thf Horizontal Front Porch */
+#define EVE_HSYNC1 (EVE_THF + EVE_THP) /* Thf + Thp Horizontal Front Porch plus Hsync Pulse width */
+#define EVE_HOFFSET (EVE_THF + EVE_THP + EVE_THB) /* Thf + Thp + Thb Length of non-visible part of line (in PCLK cycles) */
+#define EVE_HCYCLE (EVE_TH) /* Th Total length of line (visible and non-visible) (in PCLKs) */
+
+#define EVE_VSIZE (EVE_TVD) /* Tvd Number of visible lines (in lines) - display height */
+#define EVE_VSYNC0 (EVE_TVF) /* Tvf Vertical Front Porch */
+#define EVE_VSYNC1 (EVE_TVF + EVE_TVP) /* Tvf + Tvp Vertical Front Porch plus Vsync Pulse width */
+#define EVE_VOFFSET (EVE_TVF + EVE_TVP + EVE_TVB) /* Tvf + Tvp + Tvb Number of non-visible lines (in lines) */
+#define EVE_VCYCLE (EVE_TV) /* Tv Total number of lines (visible and non-visible) (in lines) */
+
+#define EVE_PCLKPOL (1L) /* PCLK polarity (0 = rising edge, 1 = falling edge) */
+#define EVE_SWIZZLE (0L) /* Defines the arrangement of the RGB pins of the FT800 */
+#define EVE_PCLK (2L) /* 60MHz / REG_PCLK = PCLK frequency - 30 MHz */
+#define EVE_CSPREAD (1L) /* helps with noise, when set to 1 fewer signals are changed simultaneously, reset-default: 1 */
+#define EVE_TOUCH_RZTHRESH (1200L) /* touch-sensitivity */
+#define EVE_HAS_CRYSTAL
+#define FT81X_ENABLE
+
+#endif /* EVE_CONFIG_H */
diff --git a/code/fe310/eos/eve_def.h b/code/fe310/eos/eve_def.h
new file mode 100755
index 0000000..25e4927
--- /dev/null
+++ b/code/fe310/eos/eve_def.h
@@ -0,0 +1,872 @@
+/*
+@file EVE.h
+@brief Contains FT80x/FT81x/BT81x API definitions
+@version 4.0
+@date 2019-11-17
+@author Rudolph Riedel
+
+@section LICENSE
+
+MIT License
+
+Copyright (c) 2016-2019 Rudolph Riedel
+
+Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"),
+to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute,
+sublicense, and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions:
+
+The above copyright notice and this permission notice shall be included in all copies or substantial portions of the Software.
+
+THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+
+@section History
+
+2.1
+- changes to this header
+
+2.2
+- commented out "#define DISPLAY() ((0UL<<24))" as it collides with a define in the Arduino IDE - the whole section of "macros" needs a rework...
+
+3.0
+- renamed from FT800.h to FT8.h
+- changed FT_ prefixes to FT8_
+- switched to standard-C compliant comment-style
+- changed FT81x register definitions from decimal to hex
+- verified all FT81x register definitions
+- moved FT81x registers marked as "reserved" to an #if 0 block
+
+3.1
+- moved several undocumented commands to an #if 0 block
+
+3.2
+- moved CMD_CRC to the block of undocumented commands as well
+
+3.3
+- changed macros BITMAP_LAYOUT_H and BITMAP_SIZE_H as submitted to github by "jventerprises"
+ These macros provide the extended bits for bitmaps bigger than 511 pixels, FTDIs original implementation that I used and never touched takes the arguments
+ as already processed and not the original values.
+ Note the one example in "FT81x Series Programmers Guide" Version 1.1 for displaying a 800x480 sized bitmap:
+ dl(BITMAP_SIZE_H(1, 0));
+ dl(BITMAP_SIZE(NEAREST, BORDER, BORDER, 288, 480));
+ Now you can use it like this:
+ EVE_cmd_dl(BITMAP_SIZE_H(800, 480));
+ EVE_cmd_dl(BITMAP_SIZE(NEAREST, BORDER, BORDER, 800, 480));
+
+4.0
+- renamed from FT8.h to EVE.h
+- renamed EVE_81X_ENABLE to FT81X_ENABLE
+- changed FT8_ prefixes to EVE_
+- rearranged things a bit with FT80x specific includes moved to the end and a "#if defined (BT81X_ENABLE)" block on top of the chip-specific includes
+- started to add specific BT81x defines
+- minor maintenance
+- changed OPT_FLASH to EVE_OPT_FLASH and OPT_FORMAT to EVE_OPT_FORMAT for consistency
+- added EVE_OPT_FILL which has been left out of the documentation for the BT81x so far
+- added a few BT81x specific macros
+- added a few FT81x/BT81x specific host commands
+- removed the preceding underscore from the include guard define to avoid potential undefined behavior
+- removed a bunch of defines for FT80x that I never implemented for FT81x
+
+*/
+
+#include "eve_config.h"
+
+#ifndef EVE_H_
+#define EVE_H_
+
+
+#define DL_CLEAR 0x26000000UL /* requires OR'd arguments */
+#define DL_CLEAR_RGB 0x02000000UL /* requires OR'd arguments */
+#define DL_COLOR_RGB 0x04000000UL /* requires OR'd arguments */
+#define DL_POINT_SIZE 0x0D000000UL /* requires OR'd arguments */
+#define DL_END 0x21000000UL
+#define DL_BEGIN 0x1F000000UL /* requires OR'd arguments */
+#define DL_DISPLAY 0x00000000UL
+
+#define CLR_COL 0x4
+#define CLR_STN 0x2
+#define CLR_TAG 0x1
+
+
+/* Host commands */
+#define EVE_ACTIVE 0x00 /* place FT8xx in active state */
+#define EVE_STANDBY 0x41 /* place FT8xx in Standby (clk running) */
+#define EVE_SLEEP 0x42 /* place FT8xx in Sleep (clk off) */
+#define EVE_PWRDOWN 0x50 /* place FT8xx in Power Down (core off) */
+#define EVE_CLKEXT 0x44 /* select external clock source */
+#define EVE_CLKINT 0x48 /* select internal clock source */
+#define EVE_CORERST 0x68 /* reset core - all registers default and processors reset */
+#define EVE_CLK48M 0x62 /* select 48MHz PLL output */
+#define EVE_CLK36M 0x61 /* select 36MHz PLL output */
+
+
+/* defines used for graphics commands */
+#define EVE_NEVER 0UL
+#define EVE_LESS 1UL
+#define EVE_LEQUAL 2UL
+#define EVE_GREATER 3UL
+#define EVE_GEQUAL 4UL
+#define EVE_EQUAL 5UL
+#define EVE_NOTEQUAL 6UL
+#define EVE_ALWAYS 7UL
+
+
+/* Bitmap formats */
+#define EVE_ARGB1555 0UL
+#define EVE_L1 1UL
+#define EVE_L4 2UL
+#define EVE_L8 3UL
+#define EVE_RGB332 4UL
+#define EVE_ARGB2 5UL
+#define EVE_ARGB4 6UL
+#define EVE_RGB565 7UL
+#define EVE_PALETTED 8UL
+#define EVE_TEXT8X8 9UL
+#define EVE_TEXTVGA 10UL
+#define EVE_BARGRAPH 11UL
+
+
+/* Bitmap filter types */
+#define EVE_NEAREST 0UL
+#define EVE_BILINEAR 1UL
+
+
+/* Bitmap wrap types */
+#define EVE_BORDER 0UL
+#define EVE_REPEAT 1UL
+
+
+/* Stencil defines */
+#define EVE_KEEP 1UL
+#define EVE_REPLACE 2UL
+#define EVE_INCR 3UL
+#define EVE_DECR 4UL
+#define EVE_INVERT 5UL
+
+
+/* Graphics display list swap defines */
+#define EVE_DLSWAP_DONE 0UL
+#define EVE_DLSWAP_LINE 1UL
+#define EVE_DLSWAP_FRAME 2UL
+
+
+/* Interrupt bits */
+#define EVE_INT_SWAP 0x01
+#define EVE_INT_TOUCH 0x02
+#define EVE_INT_TAG 0x04
+#define EVE_INT_SOUND 0x08
+#define EVE_INT_PLAYBACK 0x10
+#define EVE_INT_CMDEMPTY 0x20
+#define EVE_INT_CMDFLAG 0x40
+#define EVE_INT_CONVCOMPLETE 0x80
+
+
+/* Touch mode */
+#define EVE_TMODE_OFF 0
+#define EVE_TMODE_ONESHOT 1
+#define EVE_TMODE_FRAME 2
+#define EVE_TMODE_CONTINUOUS 3
+
+
+/* Alpha blending */
+#define EVE_ZERO 0UL
+#define EVE_ONE 1UL
+#define EVE_SRC_ALPHA 2UL
+#define EVE_DST_ALPHA 3UL
+#define EVE_ONE_MINUS_SRC_ALPHA 4UL
+#define EVE_ONE_MINUS_DST_ALPHA 5UL
+
+
+/* Graphics primitives */
+#define EVE_BITMAPS 1UL
+#define EVE_POINTS 2UL
+#define EVE_LINES 3UL
+#define EVE_LINE_STRIP 4UL
+#define EVE_EDGE_STRIP_R 5UL
+#define EVE_EDGE_STRIP_L 6UL
+#define EVE_EDGE_STRIP_A 7UL
+#define EVE_EDGE_STRIP_B 8UL
+#define EVE_RECTS 9UL
+
+
+/* Widget command */
+#define EVE_OPT_MONO 1
+#define EVE_OPT_NODL 2
+#define EVE_OPT_FLAT 256
+#define EVE_OPT_CENTERX 512
+#define EVE_OPT_CENTERY 1024
+#define EVE_OPT_CENTER (EVE_OPT_CENTERX | EVE_OPT_CENTERY)
+#define EVE_OPT_NOBACK 4096
+#define EVE_OPT_NOTICKS 8192
+#define EVE_OPT_NOHM 16384
+#define EVE_OPT_NOPOINTER 16384
+#define EVE_OPT_NOSECS 32768
+#define EVE_OPT_NOHANDS 49152
+#define EVE_OPT_RIGHTX 2048
+#define EVE_OPT_SIGNED 256
+
+
+/* Defines related to inbuilt font */
+#define EVE_NUMCHAR_PERFONT (128L) /* number of font characters per bitmap handle */
+#define EVE_FONT_TABLE_SIZE (148L) /* size of the font table - utilized for loopup by the graphics engine */
+#define EVE_FONT_TABLE_POINTER (0xFFFFCUL) /* pointer to the inbuilt font tables starting from bitmap handle 16 */
+
+
+/* Audio sample type defines */
+#define EVE_LINEAR_SAMPLES 0UL /* 8bit signed samples */
+#define EVE_ULAW_SAMPLES 1UL /* 8bit ulaw samples */
+#define EVE_ADPCM_SAMPLES 2UL /* 4bit ima adpcm samples */
+
+
+/* Synthesized sound */
+#define EVE_SILENCE 0x00
+#define EVE_SQUAREWAVE 0x01
+#define EVE_SINEWAVE 0x02
+#define EVE_SAWTOOTH 0x03
+#define EVE_TRIANGLE 0x04
+#define EVE_BEEPING 0x05
+#define EVE_ALARM 0x06
+#define EVE_WARBLE 0x07
+#define EVE_CAROUSEL 0x08
+#define EVE_PIPS(n) (0x0F + (n))
+#define EVE_HARP 0x40
+#define EVE_XYLOPHONE 0x41
+#define EVE_TUBA 0x42
+#define EVE_GLOCKENSPIEL 0x43
+#define EVE_ORGAN 0x44
+#define EVE_TRUMPET 0x45
+#define EVE_PIANO 0x46
+#define EVE_CHIMES 0x47
+#define EVE_MUSICBOX 0x48
+#define EVE_BELL 0x49
+#define EVE_CLICK 0x50
+#define EVE_SWITCH 0x51
+#define EVE_COWBELL 0x52
+#define EVE_NOTCH 0x53
+#define EVE_HIHAT 0x54
+#define EVE_KICKDRUM 0x55
+#define EVE_POP 0x56
+#define EVE_CLACK 0x57
+#define EVE_CHACK 0x58
+#define EVE_MUTE 0x60
+#define EVE_UNMUTE 0x61
+
+
+/* Synthesized sound frequencies, midi note */
+#define EVE_MIDI_A0 21
+#define EVE_MIDI_A_0 22
+#define EVE_MIDI_B0 23
+#define EVE_MIDI_C1 24
+#define EVE_MIDI_C_1 25
+#define EVE_MIDI_D1 26
+#define EVE_MIDI_D_1 27
+#define EVE_MIDI_E1 28
+#define EVE_MIDI_F1 29
+#define EVE_MIDI_F_1 30
+#define EVE_MIDI_G1 31
+#define EVE_MIDI_G_1 32
+#define EVE_MIDI_A1 33
+#define EVE_MIDI_A_1 34
+#define EVE_MIDI_B1 35
+#define EVE_MIDI_C2 36
+#define EVE_MIDI_C_2 37
+#define EVE_MIDI_D2 38
+#define EVE_MIDI_D_2 39
+#define EVE_MIDI_E2 40
+#define EVE_MIDI_F2 41
+#define EVE_MIDI_F_2 42
+#define EVE_MIDI_G2 43
+#define EVE_MIDI_G_2 44
+#define EVE_MIDI_A2 45
+#define EVE_MIDI_A_2 46
+#define EVE_MIDI_B2 47
+#define EVE_MIDI_C3 48
+#define EVE_MIDI_C_3 49
+#define EVE_MIDI_D3 50
+#define EVE_MIDI_D_3 51
+#define EVE_MIDI_E3 52
+#define EVE_MIDI_F3 53
+#define EVE_MIDI_F_3 54
+#define EVE_MIDI_G3 55
+#define EVE_MIDI_G_3 56
+#define EVE_MIDI_A3 57
+#define EVE_MIDI_A_3 58
+#define EVE_MIDI_B3 59
+#define EVE_MIDI_C4 60
+#define EVE_MIDI_C_4 61
+#define EVE_MIDI_D4 62
+#define EVE_MIDI_D_4 63
+#define EVE_MIDI_E4 64
+#define EVE_MIDI_F4 65
+#define EVE_MIDI_F_4 66
+#define EVE_MIDI_G4 67
+#define EVE_MIDI_G_4 68
+#define EVE_MIDI_A4 69
+#define EVE_MIDI_A_4 70
+#define EVE_MIDI_B4 71
+#define EVE_MIDI_C5 72
+#define EVE_MIDI_C_5 73
+#define EVE_MIDI_D5 74
+#define EVE_MIDI_D_5 75
+#define EVE_MIDI_E5 76
+#define EVE_MIDI_F5 77
+#define EVE_MIDI_F_5 78
+#define EVE_MIDI_G5 79
+#define EVE_MIDI_G_5 80
+#define EVE_MIDI_A5 81
+#define EVE_MIDI_A_5 82
+#define EVE_MIDI_B5 83
+#define EVE_MIDI_C6 84
+#define EVE_MIDI_C_6 85
+#define EVE_MIDI_D6 86
+#define EVE_MIDI_D_6 87
+#define EVE_MIDI_E6 88
+#define EVE_MIDI_F6 89
+#define EVE_MIDI_F_6 90
+#define EVE_MIDI_G6 91
+#define EVE_MIDI_G_6 92
+#define EVE_MIDI_A6 93
+#define EVE_MIDI_A_6 94
+#define EVE_MIDI_B6 95
+#define EVE_MIDI_C7 96
+#define EVE_MIDI_C_7 97
+#define EVE_MIDI_D7 98
+#define EVE_MIDI_D_7 99
+#define EVE_MIDI_E7 100
+#define EVE_MIDI_F7 101
+#define EVE_MIDI_F_7 102
+#define EVE_MIDI_G7 103
+#define EVE_MIDI_G_7 104
+#define EVE_MIDI_A7 105
+#define EVE_MIDI_A_7 106
+#define EVE_MIDI_B7 107
+#define EVE_MIDI_C8 108
+
+
+/* GPIO bits */
+#define EVE_GPIO0 0
+#define EVE_GPIO1 1 /* default gpio pin for audio shutdown, 1 - enable, 0 - disable */
+#define EVE_GPIO7 7 /* default gpio pin for display enable, 1 - enable, 0 - disable */
+
+
+/* Display rotation */
+#define EVE_DISPLAY_0 0 /* 0 degrees rotation */
+#define EVE_DISPLAY_180 1 /* 180 degrees rotation */
+
+
+/* commands common to EVE/EVE2/EVE3 */
+#define CMD_APPEND 0xFFFFFF1E
+#define CMD_BGCOLOR 0xFFFFFF09
+#define CMD_BUTTON 0xFFFFFF0D
+#define CMD_CALIBRATE 0xFFFFFF15
+#define CMD_CLOCK 0xFFFFFF14
+#define CMD_COLDSTART 0xFFFFFF32
+#define CMD_DIAL 0xFFFFFF2D
+#define CMD_DLSTART 0xFFFFFF00
+#define CMD_FGCOLOR 0xFFFFFF0A
+#define CMD_GAUGE 0xFFFFFF13
+#define CMD_GETMATRIX 0xFFFFFF33
+#define CMD_GETPROPS 0xFFFFFF25
+#define CMD_GETPTR 0xFFFFFF23
+#define CMD_GRADCOLOR 0xFFFFFF34
+#define CMD_GRADIENT 0xFFFFFF0B
+#define CMD_INFLATE 0xFFFFFF22
+#define CMD_INTERRUPT 0xFFFFFF02
+#define CMD_KEYS 0xFFFFFF0E
+#define CMD_LOADIDENTITY 0xFFFFFF26
+#define CMD_LOADIMAGE 0xFFFFFF24
+#define CMD_LOGO 0xFFFFFF31
+#define CMD_MEMCPY 0xFFFFFF1D
+#define CMD_MEMCRC 0xFFFFFF18
+#define CMD_MEMSET 0xFFFFFF1B
+#define CMD_MEMWRITE 0xFFFFFF1A
+#define CMD_MEMZERO 0xFFFFFF1C
+#define CMD_NUMBER 0xFFFFFF2E
+#define CMD_PROGRESS 0xFFFFFF0F
+#define CMD_REGREAD 0xFFFFFF19
+#define CMD_ROTATE 0xFFFFFF29
+#define CMD_SCALE 0xFFFFFF28
+#define CMD_SCREENSAVER 0xFFFFFF2F
+#define CMD_SCROLLBAR 0xFFFFFF11
+#define CMD_SETFONT 0xFFFFFF2B
+#define CMD_SETMATRIX 0xFFFFFF2A
+#define CMD_SKETCH 0xFFFFFF30
+#define CMD_SLIDER 0xFFFFFF10
+#define CMD_SNAPSHOT 0xFFFFFF1F
+#define CMD_SPINNER 0xFFFFFF16
+#define CMD_STOP 0xFFFFFF17
+#define CMD_SWAP 0xFFFFFF01
+#define CMD_TEXT 0xFFFFFF0C
+#define CMD_TOGGLE 0xFFFFFF12
+#define CMD_TRACK 0xFFFFFF2C
+#define CMD_TRANSLATE 0xFFFFFF27
+
+
+/* the following are undocumented commands that therefore should not be used */
+#if 0
+#define CMD_CRC 0xFFFFFF03
+#define CMD_HAMMERAUX 0xFFFFFF04
+#define CMD_MARCH 0xFFFFFF05
+#define CMD_IDCT 0xFFFFFF06
+#define CMD_EXECUTE 0xFFFFFF07
+#define CMD_GETPOINT 0xFFFFFF08
+#define CMD_TOUCH_TRANSFORM 0xFFFFFF20
+#endif
+
+
+/* FT8xx graphics engine specific macros useful for static display list generation */
+#define ALPHA_FUNC(func,ref) ((9UL<<24)|(((func)&7UL)<<8)|(((ref)&255UL)<<0))
+#define BEGIN(prim) ((31UL<<24)|(((prim)&15UL)<<0))
+#define BITMAP_HANDLE(handle) ((5UL<<24)|(((handle)&31UL)<<0))
+#define BITMAP_LAYOUT(format,linestride,height) ((7UL<<24)|(((format)&31UL)<<19)|(((linestride)&1023UL)<<9)|(((height)&511UL)<<0))
+#define BITMAP_SIZE(filter,wrapx,wrapy,width,height) ((8UL<<24)|(((filter)&1UL)<<20)|(((wrapx)&1UL)<<19)|(((wrapy)&1UL)<<18)|(((width)&511UL)<<9)|(((height)&511UL)<<0))
+#define BITMAP_TRANSFORM_A(a) ((21UL<<24)|(((a)&131071UL)<<0))
+#define BITMAP_TRANSFORM_B(b) ((22UL<<24)|(((b)&131071UL)<<0))
+#define BITMAP_TRANSFORM_C(c) ((23UL<<24)|(((c)&16777215UL)<<0))
+#define BITMAP_TRANSFORM_D(d) ((24UL<<24)|(((d)&131071UL)<<0))
+#define BITMAP_TRANSFORM_E(e) ((25UL<<24)|(((e)&131071UL)<<0))
+#define BITMAP_TRANSFORM_F(f) ((26UL<<24)|(((f)&16777215UL)<<0))
+#define BLEND_FUNC(src,dst) ((11UL<<24)|(((src)&7UL)<<3)|(((dst)&7UL)<<0))
+#define CALL(dest) ((29UL<<24)|(((dest)&65535UL)<<0))
+#define CELL(cell) ((6UL<<24)|(((cell)&127UL)<<0))
+#define CLEAR(c,s,t) ((38UL<<24)|(((c)&1UL)<<2)|(((s)&1UL)<<1)|(((t)&1UL)<<0))
+#define CLEAR_COLOR_A(alpha) ((15UL<<24)|(((alpha)&255UL)<<0))
+#define CLEAR_COLOR_RGB(red,green,blue) ((2UL<<24)|(((red)&255UL)<<16)|(((green)&255UL)<<8)|(((blue)&255UL)<<0))
+#define CLEAR_STENCIL(s) ((17UL<<24)|(((s)&255UL)<<0))
+#define CLEAR_TAG(s) ((18UL<<24)|(((s)&255UL)<<0))
+#define COLOR_A(alpha) ((16UL<<24)|(((alpha)&255UL)<<0))
+#define COLOR_MASK(r,g,b,a) ((32UL<<24)|(((r)&1UL)<<3)|(((g)&1UL)<<2)|(((b)&1UL)<<1)|(((a)&1UL)<<0))
+#define COLOR_RGB(red,green,blue) ((4UL<<24)|(((red)&255UL)<<16)|(((green)&255UL)<<8)|(((blue)&255UL)<<0))
+#define DISPLAY() ((0UL<<24))
+#define END() ((33UL<<24))
+#define JUMP(dest) ((30UL<<24)|(((dest)&65535UL)<<0))
+#define LINE_WIDTH(width) ((14UL<<24)|(((width)&4095UL)<<0))
+#define MACRO(m) ((37UL<<24)|(((m)&1UL)<<0))
+#define POINT_SIZE(size) ((13UL<<24)|(((size)&8191UL)<<0))
+#define RESTORE_CONTEXT() ((35UL<<24))
+#define RETURN() ((36UL<<24))
+#define SAVE_CONTEXT() ((34UL<<24))
+#define STENCIL_FUNC(func,ref,mask) ((10UL<<24)|(((func)&7UL)<<16)|(((ref)&255UL)<<8)|(((mask)&255UL)<<0))
+#define STENCIL_MASK(mask) ((19UL<<24)|(((mask)&255UL)<<0))
+#define STENCIL_OP(sfail,spass) ((12UL<<24)|(((sfail)&7UL)<<3)|(((spass)&7UL)<<0))
+#define TAG(s) ((3UL<<24)|(((s)&255UL)<<0))
+#define TAG_MASK(mask) ((20UL<<24)|(((mask)&1UL)<<0))
+#define VERTEX2F(x,y) ((1UL<<30)|(((x)&32767UL)<<15)|(((y)&32767UL)<<0))
+#define VERTEX2II(x,y,handle,cell) ((2UL<<30)|(((x)&511UL)<<21)|(((y)&511UL)<<12)|(((handle)&31UL)<<7)|(((cell)&127UL)<<0))
+
+
+/* ----------------- BT81x exclusive definitions -----------------*/
+#if defined (BT81X_ENABLE)
+
+#define EVE_GLFORMAT 31UL /* used with BITMAP_LAYOUT to indicate bitmap-format is specified by BITMAP_EXT_FORMAT */
+
+#define DL_BITMAP_EXT_FORMAT 0x2E000000 /* requires OR'd arguments */
+
+/* extended Bitmap formats */
+#define EVE_COMPRESSED_RGBA_ASTC_4x4_KHR 37808UL
+#define EVE_COMPRESSED_RGBA_ASTC_5x4_KHR 37809UL
+#define EVE_COMPRESSED_RGBA_ASTC_5x5_KHR 37810UL
+#define EVE_COMPRESSED_RGBA_ASTC_6x5_KHR 37811UL
+#define EVE_COMPRESSED_RGBA_ASTC_6x6_KHR 37812UL
+#define EVE_COMPRESSED_RGBA_ASTC_8x5_KHR 37813UL
+#define EVE_COMPRESSED_RGBA_ASTC_8x6_KHR 37814UL
+#define EVE_COMPRESSED_RGBA_ASTC_8x8_KHR 37815UL
+#define EVE_COMPRESSED_RGBA_ASTC_10x5_KHR 37816UL
+#define EVE_COMPRESSED_RGBA_ASTC_10x6_KHR 37817UL
+#define EVE_COMPRESSED_RGBA_ASTC_10x8_KHR 37818UL
+#define EVE_COMPRESSED_RGBA_ASTC_10x10_KHR 37819UL
+#define EVE_COMPRESSED_RGBA_ASTC_12x10_KHR 37820UL
+#define EVE_COMPRESSED_RGBA_ASTC_12x12_KHR 37821UL
+
+
+#define EVE_RAM_ERR_REPORT 0x309800UL /* max 128 bytes null terminated string */
+#define EVE_RAM_FLASH 0x800000UL
+#define EVE_RAM_FLASH_POSTBLOB 0x801000UL
+
+#define EVE_OPT_FLASH 64UL
+#define EVE_OPT_FORMAT 4096UL
+#define EVE_OPT_FILL 8192UL
+
+
+/* additional commands for BT81x */
+#define CMD_BITMAP_TRANSFORM 0xFFFFFF21
+#define CMD_SYNC 0xFFFFFF42 /* does not need a dedicated function, just use EVE_cmd_dl(CMD_SYNC) */
+#define CMD_FLASHERASE 0xFFFFFF44 /* does not need a dedicated function, just use EVE_cmd_dl(CMD_FLASHERASE) */
+#define CMD_FLASHWRITE 0xFFFFFF45
+#define CMD_FLASHREAD 0xFFFFFF46
+#define CMD_FLASHUPDATE 0xFFFFFF47
+#define CMD_FLASHDETACH 0xFFFFFF48 /* does not need a dedicated function, just use EVE_cmd_dl(CMD_FLASHDETACH) */
+#define CMD_FLASHATTACH 0xFFFFFF49 /* does not need a dedicated function, just use EVE_cmd_dl(CMD_FLASHATTACH) */
+#define CMD_FLASHFAST 0xFFFFFF4A
+#define CMD_FLASHSPIDESEL 0xFFFFFF4B /* does not need a dedicated function, just use EVE_cmd_dl(CMD_FLASHSPIDESEL) */
+#define CMD_FLASHSPITX 0xFFFFFF4C
+#define CMD_FLASHSPIRX 0xFFFFFF4D
+#define CMD_FLASHSOURCE 0xFFFFFF4E
+#define CMD_CLEARCACHE 0xFFFFFF4F /* does not need a dedicated function, just use EVE_cmd_dl(CMD_CLEARCACHE) */
+#define CMD_INFLATE2 0xFFFFFF50
+#define CMD_ROTATEAROUND 0xFFFFFF51
+#define CMD_RESETFONTS 0xFFFFFF52 /* does not need a dedicated function, just use EVE_cmd_dl(CMD_RESETFONTS) */
+#define CMD_ANIMSTART 0xFFFFFF53
+#define CMD_ANIMSTOP 0xFFFFFF54
+#define CMD_ANIMXY 0xFFFFFF55
+#define CMD_ANIMDRAW 0xFFFFFF56
+#define CMD_GRADIENTA 0xFFFFFF57
+#define CMD_FILLWIDTH 0xFFFFFF58
+#define CMD_APPENDF 0xFFFFFF59
+#define CMD_ANIMFRAME 0xFFFFFF5A
+#define CMD_VIDEOSTARTF 0xFFFFFF5F /* does not need a dedicated function, just use EVE_cmd_dl(CMD_VIDEOSTARTF) */
+
+#if 0
+/* some undocumented commands for BT81x */
+#define CMD_NOP 0xFFFFFF5B
+#define CMD_SHA1 0xFFFFFF5C
+#define CMD_HMAC 0xFFFFFF5D
+#define CMD_LAST_ 0xFFFFFF5E
+
+#endif
+
+
+/* additional registers for BT81x */
+#define REG_ADAPTIVE_FRAMERATE 0x30257cUL
+#define REG_PLAYBACK_PAUSE 0x3025ecUL
+#define REG_FLASH_STATUS 0x3025f0UL
+#define REG_FLASH_SIZE 0x309024UL
+#define REG_PLAY_CONTROL 0x30914eUL
+#define REG_COPRO_PATCH_DTR 0x309162UL
+
+
+/* BT81x graphics engine specific macros */
+#define BITMAP_EXT_FORMAT(format) ((46UL<<24)|(((format)&65535UL)<<0))
+#define BITMAP_SWIZZLE(r,g,b,a) ((47UL<<24)|(((r)&7UL)<<9)|(((g)&7UL)<<6)|(((b)&7UL)<<3)|(((a)&7UL)<<0))
+#define BITMAP_SOURCE2(flash_or_ram, addr) ((1UL<<24)|((flash_or_ram) << 23)|(((addr)&8388607UL)<<0))
+#define INT_FRR() ((48UL<<24))
+
+#undef BITMAP_TRANSFORM_A
+#undef BITMAP_TRANSFORM_B
+#undef BITMAP_TRANSFORM_D
+#undef BITMAP_TRANSFORM_E
+
+#define BITMAP_TRANSFORM_A_EXT(p,v) ((21UL<<24)|(((p)&1UL)<<17)|(((v)&131071UL)<<0))
+#define BITMAP_TRANSFORM_B_EXT(p,v) ((22UL<<24)|(((p)&1UL)<<17)|(((v)&131071UL)<<0))
+#define BITMAP_TRANSFORM_D_EXT(p,v) ((24UL<<24)|(((p)&1UL)<<17)|(((v)&131071UL)<<0))
+#define BITMAP_TRANSFORM_E_EXT(p,v) ((25UL<<24)|(((p)&1UL)<<17)|(((v)&131071UL)<<0))
+
+#define BITMAP_TRANSFORM_A(a) BITMAP_TRANSFORM_A_EXT(0,a)
+#define BITMAP_TRANSFORM_B(b) BITMAP_TRANSFORM_B_EXT(0,b)
+#define BITMAP_TRANSFORM_D(d) BITMAP_TRANSFORM_D_EXT(0,d)
+#define BITMAP_TRANSFORM_E(e) BITMAP_TRANSFORM_E_EXT(0,e)
+
+#endif
+
+/* ----------------- FT81x / BT81x exclusive definitions -----------------*/
+#if defined (FT81X_ENABLE)
+
+
+/* Host commands */
+#define EVE_CLKSEL 0x61 /* configure system clock */
+#define EVE_RST_PULSE 0x68 /* reset core - all registers default and processors reset */
+#define EVE_PINDRIVE 0x70 /* setup drive strength for various pins */
+#define EVE_PIN_PD_STATE 0x71 /* setup how pins behave during power down */
+
+
+/* Memory definitions */
+#define EVE_RAM_G 0x000000UL
+#define EVE_ROM_CHIPID 0x0C0000UL
+#define EVE_ROM_FONT 0x1E0000UL
+#define EVE_ROM_FONT_ADDR 0x2FFFFCUL
+#define EVE_RAM_DL 0x300000UL
+#define EVE_RAM_REG 0x302000UL
+#define EVE_RAM_CMD 0x308000UL
+
+
+/* Memory buffer sizes */
+#define EVE_RAM_G_SIZE 1024*1024L
+#define EVE_CMDFIFO_SIZE 4*1024L
+#define EVE_RAM_DL_SIZE 8*1024L
+
+
+/* various additional defines for FT81x */
+#define EVE_ADC_DIFFERENTIAL 1UL
+#define EVE_ADC_SINGLE_ENDED 0UL
+
+#define EVE_INT_G8 18UL
+#define EVE_INT_L8C 12UL
+#define EVE_INT_VGA 13UL
+
+#define EVE_OPT_MEDIAFIFO 16UL
+#define EVE_OPT_FULLSCREEN 8UL
+#define EVE_OPT_NOTEAR 4UL
+#define EVE_OPT_SOUND 32UL
+
+#define EVE_PALETTED565 14UL
+#define EVE_PALETTED4444 15UL
+#define EVE_PALETTED8 16UL
+#define EVE_L2 17UL
+
+
+/* additional commands for FT81x */
+#define CMD_MEDIAFIFO 0xFFFFFF39
+#define CMD_PLAYVIDEO 0xFFFFFF3A
+#define CMD_ROMFONT 0xFFFFFF3F
+#define CMD_SETBASE 0xFFFFFF38
+#define CMD_SETBITMAP 0xFFFFFF43
+#define CMD_SETFONT2 0xFFFFFF3B
+#define CMD_SETROTATE 0xFFFFFF36
+#define CMD_SETSCRATCH 0xFFFFFF3C
+#define CMD_SNAPSHOT2 0xFFFFFF37
+#define CMD_VIDEOFRAME 0xFFFFFF41
+#define CMD_VIDEOSTART 0xFFFFFF40
+
+
+/* the following are undocumented commands that therefore should not be used */
+#if 0
+#define CMD_CSKETCH 0xFFFFFF35
+#define CMD_INT_RAMSHARED 0xFFFFFF3D
+#define CMD_INT_SWLOADIMAGE 0xFFFFFF3E
+#endif
+
+
+/* Register definitions */
+#define REG_ANA_COMP 0x302184UL /* only listed in datasheet */
+#define REG_BIST_EN 0x302174UL /* only listed in datasheet */
+#define REG_CLOCK 0x302008UL
+#define REG_CMDB_SPACE 0x302574UL
+#define REG_CMDB_WRITE 0x302578UL
+#define REG_CMD_DL 0x302100UL
+#define REG_CMD_READ 0x3020f8UL
+#define REG_CMD_WRITE 0x3020fcUL
+#define REG_CPURESET 0x302020UL
+#define REG_CSPREAD 0x302068UL
+#define REG_CTOUCH_EXTENDED 0x302108UL
+#define REG_CTOUCH_TOUCH0_XY 0x302124UL /* only listed in datasheet */
+#define REG_CTOUCH_TOUCH4_X 0x30216cUL
+#define REG_CTOUCH_TOUCH4_Y 0x302120UL
+#define REG_CTOUCH_TOUCH1_XY 0x30211cUL
+#define REG_CTOUCH_TOUCH2_XY 0x30218cUL
+#define REG_CTOUCH_TOUCH3_XY 0x302190UL
+#define REG_TOUCH_CONFIG 0x302168UL
+#define REG_DATESTAMP 0x302564UL /* only listed in datasheet */
+#define REG_DITHER 0x302060UL
+#define REG_DLSWAP 0x302054UL
+#define REG_FRAMES 0x302004UL
+#define REG_FREQUENCY 0x30200cUL
+#define REG_GPIO 0x302094UL
+#define REG_GPIOX 0x30209cUL
+#define REG_GPIOX_DIR 0x302098UL
+#define REG_GPIO_DIR 0x302090UL
+#define REG_HCYCLE 0x30202cUL
+#define REG_HOFFSET 0x302030UL
+#define REG_HSIZE 0x302034UL
+#define REG_HSYNC0 0x302038UL
+#define REG_HSYNC1 0x30203cUL
+#define REG_ID 0x302000UL
+#define REG_INT_EN 0x3020acUL
+#define REG_INT_FLAGS 0x3020a8UL
+#define REG_INT_MASK 0x3020b0UL
+#define REG_MACRO_0 0x3020d8UL
+#define REG_MACRO_1 0x3020dcUL
+#define REG_MEDIAFIFO_READ 0x309014UL /* only listed in programmers guide */
+#define REG_MEDIAFIFO_WRITE 0x309018UL /* only listed in programmers guide */
+#define REG_OUTBITS 0x30205cUL
+#define REG_PCLK 0x302070UL
+#define REG_PCLK_POL 0x30206cUL
+#define REG_PLAY 0x30208cUL
+#define REG_PLAYBACK_FORMAT 0x3020c4UL
+#define REG_PLAYBACK_FREQ 0x3020c0UL
+#define REG_PLAYBACK_LENGTH 0x3020b8UL
+#define REG_PLAYBACK_LOOP 0x3020c8UL
+#define REG_PLAYBACK_PLAY 0x3020ccUL
+#define REG_PLAYBACK_READPTR 0x3020bcUL
+#define REG_PLAYBACK_START 0x3020b4UL
+#define REG_PWM_DUTY 0x3020d4UL
+#define REG_PWM_HZ 0x3020d0UL
+#define REG_RENDERMODE 0x302010UL /* only listed in datasheet */
+#define REG_ROTATE 0x302058UL
+#define REG_SNAPFORMAT 0x30201cUL /* only listed in datasheet */
+#define REG_SNAPSHOT 0x302018UL /* only listed in datasheet */
+#define REG_SNAPY 0x302014UL /* only listed in datasheet */
+#define REG_SOUND 0x302088UL
+#define REG_SPI_WIDTH 0x302188UL /* listed with false offset in programmers guide V1.1 */
+#define REG_SWIZZLE 0x302064UL
+#define REG_TAG 0x30207cUL
+#define REG_TAG_X 0x302074UL
+#define REG_TAG_Y 0x302078UL
+#define REG_TAP_CRC 0x302024UL /* only listed in datasheet */
+#define REG_TAP_MASK 0x302028UL /* only listed in datasheet */
+#define REG_TOUCH_ADC_MODE 0x302108UL
+#define REG_TOUCH_CHARGE 0x30210cUL
+#define REG_TOUCH_DIRECT_XY 0x30218cUL
+#define REG_TOUCH_DIRECT_Z1Z2 0x302190UL
+#define REG_TOUCH_MODE 0x302104UL
+#define REG_TOUCH_OVERSAMPLE 0x302114UL
+#define REG_TOUCH_RAW_XY 0x30211cUL
+#define REG_TOUCH_RZ 0x302120UL
+#define REG_TOUCH_RZTHRESH 0x302118UL
+#define REG_TOUCH_SCREEN_XY 0x302124UL
+#define REG_TOUCH_SETTLE 0x302110UL
+#define REG_TOUCH_TAG 0x30212cUL
+#define REG_TOUCH_TAG1 0x302134UL /* only listed in datasheet */
+#define REG_TOUCH_TAG1_XY 0x302130UL /* only listed in datasheet */
+#define REG_TOUCH_TAG2 0x30213cUL /* only listed in datasheet */
+#define REG_TOUCH_TAG2_XY 0x302138UL /* only listed in datasheet */
+#define REG_TOUCH_TAG3 0x302144UL /* only listed in datasheet */
+#define REG_TOUCH_TAG3_XY 0x302140UL /* only listed in datasheet */
+#define REG_TOUCH_TAG4 0x30214cUL /* only listed in datasheet */
+#define REG_TOUCH_TAG4_XY 0x302148UL /* only listed in datasheet */
+#define REG_TOUCH_TAG_XY 0x302128UL
+#define REG_TOUCH_TRANSFORM_A 0x302150UL
+#define REG_TOUCH_TRANSFORM_B 0x302154UL
+#define REG_TOUCH_TRANSFORM_C 0x302158UL
+#define REG_TOUCH_TRANSFORM_D 0x30215cUL
+#define REG_TOUCH_TRANSFORM_E 0x302160UL
+#define REG_TOUCH_TRANSFORM_F 0x302164UL
+#define REG_TRACKER 0x309000UL /* only listed in programmers guide */
+#define REG_TRACKER_1 0x309004UL /* only listed in programmers guide */
+#define REG_TRACKER_2 0x309008UL /* only listed in programmers guide */
+#define REG_TRACKER_3 0x30900cUL /* only listed in programmers guide */
+#define REG_TRACKER_4 0x309010UL /* only listed in programmers guide */
+#define REG_TRIM 0x302180UL
+#define REG_VCYCLE 0x302040UL
+#define REG_VOFFSET 0x302044UL
+#define REG_VOL_PB 0x302080UL
+#define REG_VOL_SOUND 0x302084UL
+#define REG_VSIZE 0x302048UL
+#define REG_VSYNC0 0x30204cUL
+#define REG_VSYNC1 0x302050UL
+
+#if 0
+#define REG_BUSYBITS 0x3020e8UL /* only listed as "reserved" in datasheet */
+#define REG_CRC 0x302178UL /* only listed as "reserved" in datasheet */
+#define REG_SPI_EARLY_TX 0x30217cUL /* only listed as "reserved" in datasheet */
+#define REG_ROMSUB_SEL 0x3020f0UL /* only listed as "reserved" in datasheet */
+#define REG_TOUCH_FAULT 0x302170UL /* only listed as "reserved" in datasheet */
+#endif
+
+
+/* FT81x graphics engine specific macros useful for static display list generation */
+
+/* beware, these are different to FTDIs implementation as these take the original values as parameters and not only the upper bits */
+#define BITMAP_LAYOUT_H(linestride,height) ((40UL<<24)|((((linestride&0xC00)>>10)&3UL)<<2)|((((height&0x600)>>9)&3UL)<<0))
+#define BITMAP_SIZE_H(width,height) ((41UL<<24)|((((width&0x600)>>9)&3UL)<<2)|((((height&0x600)>>9)&3UL)<<0))
+
+#define BITMAP_SOURCE(addr) ((1UL<<24)|(((addr)&4194303UL)<<0))
+#define NOP() ((45UL<<24))
+#define PALETTE_SOURCE(addr) ((42UL<<24)|(((addr)&4194303UL)<<0))
+#define SCISSOR_SIZE(width,height) ((28UL<<24)|(((width)&4095UL)<<12)|(((height)&4095UL)<<0))
+#define SCISSOR_XY(x,y) ((27UL<<24)|(((x)&2047UL)<<11)|(((y)&2047UL)<<0))
+#define VERTEX_FORMAT(frac) ((39UL<<24)|(((frac)&7UL)<<0))
+#define VERTEX_TRANSLATE_X(x) ((43UL<<24)|(((x)&131071UL)<<0))
+#define VERTEX_TRANSLATE_Y(y) ((44UL<<24)|(((y)&131071UL)<<0))
+
+
+
+/* ----------------- FT80x exclusive definitions -----------------*/
+#else
+
+/* Memory definitions */
+#define EVE_RAM_G 0x000000UL
+#define EVE_ROM_CHIPID 0x0C0000UL
+#define EVE_ROM_FONT 0x0BB23CUL
+#define EVE_ROM_FONT_ADDR 0x0FFFFCUL
+#define EVE_RAM_DL 0x100000UL
+#define EVE_RAM_PAL 0x102000UL
+#define EVE_RAM_CMD 0x108000UL
+#define EVE_RAM_SCREENSHOT 0x1C2000UL
+
+
+/* Memory buffer sizes */
+#define EVE_RAM_G_SIZE 256*1024L
+#define EVE_CMDFIFO_SIZE 4*1024L
+#define EVE_RAM_DL_SIZE 8*1024L
+#define EVE_RAM_PAL_SIZE 1*1024L
+
+
+/* Register definitions */
+#define REG_ID 0x102400UL
+#define REG_FRAMES 0x102404UL
+#define REG_CLOCK 0x102408UL
+#define REG_FREQUENCY 0x10240CUL
+#define REG_SCREENSHOT_EN 0x102410UL
+#define REG_SCREENSHOT_Y 0x102414UL
+#define REG_SCREENSHOT_START 0x102418UL
+#define REG_CPURESET 0x10241CUL
+#define REG_TAP_CRC 0x102420UL
+#define REG_TAP_MASK 0x102424UL
+#define REG_HCYCLE 0x102428UL
+#define REG_HOFFSET 0x10242CUL
+#define REG_HSIZE 0x102430UL
+#define REG_HSYNC0 0x102434UL
+#define REG_HSYNC1 0x102438UL
+#define REG_VCYCLE 0x10243CUL
+#define REG_VOFFSET 0x102440UL
+#define REG_VSIZE 0x102444UL
+#define REG_VSYNC0 0x102448UL
+#define REG_VSYNC1 0x10244CUL
+#define REG_DLSWAP 0x102450UL
+#define REG_ROTATE 0x102454UL
+#define REG_OUTBITS 0x102458UL
+#define REG_DITHER 0x10245CUL
+#define REG_SWIZZLE 0x102460UL
+#define REG_CSPREAD 0x102464UL
+#define REG_PCLK_POL 0x102468UL
+#define REG_PCLK 0x10246CUL
+#define REG_TAG_X 0x102470UL
+#define REG_TAG_Y 0x102474UL
+#define REG_TAG 0x102478UL
+#define REG_VOL_PB 0x10247CUL
+#define REG_VOL_SOUND 0x102480UL
+#define REG_SOUND 0x102484UL
+#define REG_PLAY 0x102488UL
+#define REG_GPIO_DIR 0x10248CUL
+#define REG_GPIO 0x102490UL
+#define REG_INT_FLAGS 0x102498UL
+#define REG_INT_EN 0x10249CUL
+#define REG_INT_MASK 0x1024A0UL
+#define REG_PLAYBACK_START 0x1024A4UL
+#define REG_PLAYBACK_LENGTH 0x1024A8UL
+#define REG_PLAYBACK_READPTR 0x1024ACUL
+#define REG_PLAYBACK_FREQ 0x1024B0UL
+#define REG_PLAYBACK_FORMAT 0x1024B4UL
+#define REG_PLAYBACK_LOOP 0x1024B8UL
+#define REG_PLAYBACK_PLAY 0x1024BCUL
+#define REG_PWM_HZ 0x1024C0UL
+#define REG_PWM_DUTY 0x1024C4UL
+#define REG_MACRO_0 0x1024C8UL
+#define REG_MACRO_1 0x1024CCUL
+#define REG_SCREENSHOT_BUSY 0x1024D8UL
+#define REG_CMD_READ 0x1024E4UL
+#define REG_CMD_WRITE 0x1024E8UL
+#define REG_CMD_DL 0x1024ECUL
+#define REG_TOUCH_MODE 0x1024F0UL
+#define REG_TOUCH_ADC_MODE 0x1024F4UL
+#define REG_TOUCH_CHARGE 0x1024F8UL
+#define REG_TOUCH_SETTLE 0x1024FCUL
+#define REG_TOUCH_OVERSAMPLE 0x102500UL
+#define REG_TOUCH_RZTHRESH 0x102504UL
+#define REG_TOUCH_RAW_XY 0x102508UL
+#define REG_TOUCH_RZ 0x10250CUL
+#define REG_TOUCH_SCREEN_XY 0x102510UL
+#define REG_TOUCH_TAG_XY 0x102514UL
+#define REG_TOUCH_TAG 0x102518UL
+#define REG_TOUCH_TRANSFORM_A 0x10251CUL
+#define REG_TOUCH_TRANSFORM_B 0x102520UL
+#define REG_TOUCH_TRANSFORM_C 0x102524UL
+#define REG_TOUCH_TRANSFORM_D 0x102528UL
+#define REG_TOUCH_TRANSFORM_E 0x10252CUL
+#define REG_TOUCH_TRANSFORM_F 0x102530UL
+#define REG_SCREENSHOT_READ 0x102554UL
+#define REG_TRIM 0x10256CUL
+#define REG_TOUCH_DIRECT_XY 0x102574UL
+#define REG_TOUCH_DIRECT_Z1Z2 0x102578UL
+#define REG_TRACKER 0x109000UL
+
+/* FT80x graphics engine specific macros useful for static display list generation */
+#define BITMAP_SOURCE(addr) ((1UL<<24)|(((addr)&1048575UL)<<0))
+#define SCISSOR_SIZE(width,height) ((28UL<<24)|(((width)&1023UL)<<10)|(((height)&1023UL)<<0))
+#define SCISSOR_XY(x,y) ((27UL<<24)|(((x)&511UL)<<9)|(((y)&511UL)<<0))
+
+#endif
+
+#endif /* EVE_H_ */
diff --git a/code/fe310/eos/net.c b/code/fe310/eos/net.c
index 1b9e34a..8f259db 100644
--- a/code/fe310/eos/net.c
+++ b/code/fe310/eos/net.c
@@ -174,6 +174,7 @@ static int net_xchg_next(unsigned char *_buffer) {
}
void eos_net_xchg_done(void) {
+ SPI1_REG(SPI_REG_CSMODE) = SPI_CSMODE_AUTO;
if (net_state_type) {
int r = eos_msgq_push(&_eos_event_q, EOS_EVT_NET | net_state_type, _eos_spi_state_buf, net_state_len_rx);
if (r) net_bufq_push(_eos_spi_state_buf);
@@ -282,6 +283,8 @@ void eos_net_start(void) {
void eos_net_stop(void) {
uint8_t done = 0;
+ if (!(net_state_flags & NET_STATE_FLAG_RUN)) return;
+
while (!done) {
clear_csr(mstatus, MSTATUS_MIE);
net_state_flags &= ~NET_STATE_FLAG_RUN;
@@ -324,20 +327,19 @@ void eos_net_release(void) {
set_csr(mstatus, MSTATUS_MIE);
}
-unsigned char *eos_net_alloc(void) {
+unsigned char *eos_net_alloc(unsigned char acquired) {
unsigned char *ret = NULL;
- while (ret == NULL) {
- clear_csr(mstatus, MSTATUS_MIE);
- if (net_state_next_buf) {
- ret = net_state_next_buf;
- net_state_next_buf = NULL;
- } else {
- asm volatile ("wfi");
- }
- set_csr(mstatus, MSTATUS_MIE);
+ if (!acquired) {
+ unsigned char acq = eos_net_acquire(0);
+ if (!acq) eos_net_acquire(1);
}
+ clear_csr(mstatus, MSTATUS_MIE);
+ ret = net_state_next_buf;
+ net_state_next_buf = NULL;
+ set_csr(mstatus, MSTATUS_MIE);
+
return ret;
}
diff --git a/code/fe310/eos/net.h b/code/fe310/eos/net.h
index ace05f1..a68cd77 100644
--- a/code/fe310/eos/net.h
+++ b/code/fe310/eos/net.h
@@ -22,6 +22,6 @@ void eos_net_stop(void);
void eos_net_set_handler(unsigned char type, eos_evt_fptr_t handler, uint8_t flags);
int eos_net_acquire(unsigned char reserved);
void eos_net_release(void);
-unsigned char *eos_net_alloc(void);
+unsigned char *eos_net_alloc(unsigned char acquired);
void eos_net_free(unsigned char *buffer, unsigned char more);
int eos_net_send(unsigned char type, unsigned char *buffer, uint16_t len, unsigned char more);
diff --git a/code/fe310/eos/sock.c b/code/fe310/eos/sock.c
index ab0fc59..b690dc4 100644
--- a/code/fe310/eos/sock.c
+++ b/code/fe310/eos/sock.c
@@ -48,7 +48,7 @@ void eos_sock_init(void) {
int eos_sock_open_udp(void) {
unsigned char type = EOS_SOCK_MTYPE_OPEN_DGRAM;
- unsigned char *buffer = eos_net_alloc();
+ unsigned char *buffer = eos_net_alloc(1);
uint16_t buf_size;
int rv, sock;
@@ -70,7 +70,7 @@ int eos_sock_open_udp(void) {
}
void eos_sock_close(int sock) {
- unsigned char *buffer = eos_net_alloc();
+ unsigned char *buffer = eos_net_alloc(1);
buffer[0] = EOS_SOCK_MTYPE_CLOSE;
buffer[1] = sock;
eos_net_send(EOS_NET_MTYPE_SOCK, buffer, 2, 1);
@@ -105,5 +105,3 @@ void eos_sock_set_handler(int sock, eos_sock_fptr_t handler, uint8_t flags) {
}
sock_handler[sock] = handler;
}
-
-
diff --git a/code/fe310/eos/sock.h b/code/fe310/eos/sock.h
index 8e9717d..3e0527b 100644
--- a/code/fe310/eos/sock.h
+++ b/code/fe310/eos/sock.h
@@ -17,6 +17,7 @@ typedef struct EOSNetAddr {
typedef void (*eos_sock_fptr_t) (unsigned char *, uint16_t);
+void eos_sock_init(void);
int eos_sock_open_udp(void);
void eos_sock_close(int sock);
int eos_sock_sendto(int sock, unsigned char *buffer, uint16_t size, unsigned char more, EOSNetAddr *addr);
diff --git a/code/fe310/eos/spi.c b/code/fe310/eos/spi.c
index 2928e82..0c9a38c 100644
--- a/code/fe310/eos/spi.c
+++ b/code/fe310/eos/spi.c
@@ -81,7 +81,7 @@ void eos_spi_init(void) {
eos_evtq_set_handler(EOS_EVT_SPI, spi_handler_evt);
}
-void eos_spi_dev_acquire(unsigned char dev) {
+void eos_spi_dev_start(unsigned char dev) {
eos_net_stop();
spi_dev = dev;
spi_state_flags = SPI_FLAG_CS;
@@ -106,7 +106,7 @@ void eos_spi_dev_acquire(unsigned char dev) {
eos_intr_set_handler(INT_SPI1_BASE, eos_spi_xchg_handler);
}
-void eos_spi_dev_release(void) {
+void eos_spi_dev_stop(void) {
if (spi_in_xchg) spi_xchg_wait();
if (spi_state_flags & EOS_SPI_FLAG_TX) spi_flush();
if (!(spi_state_flags & SPI_FLAG_CS)) eos_spi_cs_clear();
@@ -133,12 +133,12 @@ void eos_spi_xchg(unsigned char *buffer, uint16_t len, uint8_t flags) {
}
static void spi_xchg_done(void) {
- spi_state_flags &= ~SPI_FLAG_XCHG;
- if (!(spi_state_flags & (EOS_SPI_FLAG_MORE | SPI_FLAG_CS))) eos_spi_cs_clear();
SPI1_REG(SPI_REG_IE) = 0x0;
if (spi_dev == EOS_SPI_DEV_NET) {
eos_net_xchg_done();
} else {
+ spi_state_flags &= ~SPI_FLAG_XCHG;
+ if (!(spi_state_flags & (EOS_SPI_FLAG_MORE | SPI_FLAG_CS))) eos_spi_cs_clear();
eos_msgq_push(&_eos_event_q, EOS_EVT_SPI | spi_dev, _eos_spi_state_buf, _eos_spi_state_len);
}
}
@@ -217,7 +217,7 @@ uint8_t eos_spi_xchg8(uint8_t data, uint8_t flags) {
uint16_t eos_spi_xchg16(uint16_t data, uint8_t flags) {
volatile uint32_t x = 0;
uint8_t rx = !(flags & EOS_SPI_FLAG_TX);
- uint16_t r;
+ uint16_t r = 0;
if (spi_in_xchg) spi_xchg_wait();
if (rx && (spi_state_flags & EOS_SPI_FLAG_TX)) spi_flush();
@@ -226,27 +226,92 @@ uint16_t eos_spi_xchg16(uint16_t data, uint8_t flags) {
spi_state_flags |= flags;
if ((flags & EOS_SPI_FLAG_AUTOCS) && (spi_state_flags & SPI_FLAG_CS)) eos_spi_cs_set();
- while (SPI1_REG(SPI_REG_TXFIFO) & SPI_TXFIFO_FULL);
- SPI1_REG(SPI_REG_TXFIFO) = (data & 0xFF00) >> 8;
- while (SPI1_REG(SPI_REG_TXFIFO) & SPI_TXFIFO_FULL);
- SPI1_REG(SPI_REG_TXFIFO) = (data & 0x00FF);
+ if (flags & EOS_SPI_FLAG_BSWAP) {
+ while (SPI1_REG(SPI_REG_TXFIFO) & SPI_TXFIFO_FULL);
+ SPI1_REG(SPI_REG_TXFIFO) = (data & 0x00FF);
+ while (SPI1_REG(SPI_REG_TXFIFO) & SPI_TXFIFO_FULL);
+ SPI1_REG(SPI_REG_TXFIFO) = (data & 0xFF00) >> 8;
+ } else {
+ while (SPI1_REG(SPI_REG_TXFIFO) & SPI_TXFIFO_FULL);
+ SPI1_REG(SPI_REG_TXFIFO) = (data & 0xFF00) >> 8;
+ while (SPI1_REG(SPI_REG_TXFIFO) & SPI_TXFIFO_FULL);
+ SPI1_REG(SPI_REG_TXFIFO) = (data & 0x00FF);
+ }
if (rx) {
- while ((x = SPI1_REG(SPI_REG_RXFIFO)) & SPI_RXFIFO_EMPTY);
- r = (x & 0xFF) << 8;
- while ((x = SPI1_REG(SPI_REG_RXFIFO)) & SPI_RXFIFO_EMPTY);
- r |= x & 0xFF;
+ if (flags & EOS_SPI_FLAG_BSWAP) {
+ while ((x = SPI1_REG(SPI_REG_RXFIFO)) & SPI_RXFIFO_EMPTY);
+ r |= (x & 0xFF);
+ while ((x = SPI1_REG(SPI_REG_RXFIFO)) & SPI_RXFIFO_EMPTY);
+ r |= (x & 0xFF) << 8;
+ } else {
+ while ((x = SPI1_REG(SPI_REG_RXFIFO)) & SPI_RXFIFO_EMPTY);
+ r |= (x & 0xFF) << 8;
+ while ((x = SPI1_REG(SPI_REG_RXFIFO)) & SPI_RXFIFO_EMPTY);
+ r |= (x & 0xFF);
+ }
}
if ((flags & EOS_SPI_FLAG_AUTOCS) && !(flags & EOS_SPI_FLAG_MORE)) eos_spi_cs_clear();
- return x & 0xFF;
+ return r;
+}
+
+uint32_t eos_spi_xchg24(uint32_t data, uint8_t flags) {
+ volatile uint32_t x = 0;
+ uint8_t rx = !(flags & EOS_SPI_FLAG_TX);
+ uint32_t r = 0;
+
+ if (spi_in_xchg) spi_xchg_wait();
+ if (rx && (spi_state_flags & EOS_SPI_FLAG_TX)) spi_flush();
+
+ spi_state_flags &= 0xF0;
+ spi_state_flags |= flags;
+ if ((flags & EOS_SPI_FLAG_AUTOCS) && (spi_state_flags & SPI_FLAG_CS)) eos_spi_cs_set();
+
+ if (flags & EOS_SPI_FLAG_BSWAP) {
+ while (SPI1_REG(SPI_REG_TXFIFO) & SPI_TXFIFO_FULL);
+ SPI1_REG(SPI_REG_TXFIFO) = (data & 0x000000FF);
+ while (SPI1_REG(SPI_REG_TXFIFO) & SPI_TXFIFO_FULL);
+ SPI1_REG(SPI_REG_TXFIFO) = (data & 0x0000FF00) >> 8;
+ while (SPI1_REG(SPI_REG_TXFIFO) & SPI_TXFIFO_FULL);
+ SPI1_REG(SPI_REG_TXFIFO) = (data & 0x00FF0000) >> 16;
+ } else {
+ while (SPI1_REG(SPI_REG_TXFIFO) & SPI_TXFIFO_FULL);
+ SPI1_REG(SPI_REG_TXFIFO) = (data & 0x00FF0000) >> 16;
+ while (SPI1_REG(SPI_REG_TXFIFO) & SPI_TXFIFO_FULL);
+ SPI1_REG(SPI_REG_TXFIFO) = (data & 0x0000FF00) >> 8;
+ while (SPI1_REG(SPI_REG_TXFIFO) & SPI_TXFIFO_FULL);
+ SPI1_REG(SPI_REG_TXFIFO) = (data & 0x000000FF);
+ }
+
+ if (rx) {
+ if (flags & EOS_SPI_FLAG_BSWAP) {
+ while ((x = SPI1_REG(SPI_REG_RXFIFO)) & SPI_RXFIFO_EMPTY);
+ r |= (x & 0xFF);
+ while ((x = SPI1_REG(SPI_REG_RXFIFO)) & SPI_RXFIFO_EMPTY);
+ r |= (x & 0xFF) << 8;
+ while ((x = SPI1_REG(SPI_REG_RXFIFO)) & SPI_RXFIFO_EMPTY);
+ r |= (x & 0xFF) << 16;
+ } else {
+ while ((x = SPI1_REG(SPI_REG_RXFIFO)) & SPI_RXFIFO_EMPTY);
+ r |= (x & 0xFF) << 16;
+ while ((x = SPI1_REG(SPI_REG_RXFIFO)) & SPI_RXFIFO_EMPTY);
+ r |= (x & 0xFF) << 8;
+ while ((x = SPI1_REG(SPI_REG_RXFIFO)) & SPI_RXFIFO_EMPTY);
+ r |= (x & 0xFF);
+ }
+ }
+
+ if ((flags & EOS_SPI_FLAG_AUTOCS) && !(flags & EOS_SPI_FLAG_MORE)) eos_spi_cs_clear();
+
+ return r;
}
uint32_t eos_spi_xchg32(uint32_t data, uint8_t flags) {
volatile uint32_t x = 0;
uint8_t rx = !(flags & EOS_SPI_FLAG_TX);
- uint32_t r;
+ uint32_t r = 0;
if (spi_in_xchg) spi_xchg_wait();
if (rx && (spi_state_flags & EOS_SPI_FLAG_TX)) spi_flush();
@@ -255,24 +320,46 @@ uint32_t eos_spi_xchg32(uint32_t data, uint8_t flags) {
spi_state_flags |= flags;
if ((flags & EOS_SPI_FLAG_AUTOCS) && (spi_state_flags & SPI_FLAG_CS)) eos_spi_cs_set();
- while (SPI1_REG(SPI_REG_TXFIFO) & SPI_TXFIFO_FULL);
- SPI1_REG(SPI_REG_TXFIFO) = (data & 0xFF000000) >> 24;
- while (SPI1_REG(SPI_REG_TXFIFO) & SPI_TXFIFO_FULL);
- SPI1_REG(SPI_REG_TXFIFO) = (data & 0x00FF0000) >> 16;
- while (SPI1_REG(SPI_REG_TXFIFO) & SPI_TXFIFO_FULL);
- SPI1_REG(SPI_REG_TXFIFO) = (data & 0x0000FF00) >> 8;
- while (SPI1_REG(SPI_REG_TXFIFO) & SPI_TXFIFO_FULL);
- SPI1_REG(SPI_REG_TXFIFO) = (data & 0x000000FF);
+ if (flags & EOS_SPI_FLAG_BSWAP) {
+ while (SPI1_REG(SPI_REG_TXFIFO) & SPI_TXFIFO_FULL);
+ SPI1_REG(SPI_REG_TXFIFO) = (data & 0x000000FF);
+ while (SPI1_REG(SPI_REG_TXFIFO) & SPI_TXFIFO_FULL);
+ SPI1_REG(SPI_REG_TXFIFO) = (data & 0x0000FF00) >> 8;
+ while (SPI1_REG(SPI_REG_TXFIFO) & SPI_TXFIFO_FULL);
+ SPI1_REG(SPI_REG_TXFIFO) = (data & 0x00FF0000) >> 16;
+ while (SPI1_REG(SPI_REG_TXFIFO) & SPI_TXFIFO_FULL);
+ SPI1_REG(SPI_REG_TXFIFO) = (data & 0xFF000000) >> 24;
+ } else {
+ while (SPI1_REG(SPI_REG_TXFIFO) & SPI_TXFIFO_FULL);
+ SPI1_REG(SPI_REG_TXFIFO) = (data & 0xFF000000) >> 24;
+ while (SPI1_REG(SPI_REG_TXFIFO) & SPI_TXFIFO_FULL);
+ SPI1_REG(SPI_REG_TXFIFO) = (data & 0x00FF0000) >> 16;
+ while (SPI1_REG(SPI_REG_TXFIFO) & SPI_TXFIFO_FULL);
+ SPI1_REG(SPI_REG_TXFIFO) = (data & 0x0000FF00) >> 8;
+ while (SPI1_REG(SPI_REG_TXFIFO) & SPI_TXFIFO_FULL);
+ SPI1_REG(SPI_REG_TXFIFO) = (data & 0x000000FF);
+ }
if (rx) {
- while ((x = SPI1_REG(SPI_REG_RXFIFO)) & SPI_RXFIFO_EMPTY);
- r = (x & 0xFF) << 24;
- while ((x = SPI1_REG(SPI_REG_RXFIFO)) & SPI_RXFIFO_EMPTY);
- r |= (x & 0xFF) << 16;
- while ((x = SPI1_REG(SPI_REG_RXFIFO)) & SPI_RXFIFO_EMPTY);
- r |= (x & 0xFF) << 8;
- while ((x = SPI1_REG(SPI_REG_RXFIFO)) & SPI_RXFIFO_EMPTY);
- r |= x & 0xFF;
+ if (flags & EOS_SPI_FLAG_BSWAP) {
+ while ((x = SPI1_REG(SPI_REG_RXFIFO)) & SPI_RXFIFO_EMPTY);
+ r |= (x & 0xFF);
+ while ((x = SPI1_REG(SPI_REG_RXFIFO)) & SPI_RXFIFO_EMPTY);
+ r |= (x & 0xFF) << 8;
+ while ((x = SPI1_REG(SPI_REG_RXFIFO)) & SPI_RXFIFO_EMPTY);
+ r |= (x & 0xFF) << 16;
+ while ((x = SPI1_REG(SPI_REG_RXFIFO)) & SPI_RXFIFO_EMPTY);
+ r |= (x & 0xFF) << 24;
+ } else {
+ while ((x = SPI1_REG(SPI_REG_RXFIFO)) & SPI_RXFIFO_EMPTY);
+ r |= (x & 0xFF) << 24;
+ while ((x = SPI1_REG(SPI_REG_RXFIFO)) & SPI_RXFIFO_EMPTY);
+ r |= (x & 0xFF) << 16;
+ while ((x = SPI1_REG(SPI_REG_RXFIFO)) & SPI_RXFIFO_EMPTY);
+ r |= (x & 0xFF) << 8;
+ while ((x = SPI1_REG(SPI_REG_RXFIFO)) & SPI_RXFIFO_EMPTY);
+ r |= (x & 0xFF);
+ }
}
if ((flags & EOS_SPI_FLAG_AUTOCS) && !(flags & EOS_SPI_FLAG_MORE)) eos_spi_cs_clear();
diff --git a/code/fe310/eos/spi.h b/code/fe310/eos/spi.h
index 24d7996..394c400 100644
--- a/code/fe310/eos/spi.h
+++ b/code/fe310/eos/spi.h
@@ -11,10 +11,11 @@
#define EOS_SPI_FLAG_TX 0x01
#define EOS_SPI_FLAG_MORE 0x02
#define EOS_SPI_FLAG_AUTOCS 0x04
+#define EOS_SPI_FLAG_BSWAP 0x08
void eos_spi_init(void);
-void eos_spi_dev_acquire(unsigned char dev);
-void eos_spi_dev_release(void);
+void eos_spi_dev_start(unsigned char dev);
+void eos_spi_dev_stop(void);
void eos_spi_xchg(unsigned char *buffer, uint16_t len, uint8_t flags);
void eos_spi_xchg_handler(void);
@@ -23,6 +24,7 @@ void eos_spi_cs_set(void);
void eos_spi_cs_clear(void);
uint8_t eos_spi_xchg8(uint8_t data, uint8_t flags);
uint16_t eos_spi_xchg16(uint16_t data, uint8_t flags);
+uint32_t eos_spi_xchg24(uint32_t data, uint8_t flags);
uint32_t eos_spi_xchg32(uint32_t data, uint8_t flags);
void eos_spi_set_handler(unsigned char dev, eos_evt_fptr_t handler); \ No newline at end of file
diff --git a/code/fe310/eos/wifi.c b/code/fe310/eos/wifi.c
new file mode 100644
index 0000000..95fec7d
--- /dev/null
+++ b/code/fe310/eos/wifi.c
@@ -0,0 +1,76 @@
+#include <stdlib.h>
+#include <stdint.h>
+#include <string.h>
+
+#include "eos.h"
+#include "event.h"
+#include "net.h"
+
+#include "wifi.h"
+
+static eos_wifi_fptr_t wifi_handler[EOS_WIFI_MAX_MTYPE];
+static uint16_t wifi_handler_flags_buf_free = 0;
+static uint16_t wifi_handler_flags_buf_acq = 0;
+
+static void wifi_handler_evt(unsigned char type, unsigned char *buffer, uint16_t len) {
+ if ((buffer == NULL) || (len < 1)) {
+ eos_evtq_bad_handler(type, buffer, len);
+ eos_net_free(buffer, 0);
+ return;
+ }
+
+ uint8_t mtype = buffer[0];
+ if (mtype >= EOS_WIFI_MAX_MTYPE) {
+ eos_evtq_bad_handler(type, buffer, len);
+ eos_net_free(buffer, 0);
+ return;
+ }
+
+ uint16_t buf_free = ((uint16_t)1 << mtype) & wifi_handler_flags_buf_free;
+ uint16_t buf_acq = ((uint16_t)1 << mtype) & wifi_handler_flags_buf_acq;
+ if (buf_free) {
+ eos_net_free(buffer, buf_acq);
+ buffer = NULL;
+ len = 0;
+ }
+
+ wifi_handler[mtype](buffer, len);
+
+ if (buf_free && buf_acq) eos_net_release();
+}
+
+void eos_wifi_init(void) {
+ eos_net_set_handler(EOS_NET_MTYPE_WIFI, wifi_handler_evt, 0);
+}
+
+void eos_wifi_connect(const char *ssid, const char *pass) {
+ int ssid_len = strlen(ssid);
+ int pass_len = strlen(pass);
+ unsigned char *buffer = eos_net_alloc(0);
+
+ buffer[0] = EOS_WIFI_MTYPE_CONNECT;
+ strcpy(buffer+1, ssid);
+ buffer[ssid_len+1] = 0;
+ strcpy(buffer+ssid_len+2, pass);
+ buffer[ssid_len+pass_len+2] = 0;
+ eos_net_send(EOS_NET_MTYPE_WIFI, buffer, ssid_len+pass_len+3, 0);
+}
+
+void eos_wifi_disconnect(void) {
+ unsigned char *buffer = eos_net_alloc(0);
+ buffer[0] = EOS_WIFI_MTYPE_DISCONNECT;
+ eos_net_send(EOS_NET_MTYPE_WIFI, buffer, 1, 0);
+}
+
+void eos_wifi_set_handler(int mtype, eos_wifi_fptr_t handler, uint8_t flags) {
+ if (mtype >= EOS_WIFI_MAX_MTYPE) {
+ return;
+ }
+
+ if (flags) {
+ uint16_t flag = (uint16_t)1 << mtype;
+ if (flags & EOS_NET_FLAG_BUF_FREE) wifi_handler_flags_buf_free |= flag;
+ if (flags & EOS_NET_FLAG_BUF_ACQ) wifi_handler_flags_buf_acq |= flag;
+ }
+ wifi_handler[mtype] = handler;
+}
diff --git a/code/fe310/eos/wifi.h b/code/fe310/eos/wifi.h
new file mode 100644
index 0000000..d46d25b
--- /dev/null
+++ b/code/fe310/eos/wifi.h
@@ -0,0 +1,14 @@
+#include <stdint.h>
+
+#define EOS_WIFI_MTYPE_SCAN 0
+#define EOS_WIFI_MTYPE_CONNECT 1
+#define EOS_WIFI_MTYPE_DISCONNECT 2
+
+#define EOS_WIFI_MAX_MTYPE 3
+
+typedef void (*eos_wifi_fptr_t) (unsigned char *, uint16_t);
+
+void eos_wifi_init(void);
+void eos_wifi_connect(const char *ssid, const char *pass);
+void eos_wifi_disconnect(void);
+void eos_wifi_set_handler(int mtype, eos_wifi_fptr_t handler, uint8_t flags); \ No newline at end of file
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-10 12:56:52 +0000