diff options
Diffstat (limited to 'code')
| -rw-r--r-- | code/fe310/eos/i2s.c | 17 | ||||
| -rw-r--r-- | code/fe310/eos/i2s_def.h | 10 | ||||
| -rw-r--r-- | code/fe310/eos/trap_entry.S | 6 |
3 files changed, 19 insertions, 14 deletions
diff --git a/code/fe310/eos/i2s.c b/code/fe310/eos/i2s.c index 3b1772c..47be820 100644 --- a/code/fe310/eos/i2s.c +++ b/code/fe310/eos/i2s.c @@ -10,7 +10,7 @@ #include "i2s.h" #include "i2s_def.h" -#define I2S_PWM_REG_CK PWM1_REG +#define I2S_PWM_REG_CK PWM0_REG #define I2S_PWM_REG_WS PWM2_REG #define EOS_ABUF_IDX_MASK(IDX, SIZE) ((IDX) & ((SIZE) - 1)) @@ -90,6 +90,7 @@ void eos_i2s_init(void) { unsigned long f = get_cpu_freq(); _eos_i2s_ck_period = 512; + uint32_t _ck_period_scaled = _eos_i2s_ck_period >> I2S_PWM_SCALE_CK; GPIO_REG(GPIO_INPUT_EN) &= ~(1 << I2S_PIN_LR); GPIO_REG(GPIO_OUTPUT_EN) |= (1 << I2S_PIN_LR); GPIO_REG(GPIO_OUTPUT_XOR) &= ~(1 << I2S_PIN_LR); @@ -110,15 +111,15 @@ void eos_i2s_init(void) { I2S_PWM_REG_CK(PWM_CFG) = 0; I2S_PWM_REG_CK(PWM_COUNT) = 0; - I2S_PWM_REG_CK(PWM_CMP0) = _eos_i2s_ck_period - 1; - I2S_PWM_REG_CK(PWM_CMP1) = I2S_PWM_REG_CK(PWM_CMP0) / 2; - I2S_PWM_REG_CK(PWM_CMP2) = I2S_PWM_REG_CK(PWM_CMP0) / 8; + I2S_PWM_REG_CK(PWM_CMP0) = _ck_period_scaled; + I2S_PWM_REG_CK(PWM_CMP1) = _ck_period_scaled / 2; + I2S_PWM_REG_CK(PWM_CMP2) = _ck_period_scaled / 4; I2S_PWM_REG_WS(PWM_CFG) = 0; I2S_PWM_REG_WS(PWM_COUNT) = 0; - I2S_PWM_REG_WS(PWM_CMP0) = _eos_i2s_ck_period * 64 - 1; - I2S_PWM_REG_WS(PWM_CMP1) = I2S_PWM_REG_WS(PWM_CMP0) / 2; - I2S_PWM_REG_WS(PWM_CMP2) = I2S_PWM_REG_WS(PWM_CMP0) - _eos_i2s_ck_period; + I2S_PWM_REG_WS(PWM_CMP0) = (_eos_i2s_ck_period + 1) * 64 - 1; + I2S_PWM_REG_WS(PWM_CMP1) = (_eos_i2s_ck_period + 1) * 32; + I2S_PWM_REG_WS(PWM_CMP2) = (_eos_i2s_ck_period + 1) * 62; eos_intr_set(I2S_IRQ_SD_ID, I2S_IRQ_SD_PRIORITY, NULL); eos_intr_set(I2S_IRQ_CK_ID, I2S_IRQ_CK_PRIORITY, NULL); @@ -147,7 +148,7 @@ void eos_i2s_start(void) { I2S_PWM_REG_CK(PWM_COUNT) = 0; I2S_PWM_REG_WS(PWM_COUNT) = 0; - I2S_PWM_REG_CK(PWM_CFG) = PWM_CFG_ENALWAYS | PWM_CFG_ZEROCMP; + I2S_PWM_REG_CK(PWM_CFG) = PWM_CFG_ENALWAYS | PWM_CFG_ZEROCMP | I2S_PWM_SCALE_CK; I2S_PWM_REG_WS(PWM_CFG) = PWM_CFG_ENALWAYS | PWM_CFG_ZEROCMP; GPIO_REG(GPIO_IOF_SEL) |= (1 << I2S_PIN_CK); diff --git a/code/fe310/eos/i2s_def.h b/code/fe310/eos/i2s_def.h index 4b7620e..99aabbe 100644 --- a/code/fe310/eos/i2s_def.h +++ b/code/fe310/eos/i2s_def.h @@ -2,14 +2,15 @@ #define I2S_EVT_SPK 0x1 #define I2S_MAX_HANDLER 2 -#define I2S_PIN_CK 19 // pin 3 -#define I2S_PIN_WS 11 // pin 17 #define I2S_PIN_SD 12 // pin 18 +// #define I2S_PIN_CK 19 // pin 3 +#define I2S_PIN_CK 1 // pin 9 +#define I2S_PIN_WS 11 // pin 17 #define I2S_PIN_LR 13 // pin 19 -#define I2S_IRQ_SD_ID (INT_PWM1_BASE + 2) -#define I2S_IRQ_CK_ID (INT_PWM1_BASE + 0) +#define I2S_IRQ_SD_ID (INT_PWM0_BASE + 2) +#define I2S_IRQ_CK_ID (INT_PWM0_BASE + 0) #define I2S_IRQ_WS_ID (INT_PWM2_BASE + 0) #define I2S_IRQ_CI_ID (INT_PWM2_BASE + 2) @@ -22,6 +23,7 @@ #define I2S_SMPL_BITS 13 #define I2S_SMPL_BITS_S 5 +#define I2S_PWM_SCALE_CK 2 #define I2S_ABUF_SIZE_CHUNK 64 /* asm */ diff --git a/code/fe310/eos/trap_entry.S b/code/fe310/eos/trap_entry.S index 0efac2c..fef7d27 100644 --- a/code/fe310/eos/trap_entry.S +++ b/code/fe310/eos/trap_entry.S @@ -32,7 +32,7 @@ #define INT_PWM1_BASE 44 #define INT_PWM2_BASE 48 -#define I2S_PWM_CTRL_ADDR_CK PWM1_CTRL_ADDR +#define I2S_PWM_CTRL_ADDR_CK PWM0_CTRL_ADDR #define I2S_PWM_CTRL_ADDR_WS PWM2_CTRL_ADDR #include "i2s_def.h" @@ -71,17 +71,19 @@ handler_sd: li x18, I2S_PWM_CTRL_ADDR_CK lw x8, PWM_COUNT(x18) lw x9, PWM_CMP2(x18) + srli x9, x9, I2S_PWM_SCALE_CK blt x8, x9, handler_sd_exit_ # read mic value -> x8 li x18, GPIO_CTRL_ADDR lw x8, GPIO_INPUT_VAL(x18) - # set bit as ws pwm counter/ck period - sd volume -> x9 + # set bit as ws pwm counter/(ck period + 1) - sd volume -> x9 li x18, I2S_PWM_CTRL_ADDR_WS lw x9, PWM_COUNT(x18) la x18, _eos_i2s_ck_period lw x19, 0(x18) + addi x19, x19, 1 divu x9, x9, x19 la x18, _eos_i2s_mic_volume lw x19, 0(x18) |