diff options
Diffstat (limited to 'fw')
| -rw-r--r-- | fw/fe310/eos/soc/i2s.c | 4 | ||||
| -rw-r--r-- | fw/fe310/eos/soc/i2s_priv.h | 2 | ||||
| -rw-r--r-- | fw/fe310/eos/soc/trap_entry.S | 45 |
3 files changed, 29 insertions, 22 deletions
diff --git a/fw/fe310/eos/soc/i2s.c b/fw/fe310/eos/soc/i2s.c index 052efa2..bcce0b7 100644 --- a/fw/fe310/eos/soc/i2s.c +++ b/fw/fe310/eos/soc/i2s.c @@ -194,8 +194,6 @@ void eos_i2s_start(uint32_t sample_rate) { eos_eve_intr_disable(); eos_uart_disable(); - eos_intr_set_priority(I2S_IRQ_SD_ID, IRQ_PRIORITY_I2S_SD); - eos_intr_enable(I2S_IRQ_SD_ID); GPIO_REG(GPIO_INPUT_EN) |= (1 << I2S_PIN_INT); GPIO_REG(GPIO_FALL_IE) |= (1 << I2S_PIN_INT); @@ -211,6 +209,8 @@ void eos_i2s_start(uint32_t sample_rate) { GPIO_REG(GPIO_IOF_SEL) |= I2S_PIN_PWM; GPIO_REG(GPIO_IOF_EN) |= iof_mask; + eos_intr_set_priority(I2S_IRQ_SD_ID, IRQ_PRIORITY_I2S_SD); + eos_intr_enable(I2S_IRQ_SD_ID); _eos_i2s_start_pwm(); /* I2S_REG_CK(PWM_CFG) = PWM_CFG_ENALWAYS | PWM_CFG_ZEROCMP | I2S_PWM_SCALE_CK; diff --git a/fw/fe310/eos/soc/i2s_priv.h b/fw/fe310/eos/soc/i2s_priv.h index bc3cb1a..25014a5 100644 --- a/fw/fe310/eos/soc/i2s_priv.h +++ b/fw/fe310/eos/soc/i2s_priv.h @@ -13,5 +13,5 @@ #define I2S_CTRL_ADDR_WS PWM1_CTRL_ADDR #define I2S_CTRL_ADDR_SR_SEL PWM2_CTRL_ADDR -#define I2S_IDLE1_CYCLES 4 +#define I2S_IDLE1_CYCLES 2 #define I2S_IDLE2_CYCLES 4 diff --git a/fw/fe310/eos/soc/trap_entry.S b/fw/fe310/eos/soc/trap_entry.S index 1d3d1c2..98f9267 100644 --- a/fw/fe310/eos/soc/trap_entry.S +++ b/fw/fe310/eos/soc/trap_entry.S @@ -136,7 +136,7 @@ i2s_abuf_pop: 1: sh x18, I2S_ABUF_OFF_IDXR(x9) - # check for correct channel if mode is stereo + # check if buf data is for correct channel if mode is stereo lw x21, I2S_MODE(x27) bnez x21, 2f andi x22, x22, 1 @@ -209,11 +209,16 @@ i2s_sd_xchg: li x21, (1 << I2S_PIN_SR_CK) lw x22, GPIO_OUTPUT_VAL(x18) + # disable intpu, enable output for I2S_PIN_SD_OUT (pin is low) lw x9, GPIO_OUTPUT_EN(x18) or x9, x9, x20 sw x9, GPIO_OUTPUT_EN(x18) - not x20, x20 + lw x9, GPIO_INPUT_EN(x18) + and x9, x9, x20 + sw x9, GPIO_INPUT_EN(x18) + + # I2S_PIN_SR_CK bit low (was high) xor x22, x22, x21 li x23, 16 @@ -230,55 +235,57 @@ i2s_sd_xchg: and x22, x22, x20 or x22, x22, x9 -#if I2S_IDLE1_CYCLES - # idle - li x9, I2S_IDLE1_CYCLES -1: - addi x9, x9, -1 - bnez x9, 1b -#endif - # read bit lw x9, GPIO_INPUT_VAL(x18) and x9, x9, x19 srli x9, x9, I2S_PIN_SD_IN or x8, x8, x9 - # 74HC595 ck low (I2S_PIN_SR_CK high) + # I2S_PIN_SR_CK pin high (74HC595 ck low) xor x22, x22, x21 sw x22, GPIO_OUTPUT_VAL(x18) +#if I2S_IDLE1_CYCLES # idle - li x9, I2S_IDLE2_CYCLES + li x9, I2S_IDLE1_CYCLES 1: addi x9, x9, -1 bnez x9, 1b +#endif - # 74HC595 ck high (I2S_PIN_SR_CK low) + # I2S_PIN_SR_CK pin low (74HC595 ck high) xor x22, x22, x21 sw x22, GPIO_OUTPUT_VAL(x18) - addi x23, x23, -1 - bnez x23, 0b - +#if I2S_IDLE2_CYCLES # idle li x9, I2S_IDLE2_CYCLES 1: addi x9, x9, -1 bnez x9, 1b +#endif + + addi x23, x23, -1 + bnez x23, 0b - # 74HC595 ck low (I2S_PIN_SR_CK high) + # I2S_PIN_SD_OUT pin low (has pull-dn) + and x22, x22, x20 + # I2S_PIN_SR_CK pin high (74HC595 ck low) xor x22, x22, x21 sw x22, GPIO_OUTPUT_VAL(x18) + # disable output, enable input for I2S_PIN_SD_OUT lw x9, GPIO_OUTPUT_EN(x18) - and x9, x9, x20 + xor x9, x9, x20 sw x9, GPIO_OUTPUT_EN(x18) + lw x9, GPIO_INPUT_EN(x18) + xor x9, x9, x20 + sw x9, GPIO_INPUT_EN(x18) slli x8, x8, 16 srai x8, x8, 16 - # skip right channel + # skip right mic channel bnez x25, i2s_sd_complete i2s_encode: |