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-rw-r--r--recipes-kernel/linux/rvphone/cl-imx8/dts/cl-imx8-base.dtsi (renamed from recipes-kernel/linux/rvphone/cl-imx8/dts/cl-imx8.dts)74
-rw-r--r--recipes-kernel/linux/rvphone/cl-imx8/dts/cl-imx8-lvds.dtsi87
-rw-r--r--recipes-kernel/linux/rvphone/cl-imx8/dts/cl-imx8-touch.dtsi28
-rw-r--r--recipes-kernel/linux/rvphone/cl-imx8/dts/cl-imx8-wifi.dtsi24
4 files changed, 157 insertions, 56 deletions
diff --git a/recipes-kernel/linux/rvphone/cl-imx8/dts/cl-imx8.dts b/recipes-kernel/linux/rvphone/cl-imx8/dts/cl-imx8-base.dtsi
index c90e0ca..9ec2209 100644
--- a/recipes-kernel/linux/rvphone/cl-imx8/dts/cl-imx8.dts
+++ b/recipes-kernel/linux/rvphone/cl-imx8/dts/cl-imx8-base.dtsi
@@ -1,17 +1,3 @@
-/*
- * Copyright (C) 2017 CopuLab Ltd.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version 2
- * of the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
/dts-v1/;
#include "../freescale/fsl-imx8mq.dtsi"
@@ -119,6 +105,13 @@
>;
};
+ pinctrl_i2c3: i2c3grp {
+ fsl,pins = <
+ MX8MQ_IOMUXC_I2C3_SCL_I2C3_SCL 0x4000007f
+ MX8MQ_IOMUXC_I2C3_SDA_I2C3_SDA 0x4000007f
+ >;
+ };
+
pinctrl_pwm2: pwm2grp {
fsl,pins = <
MX8MQ_IOMUXC_I2C4_SCL_PWM2_OUT 0x16
@@ -135,25 +128,6 @@
>;
};
- pinctrl_uart4: uart4grp {
- fsl,pins = <
- MX8MQ_IOMUXC_ECSPI2_MOSI_UART4_DCE_TX 0x79
- MX8MQ_IOMUXC_ECSPI2_SCLK_UART4_DCE_RX 0x79
- MX8MQ_IOMUXC_ECSPI2_MISO_UART4_DCE_CTS_B 0x79
- MX8MQ_IOMUXC_ECSPI2_SS0_UART4_DCE_RTS_B 0x79
- >;
- };
-
- pinctrl_pcie1: pcie1grp {
- fsl,pins = <
- MX8MQ_IOMUXC_SAI3_RXC_GPIO4_IO29 0x16 /* WIFI reset-gpio */
- MX8MQ_IOMUXC_GPIO1_IO01_GPIO1_IO1 0x16 /* WIFI disable-gpio */
-
- MX8MQ_IOMUXC_GPIO1_IO03_GPIO1_IO3 0x16 /* WIFI pewake */
- MX8MQ_IOMUXC_GPIO1_IO00_ANAMIX_REF_CLK_32K 0x16
- >;
- };
-
pinctrl_usdhc1: usdhc1grp {
fsl,pins = <
MX8MQ_IOMUXC_SD1_CLK_USDHC1_CLK 0x83
@@ -344,14 +318,11 @@
};
};
-&pcie1 {
+&i2c3 {
+ clock-frequency = <400000>;
pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_pcie1>;
- reset-gpio = <&gpio4 29 GPIO_ACTIVE_LOW>;
- disable-gpio = <&gpio1 1 GPIO_ACTIVE_LOW>;
- ext_osc = <0>;
- hard-wired = <1>;
- status = "okay";
+ pinctrl-0 = <&pinctrl_i2c3>;
+ status = "disabled";
};
&pwm2 {
@@ -368,15 +339,6 @@
status = "okay";
};
-&uart4 { /* BT */
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_uart4>;
- assigned-clocks = <&clk IMX8MQ_CLK_UART4>;
- assigned-clock-parents = <&clk IMX8MQ_CLK_25M>;
- fsl,uart-has-rtscts;
- status = "okay";
-};
-
&usdhc1 {
pinctrl-names = "default", "state_100mhz", "state_200mhz";
pinctrl-0 = <&pinctrl_usdhc1>;
@@ -465,11 +427,11 @@
};
&resmem {
- linux,cma {
- compatible = "shared-dma-pool";
- reusable;
- size = <0 0x2c000000>;
- alloc-ranges = <0 0x40000000 0 0x40000000>;
- linux,cma-default;
- };
+ linux,cma {
+ compatible = "shared-dma-pool";
+ reusable;
+ size = <0 0x2c000000>;
+ alloc-ranges = <0 0x40000000 0 0x40000000>;
+ linux,cma-default;
+ };
};
diff --git a/recipes-kernel/linux/rvphone/cl-imx8/dts/cl-imx8-lvds.dtsi b/recipes-kernel/linux/rvphone/cl-imx8/dts/cl-imx8-lvds.dtsi
new file mode 100644
index 0000000..457b0cb
--- /dev/null
+++ b/recipes-kernel/linux/rvphone/cl-imx8/dts/cl-imx8-lvds.dtsi
@@ -0,0 +1,87 @@
+&iomuxc {
+ rvphone-cl-imx8-lvds {
+ pinctrl_dsi_lvds: dsilvdsgrp {
+ fsl,pins = <
+ MX8MQ_IOMUXC_GPIO1_IO06_GPIO1_IO6 0x16
+ >;
+ };
+ };
+};
+
+&i2c2 {
+ ti_bridge: sn65dsi83@2c {
+ compatible = "ti,sn65dsi83";
+ reg = <0x2c>;
+ ti,dsi-lanes = <1>;
+ ti,lvds-format = <1>;
+ ti,lvds-bpp = <24>;
+ ti,width-mm = <149>;
+ ti,height-mm = <93>;
+ enable-gpios = <&gpio1 6 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_dsi_lvds>;
+ status = "okay";
+
+ display-timings {
+ lvds {
+ clock-frequency = <30000000>;
+ hactive = <800>;
+ vactive = <480>;
+ hback-porch = <46>;
+ hfront-porch = <210>;
+ vback-porch = <23>;
+ vfront-porch = <22>;
+ hsync-len = <20>;
+ vsync-len = <10>;
+ hsync-active = <0>;
+ vsync-active = <0>;
+ de-active = <0>;
+ pixelclk-active = <0>;
+ };
+ };
+
+ port {
+ sn65dsi83_in: endpoint {
+ remote-endpoint = <&mipi_dsi_bridge_out>;
+ };
+ };
+ };
+};
+
+&mipi_dsi_bridge {
+ status = "okay";
+
+ port@1 {
+ mipi_dsi_bridge_out: endpoint {
+ remote-endpoint = <&sn65dsi83_in>;
+ };
+ };
+};
+
+&lcdif {
+ status = "okay";
+ max-res = <1920>, <1200>;
+
+ port@0 {
+ lcdif_mipi_dsi: mipi-dsi-endpoint {
+ remote-endpoint = <&mipi_dsi_in>;
+ };
+ };
+};
+
+&mipi_dsi_phy {
+ status = "okay";
+};
+
+&mipi_dsi {
+ status = "okay";
+ as_bridge;
+ sync-pol = <1>;
+ pwr-delay = <10>;
+
+ port@1 {
+ mipi_dsi_in: endpoint {
+ remote-endpoint = <&lcdif_mipi_dsi>;
+ };
+ };
+};
diff --git a/recipes-kernel/linux/rvphone/cl-imx8/dts/cl-imx8-touch.dtsi b/recipes-kernel/linux/rvphone/cl-imx8/dts/cl-imx8-touch.dtsi
new file mode 100644
index 0000000..b59fba1
--- /dev/null
+++ b/recipes-kernel/linux/rvphone/cl-imx8/dts/cl-imx8-touch.dtsi
@@ -0,0 +1,28 @@
+&iomuxc {
+ rvphone-cl-imx8-touch {
+ pinctrl_ts: tsgrp {
+ fsl,pins = <
+ MX8MQ_IOMUXC_UART4_RXD_GPIO5_IO28 0x16 /* TOUCH IRQ */
+ MX8MQ_IOMUXC_UART4_TXD_GPIO5_IO29 0x16 /* TOUCH RST */
+ >;
+ };
+ };
+};
+
+&i2c3 {
+ status = "okay";
+ goodix_ts@5d {
+ compatible = "goodix,gt911";
+ reg = <0x5d>;
+
+ interrupt-parent = <&gpio5>;
+ interrupts = <28 IRQ_TYPE_EDGE_FALLING>;
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_ts>;
+
+ irq-gpios = <&gpio5 28 GPIO_ACTIVE_HIGH>;
+ reset-gpios = <&gpio5 29 GPIO_ACTIVE_HIGH>;
+ status = "okay";
+ };
+};
diff --git a/recipes-kernel/linux/rvphone/cl-imx8/dts/cl-imx8-wifi.dtsi b/recipes-kernel/linux/rvphone/cl-imx8/dts/cl-imx8-wifi.dtsi
new file mode 100644
index 0000000..45acca5
--- /dev/null
+++ b/recipes-kernel/linux/rvphone/cl-imx8/dts/cl-imx8-wifi.dtsi
@@ -0,0 +1,24 @@
+&iomuxc {
+ rvphone-cl-imx8-wifi {
+ pinctrl_pcie1: pcie1grp {
+ fsl,pins = <
+ MX8MQ_IOMUXC_SAI3_RXC_GPIO4_IO29 0x16 /* WIFI reset-gpio */
+ MX8MQ_IOMUXC_GPIO1_IO01_GPIO1_IO1 0x16 /* WIFI disable-gpio */
+
+ MX8MQ_IOMUXC_GPIO1_IO03_GPIO1_IO3 0x16 /* WIFI pewake */
+ MX8MQ_IOMUXC_GPIO1_IO00_ANAMIX_REF_CLK_32K 0x16
+ >;
+ };
+
+ };
+};
+
+&pcie1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_pcie1>;
+ reset-gpio = <&gpio4 29 GPIO_ACTIVE_LOW>;
+ disable-gpio = <&gpio1 1 GPIO_ACTIVE_LOW>;
+ ext_osc = <0>;
+ hard-wired = <1>;
+ status = "okay";
+};