From a0327a0efa195b4936ab7791a15bad07f703e9b9 Mon Sep 17 00:00:00 2001
From: Uros Majstorovic <majstor@majstor.org>
Date: Wed, 21 Mar 2018 05:58:25 +0100
Subject: added missing headers for asm version of spi handlers

---
 code/fe310/eos/net_def.h |  8 ++++++++
 code/fe310/eos/spi_def.h | 26 ++++++++++++++++++++++++++
 2 files changed, 34 insertions(+)
 create mode 100644 code/fe310/eos/net_def.h
 create mode 100644 code/fe310/eos/spi_def.h

(limited to 'code/fe310')

diff --git a/code/fe310/eos/net_def.h b/code/fe310/eos/net_def.h
new file mode 100644
index 0000000..18e9417
--- /dev/null
+++ b/code/fe310/eos/net_def.h
@@ -0,0 +1,8 @@
+#define EOS_NET_CMD_FLAG_ONEW   0x10
+
+#define EOS_NET_CMD_CONNECT     1
+#define EOS_NET_CMD_DISCONNECT  2
+#define EOS_NET_CMD_SCAN        3
+#define EOS_NET_CMD_PKT         4
+
+#define EOS_NET_MAX_CMD         4
diff --git a/code/fe310/eos/spi_def.h b/code/fe310/eos/spi_def.h
new file mode 100644
index 0000000..48bcfab
--- /dev/null
+++ b/code/fe310/eos/spi_def.h
@@ -0,0 +1,26 @@
+#define SPI_SIZE_BUF            1500
+#define SPI_SIZE_BUFQ           2
+
+#define SPI_MODE0               0x00
+#define SPI_MODE1               0x01
+#define SPI_MODE2               0x02
+#define SPI_MODE3               0x03
+
+#define SPI_SIZE_CHUNK          4
+#define SPI_SIZE_TXWM           2
+#define SPI_SIZE_RXWM           3
+
+#define SPI_PIN_RTS             0   // pin 8
+#define SPI_PIN_CTS             23  // pin 7
+
+#define SPI_FLAG_RDY            0x01
+#define SPI_FLAG_RST            0x02
+#define SPI_FLAG_RTS            0x04
+#define SPI_FLAG_CTS            0x08
+#define SPI_FLAG_INIT           0x10
+#define SPI_FLAG_ONEW           0x20
+
+/* asm */
+#define SPI_BUFQ_OFF_IDXR       0
+#define SPI_BUFQ_OFF_IDXW       1
+#define SPI_BUFQ_OFF_ARRAY      4
-- 
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