From 58f41971b1e801ad2fbcea08e5152afa2b18ca73 Mon Sep 17 00:00:00 2001 From: Uros Majstorovic Date: Mon, 28 Jul 2025 23:27:12 +0200 Subject: sys logging added; power management reimplemented; bugfixes; --- fw/fe310/eos/eve/eve.c | 176 ++++++++++++++++++++++++++++++------------------- 1 file changed, 107 insertions(+), 69 deletions(-) (limited to 'fw/fe310/eos/eve/eve.c') diff --git a/fw/fe310/eos/eve/eve.c b/fw/fe310/eos/eve/eve.c index 45ac886..e5c5f80 100644 --- a/fw/fe310/eos/eve/eve.c +++ b/fw/fe310/eos/eve/eve.c @@ -12,86 +12,86 @@ static uint16_t cmd_offset; static char dl_burst; static uint32_t dl_addr; -static uint8_t power_state; +static uint8_t power_state = EVE_PSTATE_ACTIVE; static int lcd_absent = 0; void eve_command(uint8_t command, uint8_t parameter) { - eve_spi_cs_set(); + eve_spi_set_cs(); eve_spi_xchg24(((uint32_t)command << 16) | ((uint32_t)parameter << 8), 0); - eve_spi_cs_clear(); + eve_spi_clear_cs(); } uint8_t eve_read8(uint32_t addr) { - uint8_t r; - eve_spi_cs_set(); + uint8_t rv; + eve_spi_set_cs(); eve_spi_xchg32(addr << 8, 0); - r = eve_spi_xchg8(0, EVE_SPI_FLAG_BSWAP); - eve_spi_cs_clear(); + rv = eve_spi_xchg8(0, EVE_SPI_FLAG_BSWAP); + eve_spi_clear_cs(); - return r; + return rv; } uint16_t eve_read16(uint32_t addr) { - uint16_t r; - eve_spi_cs_set(); + uint16_t rv; + eve_spi_set_cs(); eve_spi_xchg32(addr << 8, 0); - r = eve_spi_xchg16(0, EVE_SPI_FLAG_BSWAP); - eve_spi_cs_clear(); + rv = eve_spi_xchg16(0, EVE_SPI_FLAG_BSWAP); + eve_spi_clear_cs(); - return r; + return rv; } uint32_t eve_read32(uint32_t addr) { - uint32_t r; - eve_spi_cs_set(); + uint32_t rv; + eve_spi_set_cs(); eve_spi_xchg32(addr << 8, 0); - r = eve_spi_xchg32(0, EVE_SPI_FLAG_BSWAP); - eve_spi_cs_clear(); + rv = eve_spi_xchg32(0, EVE_SPI_FLAG_BSWAP); + eve_spi_clear_cs(); - return r; + return rv; } void eve_write8(uint32_t addr, uint8_t data) { - eve_spi_cs_set(); + eve_spi_set_cs(); eve_spi_xchg24(addr | EVE_MEM_WRITE, 0); eve_spi_xchg8(data, EVE_SPI_FLAG_BSWAP); - eve_spi_cs_clear(); + eve_spi_clear_cs(); } void eve_write16(uint32_t addr, uint16_t data) { - eve_spi_cs_set(); + eve_spi_set_cs(); eve_spi_xchg24(addr | EVE_MEM_WRITE, 0); eve_spi_xchg16(data, EVE_SPI_FLAG_BSWAP); - eve_spi_cs_clear(); + eve_spi_clear_cs(); } void eve_write32(uint32_t addr, uint32_t data) { - eve_spi_cs_set(); + eve_spi_set_cs(); eve_spi_xchg24(addr | EVE_MEM_WRITE, 0); eve_spi_xchg32(data, EVE_SPI_FLAG_BSWAP); - eve_spi_cs_clear(); + eve_spi_clear_cs(); } void eve_readb(uint32_t addr, uint8_t *buf, size_t size) { int i; - eve_spi_cs_set(); + eve_spi_set_cs(); eve_spi_xchg32(addr << 8, 0); for (i=0; i EVE_CMD_EXEC_TO) break; + } while (!rv); + if (eve_tdelta_ms(start) > EVE_CMD_EXEC_TO) return EVE_ERR_TIMEOUT; + if (rv < 0) return EVE_ERR; } return EVE_OK; } +void eve_cmd_set_offset(void) { + cmd_offset = eve_read16(REG_CMD_READ); +} + void eve_cmd_burst_start(void) { uint32_t addr = EVE_RAM_CMD + cmd_offset; - eve_spi_lock(); - eve_spi_cs_set(); + eve_spi_set_cs(); eve_spi_xchg24(addr | EVE_MEM_WRITE, EVE_SPI_FLAG_TX); cmd_burst = 1; } void eve_cmd_burst_end(void) { eve_spi_flush(); - eve_spi_cs_clear(); - eve_spi_unlock(); + eve_spi_clear_cs(); cmd_burst = 0; } @@ -363,6 +368,7 @@ int eve_init(void) { eve_write8(REG_VOL_PB, 0x00); /* turn recorded audio volume off */ /* configure interrupts */ + eve_write8(REG_INT_EN, 0); eve_write16(REG_INT_MASK, 0); /* write a basic display-list to get things started */ @@ -378,28 +384,22 @@ int eve_init(void) { #endif /* nothing is being displayed yet... the pixel clock is still 0x00 */ + power_state = EVE_PSTATE_ACTIVE; + return EVE_OK; } void eve_clk_start(void) { - uint16_t gpiox; - eve_write8(REG_PCLK, EVE_PCLK); /* start clocking data to the LCD panel */ - gpiox = eve_read16(REG_GPIOX) | 0x8000; - eve_write16(REG_GPIOX, gpiox); /* enable the DISP signal to the LCD panel, it is set to output in REG_GPIOX_DIR */ } void eve_clk_stop(void) { - uint16_t gpiox; - - gpiox = eve_read16(REG_GPIOX) & ~0x8000; - eve_write16(REG_GPIOX, gpiox); eve_write8(REG_PCLK, 0); } void eve_intr_enable(void) { - eve_write8(REG_INT_EN, 0x01); while(eve_read8(REG_INT_FLAGS)); + eve_write8(REG_INT_EN, 0x01); } void eve_intr_disable(void) { @@ -408,8 +408,27 @@ void eve_intr_disable(void) { } void eve_activate(void) { + if (power_state == EVE_PSTATE_ACTIVE) return; + eve_command(EVE_ACTIVE, 0); - eve_sleep(40); + if (power_state == EVE_PSTATE_SLEEP) { + eve_sleep(20); + } +} + +void eve_deactivate(void) { + switch (power_state) { + case EVE_PSTATE_ACTIVE: + return; + + case EVE_PSTATE_STANDBY: + eve_command(EVE_STANDBY, 0); + break; + + case EVE_PSTATE_SLEEP: + eve_command(EVE_SLEEP, 0); + break; + } } void eve_pwr_standby(void) { @@ -423,9 +442,6 @@ void eve_pwr_standby(void) { void eve_pwr_sleep(void) { if (power_state != EVE_PSTATE_ACTIVE) return; - eve_clk_stop(); - eve_intr_disable(); - eve_command(EVE_SLEEP, 0); power_state = EVE_PSTATE_SLEEP; @@ -434,14 +450,17 @@ void eve_pwr_sleep(void) { void eve_pwr_wake(void) { eve_activate(); - if (power_state == EVE_PSTATE_SLEEP) { - eve_intr_enable(); - eve_clk_start(); - } - power_state = EVE_PSTATE_ACTIVE; } +void eve_pwr_set_state(uint8_t state) { + power_state = state; +} + +uint8_t eve_pwr_state(void) { + return power_state; +} + int eve_gpio_get(int gpio) { uint16_t reg = eve_read16(REG_GPIOX); @@ -456,17 +475,33 @@ void eve_gpio_set(int gpio, int val) { eve_write16(REG_GPIOX, reg); } -uint8_t eve_gpio_get_dir(void) { +uint16_t eve_gpio_read(void) { + uint16_t reg = eve_read16(REG_GPIOX); + + return reg & EVE_GPIO_MASK; +} + +void eve_gpio_write(uint16_t gpio) { + uint16_t reg = eve_read16(REG_GPIOX); + + gpio &= EVE_GPIO_MASK; + reg &= ~EVE_GPIO_MASK; + reg |= gpio; + eve_write16(REG_GPIOX, reg); +} + +uint16_t eve_gpio_read_dir(void) { uint16_t reg = eve_read16(REG_GPIOX_DIR); - return reg & 0x000f; + return reg & EVE_GPIO_MASK; } -void eve_gpio_set_dir(uint8_t dir) { +void eve_gpio_write_dir(uint16_t dir) { uint16_t reg = eve_read16(REG_GPIOX_DIR); - reg &= 0xfff0; - reg |= dir & 0x0f; + dir &= EVE_GPIO_MASK; + reg &= ~EVE_GPIO_MASK; + reg |= dir; eve_write16(REG_GPIOX_DIR, reg); } @@ -490,5 +525,8 @@ void eve_copro_reset(void) { eve_write16(REG_CMD_DL, 0); eve_write8(REG_CPURESET, 0); eve_write16(REG_COPRO_PATCH_PTR, ptr); + /* From programming guide: + To enable coprocessor access flash content, send commands CMD_FLASHATTACH following CMD_FLASHFAST. + It will make sure flash enters full speed mode.*/ eve_write8(REG_PCLK, EVE_PCLK); } -- cgit v1.2.3