From 8775caf20ce7c0a776b9f66c5b287b077c8afcee Mon Sep 17 00:00:00 2001
From: Uros Majstorovic <majstor@majstor.org>
Date: Sun, 4 Sep 2022 18:25:23 +0200
Subject: driver for lcd: ili9806e and gt911

---
 fw/fe310/eos/soc/spi9bit.c | 57 ++++++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 57 insertions(+)
 create mode 100644 fw/fe310/eos/soc/spi9bit.c

(limited to 'fw/fe310/eos/soc/spi9bit.c')

diff --git a/fw/fe310/eos/soc/spi9bit.c b/fw/fe310/eos/soc/spi9bit.c
new file mode 100644
index 0000000..712dc81
--- /dev/null
+++ b/fw/fe310/eos/soc/spi9bit.c
@@ -0,0 +1,57 @@
+#include <stdlib.h>
+#include <stdint.h>
+#include <string.h>
+#include <stdio.h>
+
+#include "encoding.h"
+#include "platform.h"
+
+#include "eos.h"
+
+#include "spi9bit.h"
+
+#define BIT_GET         ((GPIO_REG(GPIO_INPUT_VAL) & (1 << IOF_SPI1_MISO)) >> IOF_SPI1_MISO)
+#define BIT_PUT(b)      { if (b) GPIO_REG(GPIO_OUTPUT_VAL) |= (1 << IOF_SPI1_MOSI); else GPIO_REG(GPIO_OUTPUT_VAL) &= ~(1 << IOF_SPI1_MOSI); }
+
+#define SCK_UP          { GPIO_REG(GPIO_OUTPUT_VAL) |= (1 << IOF_SPI1_SCK); }
+#define SCK_DN          { GPIO_REG(GPIO_OUTPUT_VAL) &= ~(1 << IOF_SPI1_SCK); }
+
+static inline void _sleep(int n) {
+    volatile int x = n;
+
+    while(x) x--;
+}
+
+/* sck frequency for r/w operations is 0.8Mhz */
+void eos_spi9bit_read(uint8_t *data) {
+    int i;
+
+    *data = 0;
+    for (i=0; i<8; i++) {
+        _sleep(10);
+        *data = *data << 1;
+        *data |= BIT_GET;
+        SCK_UP;
+        _sleep(10);
+        SCK_DN;
+    }
+}
+
+void eos_spi9bit_write(uint8_t dc, uint8_t data) {
+    int i;
+
+    BIT_PUT(dc);
+    _sleep(10);
+    SCK_UP;
+    for (i=0; i<8; i++) {
+        _sleep(10);
+        SCK_DN;
+        BIT_PUT(data & 0x80);
+        _sleep(10);
+        SCK_UP;
+        data = data << 1;
+    }
+    _sleep(10);
+    SCK_DN;
+    BIT_PUT(0);
+}
-- 
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