From 9cb8a37e71945800da5aa6fc05a9a32dc7bd0b69 Mon Sep 17 00:00:00 2001 From: Uros Majstorovic Date: Fri, 21 Apr 2023 21:18:29 +0200 Subject: fixed gpio out val change when i2s is running --- fw/fe310/eos/dev/lcd.c | 79 ++++++++++++++++++++++++++++------------------ fw/fe310/eos/soc/spi.c | 14 +++----- fw/fe310/eos/soc/spi9bit.c | 6 ++-- 3 files changed, 56 insertions(+), 43 deletions(-) (limited to 'fw') diff --git a/fw/fe310/eos/dev/lcd.c b/fw/fe310/eos/dev/lcd.c index 69651d0..4557fb0 100644 --- a/fw/fe310/eos/dev/lcd.c +++ b/fw/fe310/eos/dev/lcd.c @@ -1,7 +1,6 @@ #include #include -#include "encoding.h" #include "platform.h" #include "eos.h" @@ -9,7 +8,7 @@ #include "board.h" #include "soc/timer.h" -#include "soc/pwr.h" +#include "soc/i2s.h" #include "eve/eve.h" #include "eve.h" @@ -42,7 +41,7 @@ static int lcd_disable(void) { return EOS_OK; } -int lcd_select(void) { +static int lcd_select(void) { int rv; GPIO_REG(GPIO_OUTPUT_XOR) |= (1 << SPI_CSPIN_LCD); @@ -60,32 +59,36 @@ int lcd_select(void) { return EOS_OK; } -void lcd_deselect(void) { +static void lcd_deselect(void) { eos_spi_deselect(); GPIO_REG(GPIO_OUTPUT_EN) &= ~(1 << SPI_CSPIN_LCD); GPIO_REG(GPIO_OUTPUT_XOR) &= ~(1 << SPI_CSPIN_LCD); GPIO_REG(GPIO_OUTPUT_VAL) &= ~(1 << SPI_CSPIN_LCD); } -int eos_lcd_init(uint8_t wakeup_cause) { - int rst = (wakeup_cause == EOS_PWR_WAKE_RST); +static int lcd_init(void) { int rv; - rv = eos_lcd_wake(); + rv = lcd_enable(); if (rv) return rv; - eos_gt911_init(); - if (rst) { - eos_gt911_reset(); - } else { - /* There is a problem with GT911 and sleep */ - // eos_gt911_wake(); - eos_gt911_reset(); + eos_time_sleep(200); + + rv = lcd_select(); + if (rv) { + lcd_disable(); + return rv; } - return EOS_OK; + + rv = eos_ili9806e_init(); + if (rv == EOS_ERR_ABSENT) eve_lcd_absent(); + lcd_deselect(); + + if (rv) lcd_disable(); + return rv; } -int eos_lcd_sleep(void) { +static int lcd_sleep(void) { int rv; rv = lcd_select(); @@ -97,29 +100,45 @@ int eos_lcd_sleep(void) { rv = lcd_disable(); if (rv) return rv; + return EOS_OK; +} + +int eos_lcd_init(uint8_t wakeup_cause) { + int rv; + + rv = lcd_init(); + if (rv) return rv; + + rv = eos_gt911_init(wakeup_cause); + if (rv) return rv; + + return EOS_OK; +} + +int eos_lcd_sleep(void) { + int rv; + + if (eos_i2s_running()) return EOS_ERR_BUSY; + /* There is a problem with GT911 and sleep */ // eos_gt911_sleep(); + + rv = lcd_sleep(); + if (rv) return rv; + return EOS_OK; } int eos_lcd_wake(void) { int rv; - rv = lcd_enable(); - if (rv) return rv; - - eos_time_sleep(200); + if (eos_i2s_running()) return EOS_ERR_BUSY; - rv = lcd_select(); - if (rv) { - lcd_disable(); - return rv; - } + rv = lcd_init(); + if (rv) return rv; - rv = eos_ili9806e_init(); - if (rv == EOS_ERR_ABSENT) eve_lcd_absent(); - lcd_deselect(); + /* There is a problem with GT911 and sleep */ + // eos_gt911_wake(); - if (rv) lcd_disable(); - return rv; + return EOS_OK; } diff --git a/fw/fe310/eos/soc/spi.c b/fw/fe310/eos/soc/spi.c index 351c9c8..1806f50 100644 --- a/fw/fe310/eos/soc/spi.c +++ b/fw/fe310/eos/soc/spi.c @@ -188,7 +188,9 @@ void eos_spi_handle_xchg(void) { void eos_spi_cs_set(void) { /* cs low */ if (SPI1_REG(SPI_REG_CSMODE) == SPI_CSMODE_OFF) { + clear_csr(mstatus, MSTATUS_MIE); GPIO_REG(GPIO_OUTPUT_VAL) &= ~(1 << spi_cspin); + set_csr(mstatus, MSTATUS_MIE); } else { SPI1_REG(SPI_REG_CSMODE) = SPI_CSMODE_HOLD; } @@ -197,7 +199,9 @@ void eos_spi_cs_set(void) { void eos_spi_cs_clear(void) { /* cs high */ if (SPI1_REG(SPI_REG_CSMODE) == SPI_CSMODE_OFF) { + clear_csr(mstatus, MSTATUS_MIE); GPIO_REG(GPIO_OUTPUT_VAL) |= (1 << spi_cspin); + set_csr(mstatus, MSTATUS_MIE); } else { SPI1_REG(SPI_REG_CSMODE) = SPI_CSMODE_AUTO; } @@ -363,14 +367,4 @@ void eos_spi_flush(void) { while (!(SPI1_REG(SPI_REG_IP) & SPI_IP_TXWM)); while (!(SPI1_REG(SPI_REG_RXFIFO) & SPI_RXFIFO_EMPTY)); } - - /* - volatile uint32_t x = 0; - - while (!x) { - if (SPI1_REG(SPI_REG_IP) & SPI_IP_TXWM) { - x = SPI1_REG(SPI_REG_RXFIFO) & SPI_RXFIFO_EMPTY; - } - } - */ } diff --git a/fw/fe310/eos/soc/spi9bit.c b/fw/fe310/eos/soc/spi9bit.c index 712dc81..e48e9e2 100644 --- a/fw/fe310/eos/soc/spi9bit.c +++ b/fw/fe310/eos/soc/spi9bit.c @@ -11,10 +11,10 @@ #include "spi9bit.h" #define BIT_GET ((GPIO_REG(GPIO_INPUT_VAL) & (1 << IOF_SPI1_MISO)) >> IOF_SPI1_MISO) -#define BIT_PUT(b) { if (b) GPIO_REG(GPIO_OUTPUT_VAL) |= (1 << IOF_SPI1_MOSI); else GPIO_REG(GPIO_OUTPUT_VAL) &= ~(1 << IOF_SPI1_MOSI); } +#define BIT_PUT(b) { clear_csr(mstatus, MSTATUS_MIE); if (b) GPIO_REG(GPIO_OUTPUT_VAL) |= (1 << IOF_SPI1_MOSI); else GPIO_REG(GPIO_OUTPUT_VAL) &= ~(1 << IOF_SPI1_MOSI); set_csr(mstatus, MSTATUS_MIE); } -#define SCK_UP { GPIO_REG(GPIO_OUTPUT_VAL) |= (1 << IOF_SPI1_SCK); } -#define SCK_DN { GPIO_REG(GPIO_OUTPUT_VAL) &= ~(1 << IOF_SPI1_SCK); } +#define SCK_UP { clear_csr(mstatus, MSTATUS_MIE); GPIO_REG(GPIO_OUTPUT_VAL) |= (1 << IOF_SPI1_SCK); set_csr(mstatus, MSTATUS_MIE); } +#define SCK_DN { clear_csr(mstatus, MSTATUS_MIE); GPIO_REG(GPIO_OUTPUT_VAL) &= ~(1 << IOF_SPI1_SCK); set_csr(mstatus, MSTATUS_MIE); } static inline void _sleep(int n) { volatile int x = n; -- cgit v1.2.3