From 9f08d9e1892f78efdf84ac067ee2ebd0bd077d69 Mon Sep 17 00:00:00 2001 From: Uros Majstorovic Date: Thu, 12 Sep 2024 15:53:12 +0200 Subject: ext gpio driver initial commit --- fw/fe310/eos/dev/egpio.c | 21 ++++++++++++++++ fw/fe310/eos/dev/egpio.h | 46 +++++++++++++++++++++++++++++++++++ fw/fe310/eos/dev/fxl6408.c | 60 ++++++++++++++++++++++++++++++++++++++++++++++ fw/fe310/eos/dev/fxl6408.h | 17 +++++++++++++ 4 files changed, 144 insertions(+) create mode 100644 fw/fe310/eos/dev/egpio.c create mode 100644 fw/fe310/eos/dev/egpio.h create mode 100644 fw/fe310/eos/dev/fxl6408.c create mode 100644 fw/fe310/eos/dev/fxl6408.h (limited to 'fw') diff --git a/fw/fe310/eos/dev/egpio.c b/fw/fe310/eos/dev/egpio.c new file mode 100644 index 0000000..e5a39bf --- /dev/null +++ b/fw/fe310/eos/dev/egpio.c @@ -0,0 +1,21 @@ +#include +#include + +#include "eos.h" +#include "soc/i2c.h" + +#include "fxl6408.h" +#include "egpio.h" + +int eos_egpio_pin_get(uint8_t reg, uint8_t pin, uint8_t *val) { + uint8_t chip_id; + + chip_id = (pin & EGPIO_PIN_MASK_CHIP_ID) >> 4; + pin &= EGPIO_PIN_MASK; +} +int eos_egpio_pin_set(uint8_t reg, uint8_t pin, uint8_t val) { + uint8_t chip_id; + + chip_id = (pin & EGPIO_PIN_MASK_CHIP_ID) >> 4; + pin &= EGPIO_PIN_MASK; +} \ No newline at end of file diff --git a/fw/fe310/eos/dev/egpio.h b/fw/fe310/eos/dev/egpio.h new file mode 100644 index 0000000..e9573a7 --- /dev/null +++ b/fw/fe310/eos/dev/egpio.h @@ -0,0 +1,46 @@ +#include + +#define EGPIO0_EVE_INT 0x00 /* EVE interrrupt */ +#define EGPIO0_SDCARD_DET 0x01 /* SD Card detect */ +#define EGPIO0_EXP_IO0 0x02 /* expansion io 0 */ +#define EGPIO0_EXP_IO1 0x03 /* expansion io 1 */ +#define EGPIO0_BTN_WAKE 0x04 /* wake button */ +#define EGPIO0_BAT_INT 0x05 /* battery charger IC inetrrupt */ +#define EGPIO0_CTP_SEL 0x06 /* switch CTP connection: EVE_DISP:1 and CTP_SEL:0 - connected to EVE chip, EVE_DISP:1 and CTP_SEL:1 - connected to fe310 chip, EVE_DISP:0 and CTP_SEL:0 - connected to app module */ +#define EGPIO0_CTP_INT 0x07 /* CTP interrupt */ + +#define EGPIO1_MIC_DIS 0x00 /* microphone disable */ +#define EGPIO1_HP_AMP_CS 0x01 /* SPI chip select for headphone amplifier (pcm1770) */ +#define EGPIO1_MIC_SEL 0x02 /* switch mic connection: 0 - connected to app module, 1 - connected to fe310 chip */ +#define EGPIO1_HP_DET 0x03 /* headphone detect */ +#define EGPIO1_USR0 0x04 /* user IO */ +#define EGPIO1_USR1 0x05 +#define EGPIO1_USR2 0x06 +#define EGPIO1_USR3 0x07 + +#define EGPIO_CHIP_ID0 0x00 +#define EGPIO_CHIP_ID1 0x10 + +#define EGPIO_PIN_EVE_INT (EGPIO_CHIP_ID0 | EGPIO0_EVE_INT) +#define EGPIO_PIN_SDCARD_DET (EGPIO_CHIP_ID0 | EGPIO0_SDCARD_DET) +#define EGPIO_PIN_EXP_IO0 (EGPIO_CHIP_ID0 | EGPIO0_EXP_IO0) +#define EGPIO_PIN_EXP_IO1 (EGPIO_CHIP_ID0 | EGPIO0_EXP_IO1) +#define EGPIO_PIN_BTN_WAKE (EGPIO_CHIP_ID0 | EGPIO0_BTN_WAKE) +#define EGPIO_PIN_BAT_INT (EGPIO_CHIP_ID0 | EGPIO0_BAT_INT) +#define EGPIO_PIN_CTP_SEL (EGPIO_CHIP_ID0 | EGPIO0_CTP_SEL) +#define EGPIO_PIN_CTP_INT (EGPIO_CHIP_ID0 | EGPIO0_CTP_INT) + +#define EGPIO_PIN_MIC_DIS (EGPIO_CHIP_ID1 | EGPIO1_MIC_DIS) +#define EGPIO_PIN_HP_AMP_CS (EGPIO_CHIP_ID1 | EGPIO1_HP_AMP_CS) +#define EGPIO_PIN_MIC_SEL (EGPIO_CHIP_ID1 | EGPIO1_MIC_SEL) +#define EGPIO_PIN_HP_DET (EGPIO_CHIP_ID1 | EGPIO1_HP_DET) +#define EGPIO_PIN_USR0 (EGPIO_CHIP_ID1 | EGPIO1_USR0) +#define EGPIO_PIN_USR1 (EGPIO_CHIP_ID1 | EGPIO1_USR1) +#define EGPIO_PIN_USR2 (EGPIO_CHIP_ID1 | EGPIO1_USR2) +#define EGPIO_PIN_USR3 (EGPIO_CHIP_ID1 | EGPIO1_USR3) + +#define EGPIO_PIN_MASK 0x07 +#define EGPIO_PIN_MASK_CHIP_ID 0x10 + +int eos_egpio_pin_get(uint8_t reg, uint8_t pin, uint8_t *val); +int eos_egpio_pin_set(uint8_t reg, uint8_t pin, uint8_t val); diff --git a/fw/fe310/eos/dev/fxl6408.c b/fw/fe310/eos/dev/fxl6408.c new file mode 100644 index 0000000..812c584 --- /dev/null +++ b/fw/fe310/eos/dev/fxl6408.c @@ -0,0 +1,60 @@ +#include +#include + +#include "eos.h" +#include "soc/i2c.h" + +#include "fxl6408.h" + +#define FXL6408_ADDR0 0x43 +#define FXL6408_ADDR1 0x44 + +int eos_fxl6408_reg_read(uint8_t chip_id, uint8_t reg, uint8_t *data) { + uint8_t addr = chip_id ? FXL6408_ADDR1 : FXL6408_ADDR0; + int rv; + + rv = eos_i2c_read8(addr, reg, data, 1); + return rv; +} + +int eos_fxl6408_reg_write(uint8_t chip_id, uint8_t reg, uint8_t data) { + uint8_t addr = chip_id ? FXL6408_ADDR1 : FXL6408_ADDR0; + int rv; + + rv = eos_i2c_write8(addr, reg, &data, 1); + return rv; +} + +int eos_fxl6408_pin_get(uint8_t chip_id, uint8_t reg, uint8_t pin, uint8_t *val) { + uint8_t addr = chip_id ? FXL6408_ADDR1 : FXL6408_ADDR0; + uint8_t data; + int rv; + + if (reg == FXL6408_REG_ID_CTRL) return EOS_ERR; + + rv = eos_i2c_read8(addr, reg, &data, 1); + return rv; + + *val = data >> pin; + *val &= 0x01; + + return EOS_OK; +} + +int eos_fxl6408_pin_set(uint8_t chip_id, uint8_t reg, uint8_t pin, uint8_t val) { + uint8_t addr = chip_id ? FXL6408_ADDR1 : FXL6408_ADDR0; + uint8_t data; + int rv; + + if (reg == FXL6408_REG_ID_CTRL || FXL6408_REG_I_STATE) return EOS_ERR; + + rv = eos_i2c_read8(addr, reg, &data, 1); + return rv; + + val &= 0x01; + data &= ~(1 << pin); + if (val) data |= (1 << pin); + + rv = eos_i2c_write8(addr, reg, &data, 1); + return rv; +} diff --git a/fw/fe310/eos/dev/fxl6408.h b/fw/fe310/eos/dev/fxl6408.h new file mode 100644 index 0000000..f0e9c3a --- /dev/null +++ b/fw/fe310/eos/dev/fxl6408.h @@ -0,0 +1,17 @@ +#include + +#define FXL6408_REG_ID_CTRL 0x01 +#define FXL6408_REG_IO_DIR 0x03 +#define FXL6408_REG_O_STATE 0x05 +#define FXL6408_REG_O_HIZ 0x07 +#define FXL6408_REG_I_DEFAULT 0x09 +#define FXL6408_REG_PULL_ENA 0x0B +#define FXL6408_REG_PULL_DIR 0x0D +#define FXL6408_REG_I_STATE 0x0F +#define FXL6408_REG_INT_MASK 0x11 +#define FXL6408_REG_INT_STATE 0x13 + +int eos_fxl6408_reg_read(uint8_t chip_id, uint8_t reg, uint8_t *data); +int eos_fxl6408_reg_write(uint8_t chip_id, uint8_t reg, uint8_t data); +int eos_fxl6408_pin_get(uint8_t chip_id, uint8_t reg, uint8_t pin, uint8_t *val); +int eos_fxl6408_pin_set(uint8_t chip_id, uint8_t reg, uint8_t pin, uint8_t val); \ No newline at end of file -- cgit v1.2.3