From c3c3e5f66fb24c584fefde1c0805e952d539ba9f Mon Sep 17 00:00:00 2001 From: Uros Majstorovic Date: Tue, 5 May 2026 00:05:12 +0200 Subject: JLCPCB order W2025070409252353 --- hw/stencil2/stencil2.pro | 33 +++++++++++++++++++++++++++++++++ 1 file changed, 33 insertions(+) create mode 100644 hw/stencil2/stencil2.pro (limited to 'hw/stencil2/stencil2.pro') diff --git a/hw/stencil2/stencil2.pro b/hw/stencil2/stencil2.pro new file mode 100644 index 0000000..152769c --- /dev/null +++ b/hw/stencil2/stencil2.pro @@ -0,0 +1,33 @@ +update=22/05/2015 07:44:53 +version=1 +last_client=kicad +[general] +version=1 +RootSch= +BoardNm= +[pcbnew] +version=1 +LastNetListRead= +UseCmpFile=1 +PadDrill=0.600000000000 +PadDrillOvalY=0.600000000000 +PadSizeH=1.500000000000 +PadSizeV=1.500000000000 +PcbTextSizeV=1.500000000000 +PcbTextSizeH=1.500000000000 +PcbTextThickness=0.300000000000 +ModuleTextSizeV=1.000000000000 +ModuleTextSizeH=1.000000000000 +ModuleTextSizeThickness=0.150000000000 +SolderMaskClearance=0.000000000000 +SolderMaskMinWidth=0.000000000000 +DrawSegmentWidth=0.200000000000 +BoardOutlineThickness=0.100000000000 +ModuleOutlineThickness=0.150000000000 +[cvpcb] +version=1 +NetIExt=net +[eeschema] +version=1 +LibDir= +[eeschema/libraries] -- cgit v1.2.3