#define SPI_DIV_NET             16      /* 60 MHz max */
#define SPI_DIV_EVE             5       /* 30 MHz max */
#define SPI_DIV_SDC             5
#define SPI_DIV_CAM             24
#define SPI_DIV_LCD             0       /* spi 9bit */
#define SPI_DIV_HPAMP           1024

#define SPI_CSID_NET            0
#define SPI_CSID_EVE            2
#define SPI_CSID_SDC            SPI_CSID_NONE
#define SPI_CSID_CAM            3
#define SPI_CSID_LCD            SPI_CSID_NONE
#define SPI_CSID_HPAMP          SPI_CSID_NONE

#define SPI_CSPIN_NET           2
#define SPI_CSPIN_EVE           9
#define SPI_CSPIN_SDC           0
#define SPI_CSPIN_CAM           10
#define SPI_CSPIN_LCD           21      /* only when i2s is off */
#define SPI_CSPIN_HPAMP         (SPI_CSFLAG_EGPIO | EGPIO_PIN_HPAMP_CS)

#define SPI_IOF_MASK            ((1 << IOF_SPI1_SCK) | (1 << IOF_SPI1_MOSI) | (1 << IOF_SPI1_MISO) | (1 << IOF_SPI1_SS0) | (1 << IOF_SPI1_SS2) | (1 << IOF_SPI1_SS3))
// #define SPI_IOF_CSXOR           ((1 << IOF_SPI1_SS0) | (1 << IOF_SPI1_SS3))
#define SPI_IOF_CSXOR           0

#define NET_PIN_RTS             22
#define NET_PIN_CTS             20

#define EGPIO_PIN_INT           23

#define I2S_PIN_CK              1       /* PWM 0.1 */
#define I2S_PIN_SR_CK           18
#define I2S_PIN_SR_SEL          11      /* PWM 2.1 */
#define I2S_PIN_WS_MIC          19      /* PWM 1.1 */
#define I2S_PIN_WS_SPK          21      /* PWM 1.2 */
#define I2S_PIN_SD_IN           17
#define I2S_PIN_SD_OUT          16
#define I2S_PIN_INT             16

/* only when i2s is off */
#define CTP_PIN_INT             1       /* EGPIO_PIN_CTP_SEL is on: CTP int; EGPIO_PIN_CTP_SEL is off: EVE int */
#define CTP_PIN_RST             19      /* only when EGPIO_PIN_CTP_SEL is on */

/* EVE gpio in dev/eve_priv.h */
/* FXL6408 gpio in dev/egpio.h */