(module DHVQFN-14_2.5x3.0mm_P0.5mm_EP1.0x1.5mm (layer F.Cu) (tedit 60DA5DBF)
  (descr "DHVQFN-14 SOT762-1")
  (tags "Integrated Circuit")
  (attr smd)
  (fp_text reference REF** (at 0 -2.8) (layer F.SilkS)
    (effects (font (size 1 1) (thickness 0.15)))
  )
  (fp_text value DHVQFN-14_2.5x3.0mm_P0.5mm_EP1.0x1.5mm (at 0 2.85) (layer F.Fab)
    (effects (font (size 1 1) (thickness 0.15)))
  )
  (fp_line (start -1.6 -1.35) (end -1.4 -1.35) (layer F.SilkS) (width 0.12))
  (fp_line (start 1.4 1.35) (end 1.6 1.35) (layer F.SilkS) (width 0.12))
  (fp_line (start 1.4 -1.35) (end 1.6 -1.35) (layer F.SilkS) (width 0.12))
  (fp_circle (center -1.95 1.7) (end -1.7 1.7) (layer F.SilkS) (width 0.12))
  (fp_line (start 1.6 0.65) (end 1.6 1.35) (layer F.SilkS) (width 0.12))
  (fp_line (start 1.6 -1.35) (end 1.6 -0.65) (layer F.SilkS) (width 0.12))
  (fp_line (start -1.6 -1.35) (end -1.6 -0.65) (layer F.SilkS) (width 0.12))
  (fp_line (start -2.25 2) (end -2.25 -2) (layer F.CrtYd) (width 0.05))
  (fp_line (start 2.25 2) (end -2.25 2) (layer F.CrtYd) (width 0.05))
  (fp_line (start 2.25 -2) (end 2.25 2) (layer F.CrtYd) (width 0.05))
  (fp_line (start -2.25 -2) (end 2.25 -2) (layer F.CrtYd) (width 0.05))
  (fp_line (start -1.5 1.25) (end -1.5 -1.25) (layer F.Fab) (width 0.1))
  (fp_line (start 1.5 1.25) (end -1.5 1.25) (layer F.Fab) (width 0.1))
  (fp_line (start 1.5 -1.25) (end 1.5 1.25) (layer F.Fab) (width 0.1))
  (fp_line (start -1.5 -1.25) (end 1.5 -1.25) (layer F.Fab) (width 0.1))
  (fp_text user %R (at 0.25 0) (layer F.Fab)
    (effects (font (size 0.75 0.75) (thickness 0.1)))
  )
  (pad 15 smd rect (at 0.35 0 90) (size 0.9 0.7) (layers F.Cu F.Paste F.Mask))
  (pad 14 smd rect (at -1.55 -0.25 90) (size 0.24 0.9) (layers F.Cu F.Paste F.Mask))
  (pad 13 smd rect (at -1 -1.3) (size 0.24 0.9) (layers F.Cu F.Paste F.Mask))
  (pad 12 smd rect (at -0.5 -1.3) (size 0.24 0.9) (layers F.Cu F.Paste F.Mask))
  (pad 11 smd rect (at 0 -1.3) (size 0.24 0.9) (layers F.Cu F.Paste F.Mask))
  (pad 10 smd rect (at 0.5 -1.3) (size 0.24 0.9) (layers F.Cu F.Paste F.Mask))
  (pad 9 smd rect (at 1 -1.3) (size 0.24 0.9) (layers F.Cu F.Paste F.Mask))
  (pad 8 smd rect (at 1.55 -0.25 90) (size 0.24 0.9) (layers F.Cu F.Paste F.Mask))
  (pad 7 smd rect (at 1.55 0.25 90) (size 0.24 0.9) (layers F.Cu F.Paste F.Mask))
  (pad 6 smd rect (at 1 1.3) (size 0.24 0.9) (layers F.Cu F.Paste F.Mask))
  (pad 5 smd rect (at 0.5 1.3) (size 0.24 0.9) (layers F.Cu F.Paste F.Mask))
  (pad 4 smd rect (at 0 1.3) (size 0.24 0.9) (layers F.Cu F.Paste F.Mask))
  (pad 3 smd rect (at -0.5 1.3) (size 0.24 0.9) (layers F.Cu F.Paste F.Mask))
  (pad 2 smd rect (at -1 1.3) (size 0.24 0.9) (layers F.Cu F.Paste F.Mask))
  (pad 1 smd rect (at -1.55 0.25 90) (size 0.24 0.9) (layers F.Cu F.Paste F.Mask))
  (pad 15 smd rect (at -0.35 0 90) (size 0.9 0.7) (layers F.Cu F.Paste F.Mask))
)