EESchema-DOCLIB Version 2.0 # $CMP 74AUP2G132DC D Dual NAND Gate K Dual Gate NAND $ENDCMP # $CMP 74LVC2G02DC D Dual NOR Gate K Dual Gate NOR $ENDCMP # $CMP SN74AUP1G02DCK D Single NOR Gate K Single Gate NOR F http://www.ti.com/lit/sg/scyt129e/scyt129e.pdf $ENDCMP # $CMP SN74AUP2G02DCU D Dual NOR Gate K Dual Gate NOR F http://www.ti.com/lit/sg/scyt129e/scyt129e.pdf $ENDCMP # $CMP SN74LV1T34DBV D Single Power Supply, Single Buffer GATE, CMOS Logic, Level Shifter, SOT-23-5 K single buffer level shift F https://www.ti.com/lit/ds/symlink/sn74lv1t34.pdf $ENDCMP # $CMP SN74LVC1G125DCK D Single Buffer Gate Tri-State, Low-Voltage CMOS K Single Gate Buff Tri-State LVC CMOS F http://www.ti.com/lit/sg/scyt129e/scyt129e.pdf $ENDCMP # #End Doc Library