diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
index 55adf1bf45d9..c875474e6c45 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
@@ -752,7 +752,7 @@ clk: clock-controller@30380000 {
 						       <800000000>,
 						       <393216000>,
 						       <361267200>,
-						       <1039500000>;
+						       <252000000>;
 			};
 
 			src: reset-controller@30390000 {
diff --git a/drivers/clk/imx/clk-pll14xx.c b/drivers/clk/imx/clk-pll14xx.c
index 6c17786ecb9f..8c9840f08c0e 100644
--- a/drivers/clk/imx/clk-pll14xx.c
+++ b/drivers/clk/imx/clk-pll14xx.c
@@ -75,6 +75,7 @@ static const struct imx_pll14xx_rate_table imx_pll1443x_tbl[] = {
 	PLL_1443X_RATE(49152000U, 393, 3, 6, 0x374c),
 	PLL_1443X_RATE(45158400U, 241, 2, 6, 0xd845),
 	PLL_1443X_RATE(40960000U, 109, 1, 6, 0x3a07),
+	PLL_1443X_RATE(252000000U, 84, 2, 2, 0),
 };
 
 struct imx_pll14xx_clk imx_1443x_pll = {
diff --git a/drivers/gpu/drm/imx/imx8mp-ldb.c b/drivers/gpu/drm/imx/imx8mp-ldb.c
index e3f5c5e6e842..55dbafa863cf 100644
--- a/drivers/gpu/drm/imx/imx8mp-ldb.c
+++ b/drivers/gpu/drm/imx/imx8mp-ldb.c
@@ -186,15 +186,6 @@ imx8mp_ldb_encoder_atomic_check(struct drm_encoder *encoder,
 		return -EINVAL;
 	}
 
-	/*
-	 * Due to limited video PLL frequency points on i.MX8mp,
-	 * we do mode fixup here in case any mode is unsupported.
-	 */
-	if (ldb->dual)
-		mode->clock = mode->clock > 100000 ? 148500 : 74250;
-	else
-		mode->clock = 74250;
-
 	return 0;
 }
 
@@ -212,16 +203,6 @@ imx8mp_ldb_encoder_mode_valid(struct drm_encoder *encoder,
 	if (ldb_ch->panel)
 		return MODE_OK;
 
-	/*
-	 * Due to limited video PLL frequency points on i.MX8mp,
-	 * we do mode valid check here.
-	 */
-	if (ldb->dual && mode->clock != 74250 && mode->clock != 148500)
-		return MODE_NOCLOCK;
-
-	if (!ldb->dual && mode->clock != 74250)
-		return MODE_NOCLOCK;
-
 	return MODE_OK;
 }