#include "../freescale/fsl-imx8mq.dtsi"

/ {
	chosen {
		bootargs = "console=ttymxc2,115200 earlycon=ec_imx6q,0x30880000,115200";
		stdout-path = &uart3;
	};

	regulators {
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <0>;

		reg_usdhc1_vmmc: regulator-vsd-1v8 {
			compatible = "regulator-fixed";
			pinctrl-names = "default";
			pinctrl-0 = <&pinctrl_usdhc1_reg>;
			regulator-name = "USBHC1_VSD_1V8";
			regulator-min-microvolt = <1800000>;
			regulator-max-microvolt = <1800000>;
			gpio = <&gpio2 10 GPIO_ACTIVE_HIGH>;
			off-on-delay = <20000>;
			enable-active-high;
		};

		reg_usdhc2_vmmc: regulator-vsd-3v3 {
			compatible = "regulator-fixed";
			pinctrl-names = "default";
			pinctrl-0 = <&pinctrl_usdhc2_reg>;
			regulator-name = "USDHC2_VSD_3V3";
			regulator-min-microvolt = <3300000>;
			regulator-max-microvolt = <3300000>;
			gpio = <&gpio2 19 GPIO_ACTIVE_HIGH>;
			off-on-delay = <20000>;
			enable-active-high;
		};
	};

	leds {
		compatible = "gpio-leds";
		heartbeat-led {
			label = "Heartbeat";
			gpios = <&gpio1 12 0>;
			linux,default-trigger = "heartbeat";
		};
	};

	pwmleds {
		compatible = "pwm-leds";

		ledpwm2 {
			label = "PWM2";
			pwms = <&pwm2 0 50000>;
			max-brightness = <255>;
		};
	};
};

&iomuxc {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_hog>;

	rvphone-cl-imx8 {
		pinctrl_hog: hoggrp {
			fsl,pins = <
				MX8MQ_IOMUXC_GPIO1_IO12_GPIO1_IO12		0x16
			>;
		};

		pinctrl_usdhc1_reg: usdhc1reggrp {
			fsl,pins = <
				MX8MQ_IOMUXC_SD1_RESET_B_GPIO2_IO10		0x1c
			>;
		};

		pinctrl_usdhc2_reg: usdhc2reggrp {
			fsl,pins = <
				MX8MQ_IOMUXC_SD2_RESET_B_GPIO2_IO19		0x41
			>;
		};

		pinctrl_usdhc1: usdhc1grp {
			fsl,pins = <
				MX8MQ_IOMUXC_SD1_CLK_USDHC1_CLK			0x83
				MX8MQ_IOMUXC_SD1_CMD_USDHC1_CMD			0xc3
				MX8MQ_IOMUXC_SD1_DATA0_USDHC1_DATA0		0xc3
				MX8MQ_IOMUXC_SD1_DATA1_USDHC1_DATA1		0xc3
				MX8MQ_IOMUXC_SD1_DATA2_USDHC1_DATA2		0xc3
				MX8MQ_IOMUXC_SD1_DATA3_USDHC1_DATA3		0xc3
				MX8MQ_IOMUXC_SD1_DATA4_USDHC1_DATA4		0xc3
				MX8MQ_IOMUXC_SD1_DATA5_USDHC1_DATA5		0xc3
				MX8MQ_IOMUXC_SD1_DATA6_USDHC1_DATA6		0xc3
				MX8MQ_IOMUXC_SD1_DATA7_USDHC1_DATA7		0xc3
				MX8MQ_IOMUXC_SD1_STROBE_USDHC1_STROBE 		0x83
			>;
		};

		pinctrl_usdhc1_100mhz: usdhc1grp100mhz {
			fsl,pins = <
				MX8MQ_IOMUXC_SD1_CLK_USDHC1_CLK			0x8d
				MX8MQ_IOMUXC_SD1_CMD_USDHC1_CMD			0xcd
				MX8MQ_IOMUXC_SD1_DATA0_USDHC1_DATA0		0xcd
				MX8MQ_IOMUXC_SD1_DATA1_USDHC1_DATA1		0xcd
				MX8MQ_IOMUXC_SD1_DATA2_USDHC1_DATA2		0xcd
				MX8MQ_IOMUXC_SD1_DATA3_USDHC1_DATA3		0xcd
				MX8MQ_IOMUXC_SD1_DATA4_USDHC1_DATA4		0xcd
				MX8MQ_IOMUXC_SD1_DATA5_USDHC1_DATA5		0xcd
				MX8MQ_IOMUXC_SD1_DATA6_USDHC1_DATA6		0xcd
				MX8MQ_IOMUXC_SD1_DATA7_USDHC1_DATA7		0xcd
				MX8MQ_IOMUXC_SD1_STROBE_USDHC1_STROBE		0x8d
			>;
		};

		pinctrl_usdhc1_200mhz: usdhc1grp200mhz {
			fsl,pins = <
				MX8MQ_IOMUXC_SD1_CLK_USDHC1_CLK			0x9f
				MX8MQ_IOMUXC_SD1_CMD_USDHC1_CMD			0xdf
				MX8MQ_IOMUXC_SD1_DATA0_USDHC1_DATA0		0xdf
				MX8MQ_IOMUXC_SD1_DATA1_USDHC1_DATA1		0xdf
				MX8MQ_IOMUXC_SD1_DATA2_USDHC1_DATA2		0xdf
				MX8MQ_IOMUXC_SD1_DATA3_USDHC1_DATA3		0xdf
				MX8MQ_IOMUXC_SD1_DATA4_USDHC1_DATA4		0xdf
				MX8MQ_IOMUXC_SD1_DATA5_USDHC1_DATA5		0xdf
				MX8MQ_IOMUXC_SD1_DATA6_USDHC1_DATA6		0xdf
				MX8MQ_IOMUXC_SD1_DATA7_USDHC1_DATA7		0xdf
				MX8MQ_IOMUXC_SD1_STROBE_USDHC1_STROBE		0x9f
			>;
		};

		pinctrl_usdhc2_gpio: usdhc2grpgpio {
			fsl,pins = <
				MX8MQ_IOMUXC_SD2_WP_GPIO2_IO20			0x41
				MX8MQ_IOMUXC_SD2_CD_B_GPIO2_IO12		0x41
			>;
		};

		pinctrl_usdhc2: usdhc2grp {
			fsl,pins = <
				MX8MQ_IOMUXC_SD2_CLK_USDHC2_CLK			0x83
				MX8MQ_IOMUXC_SD2_CMD_USDHC2_CMD			0xc3
				MX8MQ_IOMUXC_SD2_DATA0_USDHC2_DATA0		0xc3
				MX8MQ_IOMUXC_SD2_DATA1_USDHC2_DATA1		0xc3
				MX8MQ_IOMUXC_SD2_DATA2_USDHC2_DATA2		0xc3
				MX8MQ_IOMUXC_SD2_DATA3_USDHC2_DATA3		0xc3
			>;
		};

		pinctrl_usdhc2_100mhz: usdhc2grp100mhz {
			fsl,pins = <
				MX8MQ_IOMUXC_SD2_CLK_USDHC2_CLK			0x8d
				MX8MQ_IOMUXC_SD2_CMD_USDHC2_CMD			0xcd
				MX8MQ_IOMUXC_SD2_DATA0_USDHC2_DATA0		0xcd
				MX8MQ_IOMUXC_SD2_DATA1_USDHC2_DATA1		0xcd
				MX8MQ_IOMUXC_SD2_DATA2_USDHC2_DATA2		0xcd
				MX8MQ_IOMUXC_SD2_DATA3_USDHC2_DATA3		0xcd
			>;
		};

		pinctrl_usdhc2_200mhz: usdhc2grp200mhz {
			fsl,pins = <
				MX8MQ_IOMUXC_SD2_CLK_USDHC2_CLK			0x9f
				MX8MQ_IOMUXC_SD2_CMD_USDHC2_CMD			0xdf
				MX8MQ_IOMUXC_SD2_DATA0_USDHC2_DATA0		0xdf
				MX8MQ_IOMUXC_SD2_DATA1_USDHC2_DATA1		0xdf
				MX8MQ_IOMUXC_SD2_DATA2_USDHC2_DATA2		0xdf
				MX8MQ_IOMUXC_SD2_DATA3_USDHC2_DATA3		0xdf
			>;
		};

		pinctrl_i2c2: i2c2grp {
			fsl,pins = <
				MX8MQ_IOMUXC_I2C2_SCL_I2C2_SCL			0x4000007f
				MX8MQ_IOMUXC_I2C2_SDA_I2C2_SDA			0x4000007f
			>;
		};

		pinctrl_i2c3: i2c3grp {
			fsl,pins = <
				MX8MQ_IOMUXC_I2C3_SCL_I2C3_SCL			0x4000007f
				MX8MQ_IOMUXC_I2C3_SDA_I2C3_SDA			0x4000007f
			>;
		};

		pinctrl_uart3: uart3grp {
			fsl,pins = <
				MX8MQ_IOMUXC_UART3_TXD_UART3_DCE_TX		0x79
				MX8MQ_IOMUXC_UART3_RXD_UART3_DCE_RX		0x79
				MX8MQ_IOMUXC_NAND_CLE_GPIO3_IO5			0x19
			>;
		};

		pinctrl_ecspi1: ecspi1grp {
			fsl,pins = <
				MX8MQ_IOMUXC_ECSPI1_SCLK_ECSPI1_SCLK		0x82 /* P1.13 */
				MX8MQ_IOMUXC_ECSPI1_MOSI_ECSPI1_MOSI		0x82 /* P1.11 */
				MX8MQ_IOMUXC_ECSPI1_MISO_ECSPI1_MISO		0x82 /* P1.15 */
				MX8MQ_IOMUXC_ECSPI1_SS0_GPIO5_IO9		0x82 /* P1.17 */
			>;
		};

		pinctrl_pwm2: pwm2grp {
			fsl,pins = <
				MX8MQ_IOMUXC_I2C4_SCL_PWM2_OUT 			0x16
			>;
		};

		pinctrl_wdog: wdoggrp {
			fsl,pins = <
				MX8MQ_IOMUXC_GPIO1_IO02_WDOG1_WDOG_B		0xc6
			>;
		};
	};
};

&i2c2 {
	clock-frequency = <100000>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c2>;
	status = "okay";

	pmic@8 {
		compatible = "fsl,pfuze100";
		fsl,pfuze-support-disable-sw;
		reg = <0x8>;

		regulators {
			sw1a_reg: sw1ab {
				regulator-min-microvolt = <825000>;
				regulator-max-microvolt = <1100000>;
				regulator-always-on;
			};

			sw1c_reg: sw1c {
				regulator-min-microvolt = <825000>;
				regulator-max-microvolt = <1100000>;
				regulator-always-on;
			};

			sw2_reg: sw2 {
				regulator-min-microvolt = <1060000>;
				regulator-max-microvolt = <1170000>;
				regulator-always-on;
			};

			sw3a_reg: sw3ab {
				regulator-min-microvolt = <825000>;
				regulator-max-microvolt = <1100000>;
				regulator-always-on;
			};

			sw4_reg: sw4 {
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <1800000>;
				regulator-always-on;
			};

			swbst_reg: swbst {
				regulator-min-microvolt = <5000000>;
				regulator-max-microvolt = <5150000>;
			};

			snvs_reg: vsnvs {
				regulator-min-microvolt = <1000000>;
				regulator-max-microvolt = <3000000>;
				regulator-always-on;
			};

			vref_reg: vrefddr {
				regulator-always-on;
			};

			vgen1_reg: vgen1 {
				regulator-min-microvolt = <800000>;
				regulator-max-microvolt = <1550000>;
			};

			vgen2_reg: vgen2 {
				regulator-min-microvolt = <850000>;
				regulator-max-microvolt = <975000>;
				regulator-always-on;
			};

			vgen3_reg: vgen3 {
				regulator-min-microvolt = <1675000>;
				regulator-max-microvolt = <1975000>;
				regulator-always-on;
			};

			vgen4_reg: vgen4 {
				regulator-min-microvolt = <1625000>;
				regulator-max-microvolt = <1875000>;
				regulator-always-on;
			};

			vgen5_reg: vgen5 {
				regulator-min-microvolt = <3075000>;
				regulator-max-microvolt = <3625000>;
				regulator-always-on;
			};

			vgen6_reg: vgen6 {
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <3300000>;
			};
		};
	};
};

&i2c3 {
	clock-frequency = <400000>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c3>;
	status = "disabled";
};

&uart3 { /* console */
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart3>;
	assigned-clocks = <&clk IMX8MQ_CLK_UART3>;
	assigned-clock-parents = <&clk IMX8MQ_CLK_25M>;
	status = "okay";
};

&ecspi1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_ecspi1>;
	fsl,spi-num-chipselects = <1>;
	cs-gpios = <&gpio5 9 GPIO_ACTIVE_LOW>;
	status = "okay";
	#address-cells = <1>;
	#size-cells = <0>;

	spidev: spidev@0 {
		compatible = "spidev", "rohm,dh2228fv";
		spi-max-frequency = <10000000>;
		reg = <0>;
		status = "okay";
	};
};

&usdhc1 {
	pinctrl-names = "default", "state_100mhz", "state_200mhz";
	pinctrl-0 = <&pinctrl_usdhc1>;
	pinctrl-1 = <&pinctrl_usdhc1_100mhz>;
	pinctrl-2 = <&pinctrl_usdhc1_200mhz>;
	bus-width = <8>;
	non-removable;
	vmmc-supply = <&reg_usdhc1_vmmc>;
	status = "okay";
};

&usdhc2 {
	pinctrl-names = "default", "state_100mhz", "state_200mhz";
	pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
	pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>;
	pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>;
	bus-width = <4>;
	cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>;
	wp-gpios = <&gpio2 20 GPIO_ACTIVE_HIGH>;
	vmmc-supply = <&reg_usdhc2_vmmc>;
	no-1-8-v;
	status = "okay";
};

&pwm2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_pwm2>;
	status = "okay";
};

&usb3_phy0 {
	status = "okay";
};

&usb3_0 {
	status = "okay";
};

&usb_dwc3_0 {
	status = "okay";
	dr_mode = "otg";
};

&gpu_pd {
	power-supply = <&sw1a_reg>;
};

&vpu_pd {
	power-supply = <&sw1c_reg>;
};

&gpu {
	status = "okay";
};

&vpu {
	status = "okay";
};

&wdog1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_wdog>;
	fsl,ext-reset-output;
	status = "okay";
};

&mu {
	status = "okay";
};

&A53_0 {
	operating-points = <
		/* kHz    uV */
		1500000 1000000
		1300000 1000000
		1000000 900000
		800000  900000
	>;
};

&resmem {
	linux,cma {
		compatible = "shared-dma-pool";
		reusable;
		size = <0 0x2c000000>;
		alloc-ranges = <0 0x40000000 0 0x40000000>;
		linux,cma-default;
	};
};