From fe0d3263d058808feb4355ac3aebba7196cb7bcc Mon Sep 17 00:00:00 2001
From: Uros Majstorovic <majstor@majstor.org>
Date: Thu, 12 Dec 2019 23:44:34 +0100
Subject: fixed bug in i2s spk driver

---
 code/fe310/eos/i2s.c        | 11 ++++----
 code/fe310/eos/trap_entry.S | 64 ++++++++++++++++++++++++---------------------
 2 files changed, 39 insertions(+), 36 deletions(-)

diff --git a/code/fe310/eos/i2s.c b/code/fe310/eos/i2s.c
index 4702bc3..8c3aebb 100644
--- a/code/fe310/eos/i2s.c
+++ b/code/fe310/eos/i2s.c
@@ -26,8 +26,8 @@
 EOSABuf _eos_i2s_mic_buf;
 EOSABuf _eos_i2s_spk_buf;
 uint32_t _eos_i2s_fmt = 0;
-uint32_t _eos_i2s_mic_volume = 0;
-uint32_t _eos_i2s_spk_volume = 0;
+uint32_t _eos_i2s_mic_volume = 4;       /* 1 - 8 */
+uint32_t _eos_i2s_spk_volume = 12;      /* 1 - 16 */
 uint32_t _eos_i2s_mic_wm = 0;
 uint32_t _eos_i2s_spk_wm = 0;
 uint32_t _eos_i2s_mic_evt_enable = 0;
@@ -158,8 +158,6 @@ void eos_i2s_init(void) {
 void eos_i2s_start(uint32_t sample_rate, unsigned char fmt) {
     uint32_t ck_period = (PRCI_get_cpu_freq() / (sample_rate * 64)) & ~I2S_PWM_SCALE_CK_MASK;;
 
-    GPIO_REG(GPIO_INPUT_EN)     |= (1 << I2S_PIN_SD_IN);
-
     I2S_PWM_REG_CK(PWM_CMP0)        = ck_period >> I2S_PWM_SCALE_CK;
     I2S_PWM_REG_CK(PWM_CMP1)        = I2S_PWM_REG_CK(PWM_CMP0) / 2;
     I2S_PWM_REG_CK(PWM_CMP2)        = 0;
@@ -168,7 +166,7 @@ void eos_i2s_start(uint32_t sample_rate, unsigned char fmt) {
     I2S_PWM_REG_WS_MIC(PWM_CMP0)    = (ck_period + 1) * 64 - 1;
     I2S_PWM_REG_WS_MIC(PWM_CMP1)    = (ck_period + 1) * 32;
     I2S_PWM_REG_WS_MIC(PWM_CMP2)    = (ck_period + 1) * _eos_i2s_mic_volume;
-    I2S_PWM_REG_WS_MIC(PWM_CMP3)    = I2S_PWM_REG_WS_MIC(PWM_CMP2) + (ck_period + 1) * 17;
+    I2S_PWM_REG_WS_MIC(PWM_CMP3)    = I2S_PWM_REG_WS_MIC(PWM_CMP2) + (ck_period + 1) * 16;
 
     I2S_PWM_REG_WS_SPK(PWM_CMP0)    = (ck_period + 1) * 64 - 1;
     I2S_PWM_REG_WS_SPK(PWM_CMP1)    = (ck_period + 1) * 32;
@@ -176,7 +174,7 @@ void eos_i2s_start(uint32_t sample_rate, unsigned char fmt) {
 
     I2S_PWM_REG_CK(PWM_COUNT)       = 0;
     I2S_PWM_REG_WS_MIC(PWM_COUNT)   = (ck_period + 1) * 32;
-    I2S_PWM_REG_WS_SPK(PWM_COUNT)   = (ck_period + 1) * 32 + (ck_period + 1) * (_eos_i2s_spk_volume + 1 - _eos_i2s_mic_volume) + (ck_period + 1) / 2;
+    I2S_PWM_REG_WS_SPK(PWM_COUNT)   = (ck_period + 1) * 32 + (ck_period + 1)/2 + (ck_period + 1) * (17 - _eos_i2s_spk_volume - _eos_i2s_mic_volume);
 
     _eos_i2s_fmt = fmt;
     _eos_i2s_mic_evt_enable = 1;
@@ -194,6 +192,7 @@ void eos_i2s_start(uint32_t sample_rate, unsigned char fmt) {
     I2S_PWM_REG_WS_SPK(PWM_CFG)     = PWM_CFG_ENALWAYS | PWM_CFG_ZEROCMP;
     */
 
+    GPIO_REG(GPIO_INPUT_EN)     |=  (1 << I2S_PIN_SD_IN);
     GPIO_REG(GPIO_OUTPUT_VAL)   |=  (1 << I2S_PIN_CK_SR);
 
     GPIO_REG(GPIO_IOF_SEL)      |=  (1 << I2S_PIN_CK);
diff --git a/code/fe310/eos/trap_entry.S b/code/fe310/eos/trap_entry.S
index 5948b13..fc029fe 100644
--- a/code/fe310/eos/trap_entry.S
+++ b/code/fe310/eos/trap_entry.S
@@ -213,61 +213,65 @@ i2s_handler_sd_xchg:
   sw x9, GPIO_OUTPUT_EN(x18)
 
   not x20, x20
-  or x22, x22, x21
+  xor x22, x22, x21
 
-  li x23, 17
+  li x23, 16
 0:
-  addi x23, x23, -1
-  beqz x23, 1f
+  # write bit
+  li x9, 1
+  slli x9, x9, 15
+  and x9, x8, x9
+  slli x8, x8, 1
+#if I2S_PIN_SD_OUT > 15
+  slli x9, x9, (I2S_PIN_SD_OUT - 15)
+#else
+  srli x9, x9, (15 - I2S_PIN_SD_OUT)
+#endif
+  and x22, x22, x20
+  or x22, x22, x9
+
+  # read bit
   lw x9, GPIO_INPUT_VAL(x18)
   and x9, x9, x19
   srli x9, x9, I2S_PIN_SD_IN
-  slli x8, x8, 1
   or x8, x8, x9
 
-1:
+  # 74HC595 ck low (I2S_PIN_CK_SR high)
+  xor x22, x22, x21
+  sw x22, GPIO_OUTPUT_VAL(x18)
+
   # idle
   li x9, I2S_IDLE_CYCLES
-2:
+1:
   addi x9, x9, -1
-  bnez x9, 2b
+  bnez x9, 1b
 
-  # ck high
+  # 74HC595 ck high (I2S_PIN_CK_SR low)
   xor x22, x22, x21
   sw x22, GPIO_OUTPUT_VAL(x18)
 
-  li x9, 0x1
-  slli x9, x9, 16
-  and x9, x9, x8
-#if I2S_PIN_SD_OUT > 16
-  slli x9, x9, (I2S_PIN_SD_OUT - 16)
-#else
-  srli x9, x9, (16 - I2S_PIN_SD_OUT)
-#endif
-  and x22, x22, x20
-  or x22, x22, x9
-
   # idle
   li x9, I2S_IDLE_CYCLES
-2:
+1:
   addi x9, x9, -1
-  bnez x9, 2b
+  bnez x9, 1b
 
-  # ck low
-  xor x22, x22, x21
-  sw x22, GPIO_OUTPUT_VAL(x18)
-
-  beqz x23, 3f
+  addi x23, x23, -1
+  beqz x23, 2f
   j 0b
 
-3:
-  slli x8, x8, 16
-  srai x8, x8, 16
+2:
+  # 74HC595 ck low (I2S_PIN_CK_SR high)
+  xor x22, x22, x21
+  sw x22, GPIO_OUTPUT_VAL(x18)
 
   lw x9, GPIO_OUTPUT_EN(x18)
   and x9, x9, x20
   sw x9, GPIO_OUTPUT_EN(x18)
 
+  slli x8, x8, 16
+  srai x8, x8, 16
+
   la x9, _eos_i2s_fmt
   lw x23, 0(x9)
 
-- 
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