From d4885f39f5012f082e0ebbbf7c3aae385187facf Mon Sep 17 00:00:00 2001 From: Uros Majstorovic Date: Fri, 30 Aug 2019 13:44:45 +0200 Subject: stub drivers added --- code/esp32/components/eos/bq25895.c | 31 ++++++ code/esp32/components/eos/drv2605l.c | 104 ++++++++++++++++++++ code/esp32/components/eos/fe310.c | 43 ++++++-- code/esp32/components/eos/i2c.c | 101 +++++++++++++++++++ code/esp32/components/eos/include/bq25895.h | 3 + code/esp32/components/eos/include/drv2605l.h | 3 + code/esp32/components/eos/include/eos.h | 9 +- code/esp32/components/eos/include/fe310.h | 19 ++-- code/esp32/components/eos/include/i2c.h | 7 ++ code/esp32/components/eos/include/modem.h | 4 + code/esp32/components/eos/include/pcm.h | 5 + code/esp32/components/eos/include/transport.h | 8 +- code/esp32/components/eos/modem.c | 79 +++++++++++++++ code/esp32/components/eos/pcm.c | 135 ++++++++++++++++++++++++++ code/esp32/components/eos/transport.c | 34 +++---- 15 files changed, 540 insertions(+), 45 deletions(-) create mode 100644 code/esp32/components/eos/bq25895.c create mode 100644 code/esp32/components/eos/drv2605l.c create mode 100644 code/esp32/components/eos/i2c.c create mode 100644 code/esp32/components/eos/include/bq25895.h create mode 100644 code/esp32/components/eos/include/drv2605l.h create mode 100644 code/esp32/components/eos/include/i2c.h create mode 100644 code/esp32/components/eos/include/modem.h create mode 100644 code/esp32/components/eos/include/pcm.h create mode 100644 code/esp32/components/eos/modem.c create mode 100644 code/esp32/components/eos/pcm.c (limited to 'code/esp32') diff --git a/code/esp32/components/eos/bq25895.c b/code/esp32/components/eos/bq25895.c new file mode 100644 index 0000000..24d8686 --- /dev/null +++ b/code/esp32/components/eos/bq25895.c @@ -0,0 +1,31 @@ +#include +#include + +#include "eos.h" +#include "i2c.h" + +static const char *TAG = "BQ25895"; + +#define BQ25895_ADDR 0x6A + +/** + * @brief test function to show buffer + */ +static void disp_buf(uint8_t *buf, int len) +{ + int i; + for (i = 0; i < len; i++) { + printf("%02x ", buf[i]); + if ((i + 1) % 16 == 0) { + printf("\n"); + } + } + printf("\n"); +} + +void eos_bq25895_set_ilim(void) { + uint8_t data = 0; + eos_i2c_write8(BQ25895_ADDR, 0, 0x3E); + data = eos_i2c_read8(BQ25895_ADDR, 0); + ESP_LOGI(TAG, "BUFFER: %02x", data); +} \ No newline at end of file diff --git a/code/esp32/components/eos/drv2605l.c b/code/esp32/components/eos/drv2605l.c new file mode 100644 index 0000000..5a2aa8c --- /dev/null +++ b/code/esp32/components/eos/drv2605l.c @@ -0,0 +1,104 @@ +#include +#include + +#include "eos.h" +#include "i2c.h" + +static const char *TAG = "DRV2605L"; + +#define DRV2605L_ADDR 0x5A + +#define DRV2605_REG_STATUS 0x00 ///< Status register +#define DRV2605_REG_MODE 0x01 ///< Mode register +#define DRV2605_MODE_INTTRIG 0x00 ///< Internal trigger mode +#define DRV2605_MODE_EXTTRIGEDGE 0x01 ///< External edge trigger mode +#define DRV2605_MODE_EXTTRIGLVL 0x02 ///< External level trigger mode +#define DRV2605_MODE_PWMANALOG 0x03 ///< PWM/Analog input mode +#define DRV2605_MODE_AUDIOVIBE 0x04 ///< Audio-to-vibe mode +#define DRV2605_MODE_REALTIME 0x05 ///< Real-time playback (RTP) mode +#define DRV2605_MODE_DIAGNOS 0x06 ///< Diagnostics mode +#define DRV2605_MODE_AUTOCAL 0x07 ///< Auto calibration mode + +#define DRV2605_REG_RTPIN 0x02 ///< Real-time playback input register +#define DRV2605_REG_LIBRARY 0x03 ///< Waveform library selection register +#define DRV2605_REG_WAVESEQ1 0x04 ///< Waveform sequence register 1 +#define DRV2605_REG_WAVESEQ2 0x05 ///< Waveform sequence register 2 +#define DRV2605_REG_WAVESEQ3 0x06 ///< Waveform sequence register 3 +#define DRV2605_REG_WAVESEQ4 0x07 ///< Waveform sequence register 4 +#define DRV2605_REG_WAVESEQ5 0x08 ///< Waveform sequence register 5 +#define DRV2605_REG_WAVESEQ6 0x09 ///< Waveform sequence register 6 +#define DRV2605_REG_WAVESEQ7 0x0A ///< Waveform sequence register 7 +#define DRV2605_REG_WAVESEQ8 0x0B ///< Waveform sequence register 8 + +#define DRV2605_REG_GO 0x0C ///< Go register +#define DRV2605_REG_OVERDRIVE 0x0D ///< Overdrive time offset register +#define DRV2605_REG_SUSTAINPOS 0x0E ///< Sustain time offset, positive register +#define DRV2605_REG_SUSTAINNEG 0x0F ///< Sustain time offset, negative register +#define DRV2605_REG_BREAK 0x10 ///< Brake time offset register +#define DRV2605_REG_AUDIOCTRL 0x11 ///< Audio-to-vibe control register +#define DRV2605_REG_AUDIOLVL 0x12 ///< Audio-to-vibe minimum input level register +#define DRV2605_REG_AUDIOMAX 0x13 ///< Audio-to-vibe maximum input level register +#define DRV2605_REG_AUDIOOUTMIN 0x14 ///< Audio-to-vibe minimum output drive register +#define DRV2605_REG_AUDIOOUTMAX 0x15 ///< Audio-to-vibe maximum output drive register +#define DRV2605_REG_RATEDV 0x16 ///< Rated voltage register +#define DRV2605_REG_CLAMPV 0x17 ///< Overdrive clamp voltage register +#define DRV2605_REG_AUTOCALCOMP 0x18 ///< Auto-calibration compensation result register +#define DRV2605_REG_AUTOCALEMP 0x19 ///< Auto-calibration back-EMF result register +#define DRV2605_REG_FEEDBACK 0x1A ///< Feedback control register +#define DRV2605_REG_CONTROL1 0x1B ///< Control1 Register +#define DRV2605_REG_CONTROL2 0x1C ///< Control2 Register +#define DRV2605_REG_CONTROL3 0x1D ///< Control3 Register +#define DRV2605_REG_CONTROL4 0x1E ///< Control4 Register +#define DRV2605_REG_VBAT 0x21 ///< Vbat voltage-monitor register +#define DRV2605_REG_LRARESON 0x22 ///< LRA resonance-period register + +/** + * @brief test function to show buffer + */ +static void disp_buf(uint8_t *buf, int len) +{ + int i; + for (i = 0; i < len; i++) { + printf("%02x ", buf[i]); + if ((i + 1) % 16 == 0) { + printf("\n"); + } + } + printf("\n"); +} + +void eos_drv2605l_test(void) { + uint8_t data = 0; + + int ret = eos_i2c_read(DRV2605L_ADDR, DRV2605_REG_STATUS, &data, 1); + if (ret) ESP_LOGE(TAG, "I2C ERROR!"); + ESP_LOGI(TAG, "OK BUFFER: "); + disp_buf(&data, 1); + + eos_i2c_write8(DRV2605L_ADDR, DRV2605_REG_MODE, 0x00); // out of standby + + eos_i2c_write8(DRV2605L_ADDR, DRV2605_REG_RTPIN, 0x00); // no real-time-playback + + eos_i2c_write8(DRV2605L_ADDR, DRV2605_REG_WAVESEQ1, 1); // strong click + eos_i2c_write8(DRV2605L_ADDR, DRV2605_REG_WAVESEQ2, 0); // end sequence + + eos_i2c_write8(DRV2605L_ADDR, DRV2605_REG_OVERDRIVE, 0); // no overdrive + + eos_i2c_write8(DRV2605L_ADDR, DRV2605_REG_SUSTAINPOS, 0); + eos_i2c_write8(DRV2605L_ADDR, DRV2605_REG_SUSTAINNEG, 0); + eos_i2c_write8(DRV2605L_ADDR, DRV2605_REG_BREAK, 0); + eos_i2c_write8(DRV2605L_ADDR, DRV2605_REG_AUDIOMAX, 0x64); + + // LRA open loop + // turn on N_ERM_LRA + eos_i2c_write8(DRV2605L_ADDR, DRV2605_REG_FEEDBACK, eos_i2c_read8(DRV2605L_ADDR, DRV2605_REG_FEEDBACK) | 0x80); + + // turn on LRA_OPEN_LOOP + eos_i2c_write8(DRV2605L_ADDR, DRV2605_REG_CONTROL3, eos_i2c_read8(DRV2605L_ADDR, DRV2605_REG_CONTROL3) | 0x01); + + + // set LRA library + eos_i2c_write8(DRV2605L_ADDR, DRV2605_REG_LIBRARY, 6); + // go + eos_i2c_write8(DRV2605L_ADDR, DRV2605_REG_GO, 1); +} diff --git a/code/esp32/components/eos/fe310.c b/code/esp32/components/eos/fe310.c index aa1b66f..e9e3af4 100644 --- a/code/esp32/components/eos/fe310.c +++ b/code/esp32/components/eos/fe310.c @@ -14,18 +14,21 @@ #include #include #include +#include #include #include "eos.h" #include "msgq.h" #include "transport.h" +#include "modem.h" +#include "pcm.h" #include "fe310.h" static EOSMsgQ send_q; static EOSMsgItem send_q_array[EOS_FE310_SIZE_Q]; -#define SPI_GPIO_RTS 16 -#define SPI_GPIO_CTS 17 +#define SPI_GPIO_RTS 22 +#define SPI_GPIO_CTS 21 #define SPI_GPIO_MOSI 23 #define SPI_GPIO_MISO 19 #define SPI_GPIO_SCLK 18 @@ -43,7 +46,6 @@ static void bad_handler(unsigned char cmd, unsigned char *buffer, uint16_t len) static void transceiver(void *pvParameters) { int repeat = 0; - esp_err_t ret; unsigned char cmd = 0; unsigned char *buffer; uint16_t len; @@ -75,7 +77,7 @@ static void transceiver(void *pvParameters) { } memset(buf_recv, 0, EOS_FE310_SIZE_BUF); - ret = spi_slave_transmit(HSPI_HOST, &t, portMAX_DELAY); + spi_slave_transmit(HSPI_HOST, &t, portMAX_DELAY); repeat = 0; if (buf_recv[0] != 0) { cmd = (buf_recv[0] >> 3); @@ -108,6 +110,31 @@ static void _post_trans_cb(spi_slave_transaction_t *trans) { WRITE_PERI_REG(GPIO_OUT_W1TC_REG, (1 << SPI_GPIO_CTS)); } +static void fe310_wifi_connect_handler(unsigned char cmd, unsigned char *buffer, uint16_t size) { + eos_wifi_connect((char *)buffer, (char *)(buffer+strlen((char *)buffer)+1)); +} + +static void fe310_wifi_pkt_handler(unsigned char cmd, unsigned char *buffer, uint16_t size) { + EOSNetAddr addr; + size_t addr_len = sizeof(addr.host) + sizeof(addr.port); + + memcpy(addr.host, buffer, sizeof(addr.host)); + memcpy(&addr.port, buffer+sizeof(addr.host), sizeof(addr.port)); + eos_wifi_send(buffer+addr_len, size-addr_len, &addr); +} + +static void fe310_modem_data_handler(unsigned char cmd, unsigned char *buffer, uint16_t size) { + eos_modem_write(buffer, size); +} + +static void fe310_modem_call_handler(unsigned char cmd, unsigned char *buffer, uint16_t size) { + eos_pcm_call(); +} + +static void fe310_set_handler(unsigned char cmd, eos_fe310_fptr_t handler) { + cmd_handler[cmd] = handler; +} + void eos_fe310_init(void) { esp_err_t ret; @@ -162,6 +189,11 @@ void eos_fe310_init(void) { xSemaphoreGive(mutex); xTaskCreate(&transceiver, "fe310_transceiver", 4096, NULL, EOS_PRIORITY_SPI, NULL); // xTaskCreatePinnedToCore(&transceiver, "fe310_transceiver", 4096, NULL, EOS_PRIORITY_SPI, NULL, 1); + + fe310_set_handler(EOS_FE310_CMD_WIFI_CONNECT, fe310_wifi_connect_handler); + fe310_set_handler(EOS_FE310_CMD_WIFI_PKT, fe310_wifi_pkt_handler); + fe310_set_handler(EOS_FE310_CMD_MODEM_DATA, fe310_modem_data_handler); + fe310_set_handler(EOS_FE310_CMD_MODEM_CALL, fe310_modem_call_handler); } int eos_fe310_send(unsigned char cmd, unsigned char *buffer, uint16_t len) { @@ -173,7 +205,4 @@ int eos_fe310_send(unsigned char cmd, unsigned char *buffer, uint16_t len) { return rv; } -void eos_fe310_set_handler(unsigned char cmd, eos_fe310_fptr_t handler) { - cmd_handler[cmd] = handler; -} diff --git a/code/esp32/components/eos/i2c.c b/code/esp32/components/eos/i2c.c new file mode 100644 index 0000000..dcc313d --- /dev/null +++ b/code/esp32/components/eos/i2c.c @@ -0,0 +1,101 @@ +#include +#include +#include + +#include "eos.h" + +static const char *TAG = "I2C"; + +#define I2C_MASTER_NUM I2C_NUM_0 +#define I2C_MASTER_FREQ_HZ 100000 +#define I2C_MASTER_SCL_IO 26 +#define I2C_MASTER_SDA_IO 25 + +#define I2C_MASTER_TX_BUF_DISABLE 0 /*!< I2C master doesn't need buffer */ +#define I2C_MASTER_RX_BUF_DISABLE 0 /*!< I2C master doesn't need buffer */ +#define ACK_CHECK_EN 0x1 /*!< I2C master will check ack from slave*/ +#define ACK_CHECK_DIS 0x0 /*!< I2C master will not check ack from slave */ +#define ACK_VAL 0x0 /*!< I2C ack value */ +#define NCK_VAL 0x1 /*!< I2C nack value */ + +/** + * @brief i2c initialization + */ + +void eos_i2c_init(void) { + i2c_config_t conf; + conf.mode = I2C_MODE_MASTER; + conf.sda_io_num = I2C_MASTER_SDA_IO; + conf.sda_pullup_en = GPIO_PULLUP_ENABLE; + conf.scl_io_num = I2C_MASTER_SCL_IO; + conf.scl_pullup_en = GPIO_PULLUP_ENABLE; + conf.master.clk_speed = I2C_MASTER_FREQ_HZ; + i2c_param_config(I2C_MASTER_NUM, &conf); + i2c_driver_install(I2C_MASTER_NUM, conf.mode, I2C_MASTER_RX_BUF_DISABLE, I2C_MASTER_TX_BUF_DISABLE, 0); +} + +/** + * @brief i2c read + */ + +int eos_i2c_read(uint8_t addr, uint8_t reg, uint8_t *data, size_t len) { + int i, ret; + i2c_cmd_handle_t cmd = i2c_cmd_link_create(); + i2c_master_start(cmd); + i2c_master_write_byte(cmd, addr << 1 | I2C_MASTER_WRITE, ACK_CHECK_EN); + i2c_master_write_byte(cmd, reg, ACK_CHECK_EN); + i2c_master_start(cmd); + i2c_master_write_byte(cmd, addr << 1 | I2C_MASTER_READ, ACK_CHECK_EN); + for (i=0; i < len - 1; i++) { + i2c_master_read_byte(cmd, data+i, ACK_VAL); + } + i2c_master_read_byte(cmd, data+i, NCK_VAL); + i2c_master_stop(cmd); + ret = i2c_master_cmd_begin(I2C_MASTER_NUM, cmd, 1000 / portTICK_RATE_MS); + i2c_cmd_link_delete(cmd); + if (ret != ESP_OK) { + return EOS_ERR; + } + return EOS_OK; +} + +/** + * @brief i2c read8 + */ + +uint8_t eos_i2c_read8(uint8_t addr, uint8_t reg) { + uint8_t data; + eos_i2c_read(addr, reg, &data, 1); + return data; +} + +/** + * @brief i2c write + */ + +int eos_i2c_write(uint8_t addr, uint8_t reg, uint8_t *data, size_t len) { + int i, ret; + i2c_cmd_handle_t cmd = i2c_cmd_link_create(); + i2c_master_start(cmd); + i2c_master_write_byte(cmd, addr << 1 | I2C_MASTER_WRITE, ACK_CHECK_EN); + i2c_master_write_byte(cmd, reg, ACK_CHECK_EN); + for (i=0; i < len; i++) { + i2c_master_write_byte(cmd, *(data+i), ACK_CHECK_EN); + } + i2c_master_stop(cmd); + ret = i2c_master_cmd_begin(I2C_MASTER_NUM, cmd, 1000 / portTICK_RATE_MS); + i2c_cmd_link_delete(cmd); + if (ret != ESP_OK) { + return EOS_ERR; + } + return EOS_OK; +} + +/** + * @brief i2c write8 + */ + +void eos_i2c_write8(uint8_t addr, uint8_t reg, uint8_t data) { + eos_i2c_write(addr, reg, &data, 1); +} + diff --git a/code/esp32/components/eos/include/bq25895.h b/code/esp32/components/eos/include/bq25895.h new file mode 100644 index 0000000..b5a7f92 --- /dev/null +++ b/code/esp32/components/eos/include/bq25895.h @@ -0,0 +1,3 @@ +#include + +void eos_bq25895_set_ilim(void); \ No newline at end of file diff --git a/code/esp32/components/eos/include/drv2605l.h b/code/esp32/components/eos/include/drv2605l.h new file mode 100644 index 0000000..de222e4 --- /dev/null +++ b/code/esp32/components/eos/include/drv2605l.h @@ -0,0 +1,3 @@ +#include + +void eos_drv2605l_test(void); \ No newline at end of file diff --git a/code/esp32/components/eos/include/eos.h b/code/esp32/components/eos/include/eos.h index 1d35584..1b52605 100644 --- a/code/esp32/components/eos/include/eos.h +++ b/code/esp32/components/eos/include/eos.h @@ -1,5 +1,8 @@ -#define EOS_OK 0 -#define EOS_ERR_Q_FULL -10 +#define EOS_OK 0 +#define EOS_ERR -1 +#define EOS_ERR_Q_FULL -10 #define EOS_PRIORITY_WIFI 1 -#define EOS_PRIORITY_SPI 1 \ No newline at end of file +#define EOS_PRIORITY_SPI 1 +#define EOS_PRIORITY_PCM 1 +#define EOS_PRIORITY_MODEM 1 \ No newline at end of file diff --git a/code/esp32/components/eos/include/fe310.h b/code/esp32/components/eos/include/fe310.h index f4bc787..21b12dc 100644 --- a/code/esp32/components/eos/include/fe310.h +++ b/code/esp32/components/eos/include/fe310.h @@ -1,18 +1,19 @@ #include -#define EOS_FE310_CMD_FLAG_ONEW 0x10 +#define EOS_FE310_CMD_FLAG_ONEW 0x10 -#define EOS_FE310_CMD_CONNECT 1 -#define EOS_FE310_CMD_DISCONNECT 2 -#define EOS_FE310_CMD_SCAN 3 -#define EOS_FE310_CMD_PKT 4 +#define EOS_FE310_CMD_WIFI_CONNECT 1 +#define EOS_FE310_CMD_WIFI_DISCONNECT 2 +#define EOS_FE310_CMD_WIFI_SCAN 3 +#define EOS_FE310_CMD_WIFI_PKT 4 +#define EOS_FE310_CMD_MODEM_DATA 5 +#define EOS_FE310_CMD_MODEM_CALL 6 -#define EOS_FE310_MAX_CMD 8 -#define EOS_FE310_SIZE_Q 64 -#define EOS_FE310_SIZE_BUF 2048 +#define EOS_FE310_MAX_CMD 8 +#define EOS_FE310_SIZE_Q 64 +#define EOS_FE310_SIZE_BUF 2048 typedef void (*eos_fe310_fptr_t) (unsigned char, unsigned char *, uint16_t); void eos_fe310_init(void); int eos_fe310_send(unsigned char cmd, unsigned char *buffer, uint16_t len); -void eos_fe310_set_handler(unsigned char cmd, eos_fe310_fptr_t handler); diff --git a/code/esp32/components/eos/include/i2c.h b/code/esp32/components/eos/include/i2c.h new file mode 100644 index 0000000..6f89654 --- /dev/null +++ b/code/esp32/components/eos/include/i2c.h @@ -0,0 +1,7 @@ +#include + +void eos_i2c_init(void); +int eos_i2c_read(uint8_t addr, uint8_t reg, uint8_t *data, size_t len); +uint8_t eos_i2c_read8(uint8_t addr, uint8_t reg); +int eos_i2c_write(uint8_t addr, uint8_t reg, uint8_t *data, size_t len); +void eos_i2c_write8(uint8_t addr, uint8_t reg, uint8_t data); diff --git a/code/esp32/components/eos/include/modem.h b/code/esp32/components/eos/include/modem.h new file mode 100644 index 0000000..424c0db --- /dev/null +++ b/code/esp32/components/eos/include/modem.h @@ -0,0 +1,4 @@ +#include + +void eos_modem_init(void); +ssize_t eos_modem_write(void *data, size_t size); \ No newline at end of file diff --git a/code/esp32/components/eos/include/pcm.h b/code/esp32/components/eos/include/pcm.h new file mode 100644 index 0000000..ef8a303 --- /dev/null +++ b/code/esp32/components/eos/include/pcm.h @@ -0,0 +1,5 @@ +#include + +void eos_pcm_init(void); +ssize_t eos_pcm_write(void *data, size_t size); +void eos_pcm_call(void); diff --git a/code/esp32/components/eos/include/transport.h b/code/esp32/components/eos/include/transport.h index 9d76d1b..356014d 100644 --- a/code/esp32/components/eos/include/transport.h +++ b/code/esp32/components/eos/include/transport.h @@ -7,7 +7,7 @@ typedef struct EOSNetAddr { uint16_t port; } EOSNetAddr; -void eos_net_init(void); -void eos_net_connect(char *ssid, char *password); -void eos_net_disconnect(void); -ssize_t eos_net_send(void *msg, size_t msg_size, EOSNetAddr *addr); +void eos_wifi_init(void); +void eos_wifi_connect(char *ssid, char *password); +void eos_wifi_disconnect(void); +ssize_t eos_wifi_send(void *msg, size_t msg_size, EOSNetAddr *addr); diff --git a/code/esp32/components/eos/modem.c b/code/esp32/components/eos/modem.c new file mode 100644 index 0000000..5b55f03 --- /dev/null +++ b/code/esp32/components/eos/modem.c @@ -0,0 +1,79 @@ +#include +#include + +#include +#include +#include +#include +#include +#include + + +#include "eos.h" +#include "fe310.h" + +#define BUF_SIZE 1024 +#define UART_GPIO_DTR 32 +static QueueHandle_t uart_queue; + +static void uart_event_task(void *pvParameters) { + uart_event_t event; + size_t len; + + // Reserve a buffer and process incoming data + uint8_t *data = (uint8_t *) malloc(BUF_SIZE); + + while (1) { + /* Waiting for UART event. + */ + if (xQueueReceive(uart_queue, (void * )&event, (portTickType)portMAX_DELAY)) { + switch (event.type) { + case UART_DATA: + /* Event of UART receiving data + */ + len = 0; + uart_get_buffered_data_len(UART_NUM_2, &len); + if (len) { + len = uart_read_bytes(UART_NUM_2, data, len, 100 / portTICK_RATE_MS); + eos_fe310_send(EOS_FE310_CMD_MODEM_DATA, data, len); + } + break; + default: + break; + } + } + } + free(data); + vTaskDelete(NULL); +} + +void eos_modem_init(void) { + /* Configure parameters of an UART driver, + * communication pins and install the driver */ + uart_config_t uart_config = { + .baud_rate = 115200, + .data_bits = UART_DATA_8_BITS, + .parity = UART_PARITY_DISABLE, + .stop_bits = UART_STOP_BITS_1, + .flow_ctrl = UART_HW_FLOWCTRL_DISABLE + }; + uart_param_config(UART_NUM_2, &uart_config); + uart_set_pin(UART_NUM_2, 17, 16, UART_PIN_NO_CHANGE, UART_PIN_NO_CHANGE); + uart_driver_install(UART_NUM_2, BUF_SIZE, BUF_SIZE, 10, &uart_queue, 0); + + // Configuration for the DTR/RI lines + gpio_config_t io_conf; + + io_conf.intr_type = GPIO_INTR_DISABLE; + io_conf.mode = GPIO_MODE_OUTPUT; + io_conf.pin_bit_mask = ((uint64_t)1 << UART_GPIO_DTR); + gpio_config(&io_conf); + gpio_set_level(UART_GPIO_DTR, 1); + + // Create a task to handle uart event from ISR + xTaskCreate(uart_event_task, "uart_event_task", 2048, NULL, EOS_PRIORITY_MODEM, NULL); +} + +ssize_t eos_modem_write(void *data, size_t size) { + return uart_write_bytes(UART_NUM_2, (const char *)data, size); +} diff --git a/code/esp32/components/eos/pcm.c b/code/esp32/components/eos/pcm.c new file mode 100644 index 0000000..10f7914 --- /dev/null +++ b/code/esp32/components/eos/pcm.c @@ -0,0 +1,135 @@ +#include +#include + +#include +#include +#include +#include +#include + +#include "eos.h" +#include "modem.h" +#include "fe310.h" + +static i2s_dev_t* I2S[I2S_NUM_MAX] = {&I2S0, &I2S1}; + +#define BUF_SIZE 2048 + +static QueueHandle_t i2s_queue; + +static void i2s_event_task(void *pvParameters) { + size_t size_out; + i2s_event_t event; + // Reserve a buffer and process incoming data + uint8_t *data = (uint8_t *) malloc(BUF_SIZE); + + int first = 1; + uint8_t *data_first = NULL; + + while (1) { + // Waiting for I2S event. + if (xQueueReceive(i2s_queue, (void * )&event, (portTickType)portMAX_DELAY)) { + switch (event.type) { + case I2S_EVENT_RX_DONE: + // Event of I2S receiving data + // printf("*** I2S DATA RECEIVED: %d\n ***", event.size); + i2s_read(I2S_NUM_0, (void *)data, BUF_SIZE, &size_out, 1000 / portTICK_RATE_MS); + if (first) { + if (data_first) { + first = 0; + i2s_write(I2S_NUM_0, (const void *)data_first, BUF_SIZE, &size_out, 1000 / portTICK_RATE_MS); + free(data_first); + data_first = NULL; + } else { + data_first = (uint8_t *) malloc(BUF_SIZE); + memcpy(data_first, data, BUF_SIZE); + } + + } + i2s_write(I2S_NUM_0, (const void *)data, BUF_SIZE, &size_out, 1000 / portTICK_RATE_MS); + break; + case I2S_EVENT_DMA_ERROR: + printf("*** I2S DMA ERROR ***"); + break; + default: + break; + } + } + } + free(data); + vTaskDelete(NULL); +} + +static void i2s_write_task(void *pvParameters) { + uint8_t *data = (uint8_t *) malloc(BUF_SIZE); + memset(data, 0x0, BUF_SIZE); + + int i; + for (i=0; iconf.tx_mono = 1; + I2S[I2S_NUM_0]->conf.rx_mono = 1; + i2s_start(I2S_NUM_0); + + // Create a task to handle i2s event from ISR + xTaskCreate(i2s_event_task, "i2s_event_task", 2048, NULL, EOS_PRIORITY_PCM, NULL); + // xTaskCreate(i2s_write_task, "i2s_write_task", 2048, NULL, EOS_PRIORITY_PCM, NULL); +} + +ssize_t eos_pcm_write(void *data, size_t size) { + size_t size_out; + + esp_err_t ret = i2s_write(I2S_NUM_0, (const void *)data, size, &size_out, portMAX_DELAY); + if (ret != ESP_OK) return EOS_ERR; + return size_out; +} + +void eos_pcm_call(void) { + const char *s = "ATD0631942317;\r"; + + i2s_zero_dma_buffer(I2S_NUM_0); + eos_modem_write((void *)s, strlen(s)); + vTaskDelay(1000 / portTICK_RATE_MS); + i2s_start(I2S_NUM_0); +} + diff --git a/code/esp32/components/eos/transport.c b/code/esp32/components/eos/transport.c index e0a913a..4c056a8 100755 --- a/code/esp32/components/eos/transport.c +++ b/code/esp32/components/eos/transport.c @@ -46,6 +46,9 @@ SOFTWARE. #include "eos.h" #include "fe310.h" #include "transport.h" +#include "modem.h" +#include "bq25895.h" +#include "drv2605l.h" static const char *TAG = "EOS"; static int udp_sock = -1; @@ -112,23 +115,10 @@ static void receiver(void *pvParameters) { } memcpy(buffer, addr.host, sizeof(addr.host)); memcpy(buffer+sizeof(addr.host), &addr.port, sizeof(addr.port)); - eos_fe310_send(EOS_FE310_CMD_PKT, buffer, rv+addr_len); + eos_fe310_send(EOS_FE310_CMD_WIFI_PKT, buffer, rv+addr_len); } } -static void fe310_connect_cmd_handler(unsigned char cmd, unsigned char *buffer, uint16_t size) { - eos_net_connect((char *)buffer, (char *)(buffer+strlen((char *)buffer)+1)); -} - -static void fe310_packet_cmd_handler(unsigned char cmd, unsigned char *buffer, uint16_t size) { - EOSNetAddr addr; - size_t addr_len = sizeof(addr.host) + sizeof(addr.port); - - memcpy(addr.host, buffer, sizeof(addr.host)); - memcpy(&addr.port, buffer+sizeof(addr.host), sizeof(addr.port)); - eos_net_send(buffer+addr_len, size-addr_len, &addr); -} - static esp_err_t esp32_wifi_event_handler(void *ctx, system_event_t *event) { switch(event->event_id) { case SYSTEM_EVENT_WIFI_READY: @@ -154,13 +144,14 @@ static esp_err_t esp32_wifi_event_handler(void *ctx, system_event_t *event) { case SYSTEM_EVENT_STA_GOT_IP: ESP_LOGI(TAG, "********************************************"); - ESP_LOGI(TAG, "* We are now connected to AP") + ESP_LOGI(TAG, "* We are now connected to AP"); ESP_LOGI(TAG, "* - Our IP address is: " IPSTR, IP2STR(&event->event_info.got_ip.ip_info.ip)); ESP_LOGI(TAG, "********************************************"); t_open(); xTaskCreate(&receiver, "wifi_receiver", 4096, NULL, EOS_PRIORITY_WIFI, &receiver_task); // xTaskCreatePinnedToCore(&receiver, "wifi_receiver", 4096, NULL, EOS_PRIORITY_WIFI, &receiver_task, 1); - eos_fe310_send(EOS_FE310_CMD_CONNECT, NULL, 0); + eos_fe310_send(EOS_FE310_CMD_WIFI_CONNECT, NULL, 0); + // eos_drv2605l_test(); break; default: // Ignore the other event types @@ -170,7 +161,7 @@ static esp_err_t esp32_wifi_event_handler(void *ctx, system_event_t *event) { return ESP_OK; } -void eos_net_init(void) { +void eos_wifi_init(void) { wifi_init_config_t cfg = WIFI_INIT_CONFIG_DEFAULT(); wifi_config_t wifi_config; @@ -183,13 +174,12 @@ void eos_net_init(void) { ESP_ERROR_CHECK( esp_wifi_set_mode(WIFI_MODE_STA) ); ESP_ERROR_CHECK( esp_wifi_set_config(ESP_IF_WIFI_STA, &wifi_config) ); ESP_ERROR_CHECK( esp_wifi_start() ); - eos_fe310_set_handler(EOS_FE310_CMD_CONNECT, fe310_connect_cmd_handler); - eos_fe310_set_handler(EOS_FE310_CMD_PKT, fe310_packet_cmd_handler); } -void eos_net_connect(char *ssid, char *password) { +void eos_wifi_connect(char *ssid, char *password) { wifi_config_t wifi_config; + ESP_LOGI(TAG, "CONNECTING...."); memset(&wifi_config, 0, sizeof(wifi_config)); strncpy((char *)wifi_config.sta.ssid, ssid, 31); strncpy((char *)wifi_config.sta.password, password, 63); @@ -197,10 +187,10 @@ void eos_net_connect(char *ssid, char *password) { ESP_ERROR_CHECK( esp_wifi_connect() ); } -void eos_net_disconnect(void) { +void eos_wifi_disconnect(void) { ESP_ERROR_CHECK( esp_wifi_disconnect() ); } -ssize_t eos_net_send(void *msg, size_t msg_size, EOSNetAddr *addr) { +ssize_t eos_wifi_send(void *msg, size_t msg_size, EOSNetAddr *addr) { return t_send(msg, msg_size, addr); } -- cgit v1.2.3