From a4db825b4daf66f94c5f9f8450b7f27c42308735 Mon Sep 17 00:00:00 2001 From: Uros Majstorovic Date: Wed, 18 Aug 2021 03:20:25 +0200 Subject: refactor dts --- .../linux/rvphone/cl-imx8/dts/cl-imx8-wifi.dtsi | 24 ++++++++++++++++++++++ 1 file changed, 24 insertions(+) create mode 100644 recipes-kernel/linux/rvphone/cl-imx8/dts/cl-imx8-wifi.dtsi (limited to 'recipes-kernel/linux/rvphone/cl-imx8/dts/cl-imx8-wifi.dtsi') diff --git a/recipes-kernel/linux/rvphone/cl-imx8/dts/cl-imx8-wifi.dtsi b/recipes-kernel/linux/rvphone/cl-imx8/dts/cl-imx8-wifi.dtsi new file mode 100644 index 0000000..45acca5 --- /dev/null +++ b/recipes-kernel/linux/rvphone/cl-imx8/dts/cl-imx8-wifi.dtsi @@ -0,0 +1,24 @@ +&iomuxc { + rvphone-cl-imx8-wifi { + pinctrl_pcie1: pcie1grp { + fsl,pins = < + MX8MQ_IOMUXC_SAI3_RXC_GPIO4_IO29 0x16 /* WIFI reset-gpio */ + MX8MQ_IOMUXC_GPIO1_IO01_GPIO1_IO1 0x16 /* WIFI disable-gpio */ + + MX8MQ_IOMUXC_GPIO1_IO03_GPIO1_IO3 0x16 /* WIFI pewake */ + MX8MQ_IOMUXC_GPIO1_IO00_ANAMIX_REF_CLK_32K 0x16 + >; + }; + + }; +}; + +&pcie1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pcie1>; + reset-gpio = <&gpio4 29 GPIO_ACTIVE_LOW>; + disable-gpio = <&gpio1 1 GPIO_ACTIVE_LOW>; + ext_osc = <0>; + hard-wired = <1>; + status = "okay"; +}; -- cgit v1.2.3