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authorUros Majstorovic <majstor@majstor.org>2019-12-07 17:13:23 +0100
committerUros Majstorovic <majstor@majstor.org>2019-12-07 17:13:23 +0100
commit040f4333678f46f3558e604014d460076244af6b (patch)
tree084b8a41eef67a9bf45a5c21124fc393061f88fb /code/esp32/components/eos/drv2605l.c
parent8cdc7528c800a3f10bca3e875e76f6d9661ab88f (diff)
added net_alloc; fixed cell modem driver
Diffstat (limited to 'code/esp32/components/eos/drv2605l.c')
-rw-r--r--code/esp32/components/eos/drv2605l.c45
1 files changed, 11 insertions, 34 deletions
diff --git a/code/esp32/components/eos/drv2605l.c b/code/esp32/components/eos/drv2605l.c
index 5a2aa8c..023367e 100644
--- a/code/esp32/components/eos/drv2605l.c
+++ b/code/esp32/components/eos/drv2605l.c
@@ -4,7 +4,7 @@
#include "eos.h"
#include "i2c.h"
-static const char *TAG = "DRV2605L";
+static const char *TAG = "EOS DRV2605L";
#define DRV2605L_ADDR 0x5A
@@ -52,37 +52,19 @@ static const char *TAG = "DRV2605L";
#define DRV2605_REG_VBAT 0x21 ///< Vbat voltage-monitor register
#define DRV2605_REG_LRARESON 0x22 ///< LRA resonance-period register
-/**
- * @brief test function to show buffer
- */
-static void disp_buf(uint8_t *buf, int len)
-{
- int i;
- for (i = 0; i < len; i++) {
- printf("%02x ", buf[i]);
- if ((i + 1) % 16 == 0) {
- printf("\n");
- }
- }
- printf("\n");
-}
-
void eos_drv2605l_test(void) {
uint8_t data = 0;
-
+
int ret = eos_i2c_read(DRV2605L_ADDR, DRV2605_REG_STATUS, &data, 1);
if (ret) ESP_LOGE(TAG, "I2C ERROR!");
- ESP_LOGI(TAG, "OK BUFFER: ");
- disp_buf(&data, 1);
-
- eos_i2c_write8(DRV2605L_ADDR, DRV2605_REG_MODE, 0x00); // out of standby
- eos_i2c_write8(DRV2605L_ADDR, DRV2605_REG_RTPIN, 0x00); // no real-time-playback
+ eos_i2c_write8(DRV2605L_ADDR, DRV2605_REG_MODE, 0x00); // out of standby
+ eos_i2c_write8(DRV2605L_ADDR, DRV2605_REG_RTPIN, 0x00); // no real-time-playback
- eos_i2c_write8(DRV2605L_ADDR, DRV2605_REG_WAVESEQ1, 1); // strong click
- eos_i2c_write8(DRV2605L_ADDR, DRV2605_REG_WAVESEQ2, 0); // end sequence
+ eos_i2c_write8(DRV2605L_ADDR, DRV2605_REG_WAVESEQ1, 1); // strong click
+ eos_i2c_write8(DRV2605L_ADDR, DRV2605_REG_WAVESEQ2, 0); // end sequence
- eos_i2c_write8(DRV2605L_ADDR, DRV2605_REG_OVERDRIVE, 0); // no overdrive
+ eos_i2c_write8(DRV2605L_ADDR, DRV2605_REG_OVERDRIVE, 0); // no overdrive
eos_i2c_write8(DRV2605L_ADDR, DRV2605_REG_SUSTAINPOS, 0);
eos_i2c_write8(DRV2605L_ADDR, DRV2605_REG_SUSTAINNEG, 0);
@@ -90,15 +72,10 @@ void eos_drv2605l_test(void) {
eos_i2c_write8(DRV2605L_ADDR, DRV2605_REG_AUDIOMAX, 0x64);
// LRA open loop
- // turn on N_ERM_LRA
- eos_i2c_write8(DRV2605L_ADDR, DRV2605_REG_FEEDBACK, eos_i2c_read8(DRV2605L_ADDR, DRV2605_REG_FEEDBACK) | 0x80);
-
- // turn on LRA_OPEN_LOOP
- eos_i2c_write8(DRV2605L_ADDR, DRV2605_REG_CONTROL3, eos_i2c_read8(DRV2605L_ADDR, DRV2605_REG_CONTROL3) | 0x01);
+ eos_i2c_write8(DRV2605L_ADDR, DRV2605_REG_FEEDBACK, eos_i2c_read8(DRV2605L_ADDR, DRV2605_REG_FEEDBACK) | 0x80); // turn on N_ERM_LRA
+ eos_i2c_write8(DRV2605L_ADDR, DRV2605_REG_CONTROL3, eos_i2c_read8(DRV2605L_ADDR, DRV2605_REG_CONTROL3) | 0x01); // turn on LRA_OPEN_LOOP
+ eos_i2c_write8(DRV2605L_ADDR, DRV2605_REG_LIBRARY, 6); // set LRA library
+ eos_i2c_write8(DRV2605L_ADDR, DRV2605_REG_GO, 1); // go
- // set LRA library
- eos_i2c_write8(DRV2605L_ADDR, DRV2605_REG_LIBRARY, 6);
- // go
- eos_i2c_write8(DRV2605L_ADDR, DRV2605_REG_GO, 1);
}