diff options
author | Uros Majstorovic <majstor@majstor.org> | 2019-10-16 14:04:39 +0200 |
---|---|---|
committer | Uros Majstorovic <majstor@majstor.org> | 2019-10-16 14:04:39 +0200 |
commit | f74dcae328e3650acf6b12499a55548b46117877 (patch) | |
tree | 8183b187c27ae9238c3e6ef07d5f694171bcbc4f /code/fe310/eos/i2s.c | |
parent | b7a007eb9d3548e2bcd141681a91b8a748d3ce49 (diff) |
i2s init / start fixed
Diffstat (limited to 'code/fe310/eos/i2s.c')
-rw-r--r-- | code/fe310/eos/i2s.c | 91 |
1 files changed, 35 insertions, 56 deletions
diff --git a/code/fe310/eos/i2s.c b/code/fe310/eos/i2s.c index 0bd818a..6912f34 100644 --- a/code/fe310/eos/i2s.c +++ b/code/fe310/eos/i2s.c @@ -23,16 +23,15 @@ EOSABuf _eos_i2s_mic_buf; EOSABuf _eos_i2s_spk_buf; uint32_t _eos_i2s_fmt = 0; -uint32_t _eos_i2s_ck_period = 0; uint32_t _eos_i2s_mic_volume = 0; uint32_t _eos_i2s_spk_volume = 0; -uint32_t _eos_i2s_mic_wm; -uint32_t _eos_i2s_spk_wm; -uint32_t _eos_i2s_mic_evt_enable; -uint32_t _eos_i2s_spk_evt_enable; +uint32_t _eos_i2s_mic_wm = 0; +uint32_t _eos_i2s_spk_wm = 0; +uint32_t _eos_i2s_mic_evt_enable = 0; +uint32_t _eos_i2s_spk_evt_enable = 0; -static eos_i2s_fptr_t spk_evt_handler; -static eos_i2s_fptr_t mic_evt_handler; +static eos_i2s_fptr_t spk_evt_handler = NULL; +static eos_i2s_fptr_t mic_evt_handler = NULL; static void _abuf_init(EOSABuf *buf, uint8_t *array, uint16_t size) { buf->idx_r = 0; @@ -109,12 +108,15 @@ static void i2s_handler_evt(unsigned char type, unsigned char *buffer, uint16_t } } -void eos_i2s_init(uint32_t sample_rate) { - int i; - unsigned long f = get_cpu_freq(); +extern void _eos_i2s_start_pwm(void); - _eos_i2s_ck_period = (f / (sample_rate * 64)) & ~I2S_PWM_SCALE_CK_MASK; - uint32_t _ck_period_scaled = _eos_i2s_ck_period >> I2S_PWM_SCALE_CK; +void eos_i2s_init(void) { + eos_evtq_set_handler(EOS_EVT_AUDIO, i2s_handler_evt); + eos_evtq_set_flags(EOS_EVT_AUDIO | I2S_ETYPE_MIC, EOS_EVT_FLAG_NET_BUF_ACQ); +} + +void eos_i2s_start(uint32_t sample_rate, unsigned char fmt) { + uint32_t ck_period = (get_cpu_freq() / (sample_rate * 64)) & ~I2S_PWM_SCALE_CK_MASK;; GPIO_REG(GPIO_INPUT_EN) &= ~(1 << I2S_PIN_CK); GPIO_REG(GPIO_OUTPUT_EN) |= (1 << I2S_PIN_CK); @@ -145,50 +147,34 @@ void eos_i2s_init(uint32_t sample_rate) { GPIO_REG(GPIO_PULLUP_EN) &= ~(1 << I2S_PIN_SD_OUT); GPIO_REG(GPIO_OUTPUT_XOR) &= ~(1 << I2S_PIN_SD_OUT); - I2S_PWM_REG_CK(PWM_CFG) = 0; - I2S_PWM_REG_CK(PWM_COUNT) = 0; - I2S_PWM_REG_CK(PWM_CMP0) = _ck_period_scaled; - I2S_PWM_REG_CK(PWM_CMP1) = _ck_period_scaled / 2; + I2S_PWM_REG_CK(PWM_CMP0) = ck_period >> I2S_PWM_SCALE_CK; + I2S_PWM_REG_CK(PWM_CMP1) = I2S_PWM_REG_CK(PWM_CMP0) / 2; I2S_PWM_REG_CK(PWM_CMP2) = 0; I2S_PWM_REG_CK(PWM_CMP3) = 0; - I2S_PWM_REG_WS_MIC(PWM_CFG) = 0; - I2S_PWM_REG_WS_MIC(PWM_COUNT) = 0; - I2S_PWM_REG_WS_MIC(PWM_CMP0) = (_eos_i2s_ck_period + 1) * 64 - 1; - I2S_PWM_REG_WS_MIC(PWM_CMP1) = (_eos_i2s_ck_period + 1) * 32; - I2S_PWM_REG_WS_MIC(PWM_CMP2) = (_eos_i2s_ck_period + 1) * _eos_i2s_mic_volume; - I2S_PWM_REG_WS_MIC(PWM_CMP3) = I2S_PWM_REG_WS_MIC(PWM_CMP2) + (_eos_i2s_ck_period + 1) * 17; - - I2S_PWM_REG_WS_SPK(PWM_CFG) = 0; - I2S_PWM_REG_WS_SPK(PWM_COUNT) = 0; - I2S_PWM_REG_WS_SPK(PWM_CMP0) = (_eos_i2s_ck_period + 1) * 64 - 1; - I2S_PWM_REG_WS_SPK(PWM_CMP1) = (_eos_i2s_ck_period + 1) * 32; - I2S_PWM_REG_WS_SPK(PWM_CMP2) = (_eos_i2s_ck_period + 1) * 33; + I2S_PWM_REG_WS_MIC(PWM_CMP0) = (ck_period + 1) * 64 - 1; + I2S_PWM_REG_WS_MIC(PWM_CMP1) = (ck_period + 1) * 32; + I2S_PWM_REG_WS_MIC(PWM_CMP2) = (ck_period + 1) * _eos_i2s_mic_volume; + I2S_PWM_REG_WS_MIC(PWM_CMP3) = I2S_PWM_REG_WS_MIC(PWM_CMP2) + (ck_period + 1) * 17; - _eos_i2s_mic_evt_enable = 0; - _eos_i2s_spk_evt_enable = 0; - mic_evt_handler = NULL; - spk_evt_handler = NULL; + I2S_PWM_REG_WS_SPK(PWM_CMP0) = (ck_period + 1) * 64 - 1; + I2S_PWM_REG_WS_SPK(PWM_CMP1) = (ck_period + 1) * 32; + I2S_PWM_REG_WS_SPK(PWM_CMP2) = (ck_period + 1) * 33; - eos_intr_set(I2S_IRQ_WS_ID, 0, NULL); - eos_intr_set(I2S_IRQ_SD_ID, 0, NULL); - eos_evtq_set_handler(EOS_EVT_AUDIO, i2s_handler_evt); - eos_evtq_set_flags(EOS_EVT_AUDIO | I2S_ETYPE_MIC, EOS_EVT_FLAG_NET_BUF_ACQ); -} - -extern void _eos_set_pwm(void); + I2S_PWM_REG_CK(PWM_COUNT) = 0; + I2S_PWM_REG_WS_MIC(PWM_COUNT) = (ck_period + 1) * 32; + I2S_PWM_REG_WS_SPK(PWM_COUNT) = (ck_period + 1) * 32 + (ck_period + 1) * (_eos_i2s_spk_volume + 1 - _eos_i2s_mic_volume) + (ck_period + 1) / 2; -void eos_i2s_start(void) { + _eos_i2s_fmt = fmt; _eos_i2s_mic_evt_enable = 1; _eos_i2s_spk_evt_enable = 1; eos_intr_set_priority(I2S_IRQ_WS_ID, I2S_IRQ_WS_PRIORITY); + eos_intr_set_priority(I2S_IRQ_SD_ID, 0); + eos_intr_enable(I2S_IRQ_WS_ID); + eos_intr_enable(I2S_IRQ_SD_ID); - I2S_PWM_REG_CK(PWM_COUNT) = 0; - I2S_PWM_REG_WS_MIC(PWM_COUNT) = (_eos_i2s_ck_period + 1) * 32; - I2S_PWM_REG_WS_SPK(PWM_COUNT) = (_eos_i2s_ck_period + 1) * 32 + (_eos_i2s_ck_period + 1) * (_eos_i2s_spk_volume + 1 - _eos_i2s_mic_volume) + (_eos_i2s_ck_period + 1) / 2; - - _eos_set_pwm(); + _eos_i2s_start_pwm(); /* I2S_PWM_REG_CK(PWM_CFG) = PWM_CFG_ENALWAYS | PWM_CFG_ZEROCMP | I2S_PWM_SCALE_CK; I2S_PWM_REG_WS_MIC(PWM_CFG) = PWM_CFG_ENALWAYS | PWM_CFG_ZEROCMP | PWM_CFG_CMP2GANG; @@ -218,11 +204,12 @@ void eos_i2s_stop(void) { I2S_PWM_REG_WS_MIC(PWM_COUNT) = 0; I2S_PWM_REG_WS_SPK(PWM_COUNT) = 0; + _eos_i2s_mic_evt_enable = 0; + _eos_i2s_spk_evt_enable = 0; eos_intr_set_priority(I2S_IRQ_WS_ID, 0); eos_intr_set_priority(I2S_IRQ_SD_ID, 0); - eos_intr_mask(0); - eos_i2s_mic_init(NULL, 0); - eos_i2s_spk_init(NULL, 0); + eos_intr_disable(I2S_IRQ_WS_ID); + eos_intr_disable(I2S_IRQ_SD_ID); GPIO_REG(GPIO_IOF_EN) &= ~(1 << I2S_PIN_CK); GPIO_REG(GPIO_IOF_SEL) &= ~(1 << I2S_PIN_CK); @@ -240,14 +227,6 @@ void eos_i2s_stop(void) { GPIO_REG(GPIO_OUTPUT_VAL) |= (1 << I2S_PIN_CK_SW); } -void eos_i2s_set_fmt(unsigned char fmt) { - clear_csr(mstatus, MSTATUS_MIE); - _eos_i2s_fmt = fmt; - _abuf_flush(&_eos_i2s_mic_buf); - _abuf_flush(&_eos_i2s_spk_buf); - set_csr(mstatus, MSTATUS_MIE); -} - void eos_i2s_mic_init(uint8_t *mic_arr, uint16_t mic_arr_size) { clear_csr(mstatus, MSTATUS_MIE); _abuf_init(&_eos_i2s_mic_buf, mic_arr, mic_arr_size); |