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authorUros Majstorovic <majstor@majstor.org>2018-04-06 21:52:09 +0200
committerUros Majstorovic <majstor@majstor.org>2018-04-06 21:52:09 +0200
commit031e99994f495d584e3579cb3920dcc821d28ef1 (patch)
treea989486f898711d842daa6201189f8745a19b549 /code/fe310/eos/i2s_def.h
parent45ffefd8a79598900ea288c726a29aa145d46bb2 (diff)
shift register i2s impl
Diffstat (limited to 'code/fe310/eos/i2s_def.h')
-rw-r--r--code/fe310/eos/i2s_def.h16
1 files changed, 6 insertions, 10 deletions
diff --git a/code/fe310/eos/i2s_def.h b/code/fe310/eos/i2s_def.h
index 4a7fd85..2b9d852 100644
--- a/code/fe310/eos/i2s_def.h
+++ b/code/fe310/eos/i2s_def.h
@@ -2,26 +2,22 @@
#define I2S_EVT_SPK 0x1
#define I2S_MAX_HANDLER 2
-#define I2S_PIN_SD 12 // pin 18
-// #define I2S_PIN_CK 19 // pin 3
#define I2S_PIN_CK 1 // pin 9
+#define I2S_PIN_CKE 12 // pin 18
+#define I2S_PIN_CKF 18 // pin 2
+#define I2S_PIN_SD 20 // pin 4
#define I2S_PIN_WS 11 // pin 17
#define I2S_PIN_LR 13 // pin 19
-#define I2S_IRQ_SD_ID (INT_PWM0_BASE + 2)
-#define I2S_IRQ_CK_ID (INT_PWM0_BASE + 0)
#define I2S_IRQ_WS_ID (INT_PWM2_BASE + 0)
-#define I2S_IRQ_CI_ID (INT_PWM2_BASE + 2)
+#define I2S_IRQ_SD_ID (INT_PWM2_BASE + 3)
-#define I2S_IRQ_SD_PRIORITY 7
-#define I2S_IRQ_CK_PRIORITY 6
#define I2S_IRQ_WS_PRIORITY 6
-#define I2S_IRQ_CI_PRIORITY 7
-#define I2S_IRQ_MASK 5
+#define I2S_IRQ_SD_PRIORITY 7
#define I2S_SMPL_BITS 13
-#define I2S_SMPL_BITS_S 5
+#define I2S_IDLE_CYCLES 8
#define I2S_PWM_SCALE_CK 2
#define I2S_PWM_SCALE_CK_MASK 0x0003