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authorUros Majstorovic <majstor@majstor.org>2019-10-08 22:47:10 +0200
committerUros Majstorovic <majstor@majstor.org>2019-10-08 22:47:10 +0200
commit99739c5a4c3ecec5aec81711d2e5385bfe7a2b10 (patch)
tree8c5f706e7f3a97a8956b64ce12e8eff43d7b992a /code/fe310/eos
parent4c4154b1c37a8f1909836547db35dbc7029c90b1 (diff)
fixed audio and spi pins for board REV1
Diffstat (limited to 'code/fe310/eos')
-rw-r--r--code/fe310/eos/event.c2
-rw-r--r--code/fe310/eos/i2s.c4
-rw-r--r--code/fe310/eos/i2s_def.h14
-rw-r--r--code/fe310/eos/spi_def.h2
-rw-r--r--code/fe310/eos/trap_entry.S4
5 files changed, 13 insertions, 13 deletions
diff --git a/code/fe310/eos/event.c b/code/fe310/eos/event.c
index 1cffb26..2aa4ecf 100644
--- a/code/fe310/eos/event.c
+++ b/code/fe310/eos/event.c
@@ -90,7 +90,7 @@ void eos_evtq_loop(void) {
evtq_handler(cmd, buffer, len);
clear_csr(mstatus, MSTATUS_MIE);
} else {
- asm volatile ("wfi");
+ // asm volatile ("wfi");
}
set_csr(mstatus, MSTATUS_MIE);
}
diff --git a/code/fe310/eos/i2s.c b/code/fe310/eos/i2s.c
index d6e924b..2ff465e 100644
--- a/code/fe310/eos/i2s.c
+++ b/code/fe310/eos/i2s.c
@@ -12,8 +12,8 @@
#include "i2s_def.h"
#define I2S_PWM_REG_CK PWM0_REG
-#define I2S_PWM_REG_WS_SPK PWM1_REG
-#define I2S_PWM_REG_WS_MIC PWM2_REG
+#define I2S_PWM_REG_WS_MIC PWM1_REG
+#define I2S_PWM_REG_WS_SPK PWM2_REG
#define EOS_ABUF_IDX_MASK(IDX, SIZE) ((IDX) & ((SIZE) - 1))
diff --git a/code/fe310/eos/i2s_def.h b/code/fe310/eos/i2s_def.h
index fc22b49..06fef72 100644
--- a/code/fe310/eos/i2s_def.h
+++ b/code/fe310/eos/i2s_def.h
@@ -2,16 +2,16 @@
#define I2S_EVT_SPK 0x1
#define I2S_MAX_HANDLER 2
-#define I2S_PIN_CK 1
-#define I2S_PIN_CK_SW 12
+#define I2S_PIN_CK 1 /* PWM 0.1 */
+#define I2S_PIN_CK_SW 21 /* PWM 1.2 */
#define I2S_PIN_CK_SR 18
-#define I2S_PIN_WS_MIC 11
-#define I2S_PIN_WS_SPK 19
+#define I2S_PIN_WS_MIC 19 /* PWM 1.1 */
+#define I2S_PIN_WS_SPK 11 /* PWM 2.1 */
#define I2S_PIN_SD_IN 13
-#define I2S_PIN_SD_OUT 20
+#define I2S_PIN_SD_OUT 12
-#define I2S_IRQ_WS_ID (INT_PWM1_BASE + 0)
-#define I2S_IRQ_SD_ID (INT_PWM1_BASE + 2)
+#define I2S_IRQ_WS_ID (INT_PWM2_BASE + 0)
+#define I2S_IRQ_SD_ID (INT_PWM2_BASE + 2)
#define I2S_IRQ_WS_PRIORITY 6
#define I2S_IRQ_SD_PRIORITY 7
diff --git a/code/fe310/eos/spi_def.h b/code/fe310/eos/spi_def.h
index e73b5e3..44d3030 100644
--- a/code/fe310/eos/spi_def.h
+++ b/code/fe310/eos/spi_def.h
@@ -10,7 +10,7 @@
#define SPI_SIZE_CHUNK 4
#define SPI_SIZE_WM 2
-#define SPI_PIN_RTS 21
+#define SPI_PIN_RTS 20
#define SPI_PIN_CTS 22
#define SPI_PIN_CS 10
#define SPI_IDX_SS 3
diff --git a/code/fe310/eos/trap_entry.S b/code/fe310/eos/trap_entry.S
index bed2524..1908327 100644
--- a/code/fe310/eos/trap_entry.S
+++ b/code/fe310/eos/trap_entry.S
@@ -30,8 +30,8 @@
#define INT_PWM2_BASE 48
#define I2S_PWM_CTRL_ADDR_CK PWM0_CTRL_ADDR
-#define I2S_PWM_CTRL_ADDR_WS_SPK PWM1_CTRL_ADDR
-#define I2S_PWM_CTRL_ADDR_WS_MIC PWM2_CTRL_ADDR
+#define I2S_PWM_CTRL_ADDR_WS_MIC PWM1_CTRL_ADDR
+#define I2S_PWM_CTRL_ADDR_WS_SPK PWM2_CTRL_ADDR
#define IOF_SPI1_SS0 2
#define IOF_SPI1_SS1 8