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author | Uros Majstorovic <majstor@majstor.org> | 2019-12-04 06:11:35 +0100 |
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committer | Uros Majstorovic <majstor@majstor.org> | 2019-12-04 06:11:35 +0100 |
commit | 31578e285a21a749a49e3ac146feb8b02fcc7b52 (patch) | |
tree | e67f619360352a87fb6e0f410f5246468fbc1073 /code/fe310/metal/metal.c | |
parent | 2c981aec5e5c10f9fd036dfb48105b16f16e4233 (diff) |
added new metal sdk
Diffstat (limited to 'code/fe310/metal/metal.c')
-rw-r--r-- | code/fe310/metal/metal.c | 34 |
1 files changed, 34 insertions, 0 deletions
diff --git a/code/fe310/metal/metal.c b/code/fe310/metal/metal.c new file mode 100644 index 0000000..00849b9 --- /dev/null +++ b/code/fe310/metal/metal.c @@ -0,0 +1,34 @@ +#include <sys/cdefs.h> + +#include "encoding.h" +#include "platform.h" +#include "prci_driver.h" + +extern void eos_trap_entry(); + +static void uart_init(size_t baud_rate) { + GPIO_REG(GPIO_IOF_SEL) &= ~IOF0_UART0_MASK; + GPIO_REG(GPIO_IOF_EN) |= IOF0_UART0_MASK; + UART0_REG(UART_REG_DIV) = PRCI_get_cpu_freq() / baud_rate - 1; + UART0_REG(UART_REG_TXCTRL) |= UART_TXEN; + UART0_REG(UART_REG_RXCTRL) |= UART_RXEN; +} + +__attribute__((constructor)) +void metal_init(void) { + SPI0_REG(SPI_REG_SCKDIV) = 8; + + PRCI_use_default_clocks(); + PRCI_use_pll(PLL_REFSEL_HFXOSC, 0, 1, 31, 1, -1, -1, -1); + uart_init(115200); + + write_csr(mtvec, &eos_trap_entry); + if (read_csr(misa) & (1 << ('F' - 'A'))) { // if F extension is present + write_csr(mstatus, MSTATUS_FS); // allow FPU instructions without trapping + write_csr(fcsr, 0); // initialize rounding mode, undefined at reset + } +} + +__attribute__((section(".init"))) +void __metal_synchronize_harts() { +} |