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authorUros Majstorovic <majstor@majstor.org>2019-08-30 13:31:31 +0200
committerUros Majstorovic <majstor@majstor.org>2019-08-30 13:31:31 +0200
commiteaf219d0b4cce0bd6853bf29820d01ca6050be65 (patch)
treeddb2740d40fd632cfe739ae3fecacc59458893a3 /footprints.pretty/Wurth_NanoSIM-693043020611.kicad_mod
parent629511a4d61e8a7b06576246f85ad8368a2edba4 (diff)
REV1 board
Diffstat (limited to 'footprints.pretty/Wurth_NanoSIM-693043020611.kicad_mod')
-rw-r--r--footprints.pretty/Wurth_NanoSIM-693043020611.kicad_mod14
1 files changed, 7 insertions, 7 deletions
diff --git a/footprints.pretty/Wurth_NanoSIM-693043020611.kicad_mod b/footprints.pretty/Wurth_NanoSIM-693043020611.kicad_mod
index 7609313..777bbf8 100644
--- a/footprints.pretty/Wurth_NanoSIM-693043020611.kicad_mod
+++ b/footprints.pretty/Wurth_NanoSIM-693043020611.kicad_mod
@@ -1,4 +1,4 @@
-(module Wurth_NanoSIM-693043020611 (layer F.Cu) (tedit 0)
+(module Wurth_NanoSIM-693043020611 (layer F.Cu) (tedit 5D52D431)
(fp_text reference NanoSIM-693043020611 (at -5.6388 0 90) (layer F.SilkS) hide
(effects (font (size 0.762 0.762) (thickness 0.127)))
)
@@ -10,12 +10,12 @@
(fp_line (start -3.62204 6.08) (end 3.62204 6.08) (layer F.SilkS) (width 0.15))
(fp_line (start -4.65 4.89204) (end -4.65 1.33096) (layer F.SilkS) (width 0.15))
(fp_line (start -4.65 -1.33096) (end -4.65 -4.5212) (layer F.SilkS) (width 0.15))
- (pad 5 smd rect (at -3.175 -6.42) (size 0.65 1.3) (layers F.Cu F.Paste F.Mask))
- (pad 1 smd rect (at -1.905 -6.42) (size 0.65 1.3) (layers F.Cu F.Paste F.Mask))
- (pad 6 smd rect (at -0.635 -6.42) (size 0.65 1.3) (layers F.Cu F.Paste F.Mask))
- (pad 2 smd rect (at 0.635 -6.42) (size 0.65 1.3) (layers F.Cu F.Paste F.Mask))
- (pad 3 smd rect (at 1.905 -6.42) (size 0.65 1.3) (layers F.Cu F.Paste F.Mask))
- (pad 7 smd rect (at 3.175 -6.42) (size 0.65 1.3) (layers F.Cu F.Paste F.Mask))
+ (pad 7 smd rect (at -3.175 -6.42) (size 0.65 1.3) (layers F.Cu F.Paste F.Mask))
+ (pad 3 smd rect (at -1.905 -6.42) (size 0.65 1.3) (layers F.Cu F.Paste F.Mask))
+ (pad 2 smd rect (at -0.635 -6.42) (size 0.65 1.3) (layers F.Cu F.Paste F.Mask))
+ (pad 6 smd rect (at 0.635 -6.42) (size 0.65 1.3) (layers F.Cu F.Paste F.Mask))
+ (pad 1 smd rect (at 1.905 -6.42) (size 0.65 1.3) (layers F.Cu F.Paste F.Mask))
+ (pad 5 smd rect (at 3.175 -6.42) (size 0.65 1.3) (layers F.Cu F.Paste F.Mask))
(pad 0 smd rect (at -4.43 -5.75) (size 0.35 1.8) (layers F.Cu F.Paste F.Mask))
(pad 0 smd rect (at 4.43 -5.75) (size 0.35 1.8) (layers F.Cu F.Paste F.Mask))
(pad 0 smd rect (at -4.43 0) (size 0.35 2) (layers F.Cu F.Paste F.Mask))