diff options
| author | Uros Majstorovic <majstor@majstor.org> | 2024-09-12 15:50:45 +0200 |
|---|---|---|
| committer | Uros Majstorovic <majstor@majstor.org> | 2024-09-12 15:50:45 +0200 |
| commit | 7d6a4577db016644061778fe035a3b931b73f267 (patch) | |
| tree | 9ec8e51709b0bd14a33dc1c4ee7a74f806b515af /fw/fe310/eos/dev/apds9151.h | |
| parent | fbef02e7d13e85ddfc9b22c7f06cbfad9f0fd9d3 (diff) | |
prox sensor driver initial import
Diffstat (limited to 'fw/fe310/eos/dev/apds9151.h')
| -rw-r--r-- | fw/fe310/eos/dev/apds9151.h | 32 |
1 files changed, 32 insertions, 0 deletions
diff --git a/fw/fe310/eos/dev/apds9151.h b/fw/fe310/eos/dev/apds9151.h new file mode 100644 index 0000000..2827dfe --- /dev/null +++ b/fw/fe310/eos/dev/apds9151.h @@ -0,0 +1,32 @@ +#include <stdint.h> + +#define APDS9151_REG_SIZE_8 0x00 +#define APDS9151_REG_SIZE_16 0x40 +#define APDS9151_REG_SIZE_32 0x80 + +#define APDS9151_REG_MAIN_CTRL (0x00 | APDS9151_REG_SIZE_8) +#define APDS9151_REG_PS_LED (0x01 | APDS9151_REG_SIZE_8) +#define APDS9151_REG_PS_PULSES (0x02 | APDS9151_REG_SIZE_8) +#define APDS9151_REG_PS_MEAS_RATE (0x03 | APDS9151_REG_SIZE_8) +#define APDS9151_REG_LS_MEAS_RATE (0x04 | APDS9151_REG_SIZE_8) +#define APDS9151_REG_LS_GAIN (0x05 | APDS9151_REG_SIZE_8) +#define APDS9151_REG_PART_ID (0x06 | APDS9151_REG_SIZE_8) +#define APDS9151_REG_MAIN_STATUS (0x07 | APDS9151_REG_SIZE_8) +#define APDS9151_REG_PS_DATA (0x08 | APDS9151_REG_SIZE_16) +#define APDS9151_REG_LS_DATA_IR (0x0A | APDS9151_REG_SIZE_32) +#define APDS9151_REG_LS_DATA_GREEN (0x0D | APDS9151_REG_SIZE_32) +#define APDS9151_REG_LS_DATA_BLUE (0x10 | APDS9151_REG_SIZE_32) +#define APDS9151_REG_LS_DATA_RED (0x13 | APDS9151_REG_SIZE_32) +#define APDS9151_REG_INT_CFG (0x19 | APDS9151_REG_SIZE_8) +#define APDS9151_REG_INT_PST (0x1A | APDS9151_REG_SIZE_8) +#define APDS9151_REG_PS_THRES_UP (0x1B | APDS9151_REG_SIZE_16) +#define APDS9151_REG_PS_THRES_LOW (0x1D | APDS9151_REG_SIZE_16) +#define APDS9151_REG_PS_CAN (0x1F | APDS9151_REG_SIZE_16) +#define APDS9151_REG_LS_THRES_UP (0x21 | APDS9151_REG_SIZE_32) +#define APDS9151_REG_LS_THRES_LOW (0x24 | APDS9151_REG_SIZE_32) +#define APDS9151_REG_LS_THRES_VAR (0x27 | APDS9151_REG_SIZE_8) + +#define APDS9151_REG_MASK 0x3F + +int eos_apds9151_reg_read(uint8_t reg, void *data); +int eos_apds9151_reg_write(uint8_t reg, uint32_t data);
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