drivers made independent from microcontroller/os

1 files changed, 56 insertions, 58 deletions

diff --git a/fw/fe310/eos/dev/drv/gt911.c b/fw/fe310/eos/dev/drv/gt911.c
index 22b82c6..cd71d9a 100644
--- a/fw/fe310/eos/dev/drv/gt911.c
+++ b/fw/fe310/eos/dev/drv/gt911.c
@@ -3,15 +3,7 @@
 #include <string.h>
 #include <stdio.h>
 
-#include "encoding.h"
 #include "platform.h"
-#include "board.h"
-
-#include "eos.h"
-
-#include "soc/i2c.h"
-#include "soc/timer.h"
-
 #include "gt911.h"
 
 #define CMD_SLEEP       0x05
@@ -37,14 +29,14 @@ static int g911_command(uint8_t command) {
     int rv;
 
     if (command > 0x07) {
-        rv = eos_i2c_write16(GT911_ADDR, REG_CMD2, &command, 1);
+        rv = drv_i2c_write16(GT911_ADDR, REG_CMD2, &command, 1);
         if (rv) return rv;
     }
 
-    rv = eos_i2c_write16(GT911_ADDR, REG_CMD, &command, 1);
+    rv = drv_i2c_write16(GT911_ADDR, REG_CMD, &command, 1);
     if (rv) return rv;
 
-    return EOS_OK;
+    return DRV_OK;
 }
 
 static uint8_t gt911_chksum(uint8_t *buf,  uint8_t len) {
@@ -64,90 +56,96 @@ static uint8_t gt911_chksum(uint8_t *buf,  uint8_t len) {
 static int gt911_chip_id(char *buf) {
     int rv;
 
-    rv = eos_i2c_read16(GT911_ADDR, REG_PROD_ID, buf, 4);
+    rv = drv_i2c_read16(GT911_ADDR, REG_PROD_ID, buf, 4);
     return rv;
 }
 
 static int gt911_fw_ver(char *buf) {
     int rv;
 
-    rv = eos_i2c_read16(GT911_ADDR, REG_FW_VER, buf, 2);
+    rv = drv_i2c_read16(GT911_ADDR, REG_FW_VER, buf, 2);
     return rv;
 }
 
-void eos_gt911_reset(void) {
+void gt911_reset(void) {
     /* INT and RST output and low */
-    GPIO_REG(GPIO_OUTPUT_VAL)   &= ~((1 << CTP_PIN_INT) | (1 << CTP_PIN_RST));
-    GPIO_REG(GPIO_OUTPUT_EN)    |=  ((1 << CTP_PIN_INT) | (1 << CTP_PIN_RST));
+    drv_gpio_clear(GPIO_INPUT_EN, GT911_PIN_INT);
+    drv_gpio_clear(GPIO_OUTPUT_VAL, GT911_PIN_INT);
+    drv_gpio_clear(GPIO_OUTPUT_VAL, GT911_PIN_RST);
+    drv_gpio_set(GPIO_OUTPUT_EN, GT911_PIN_INT);
+    drv_gpio_set(GPIO_OUTPUT_EN, GT911_PIN_RST);
 
     /* T2: > 10ms */
-    eos_sleep(12);
+    drv_sleep(12);
 
     /* high: 0x28/0x29 (0x14 7bit), low: 0xBA/0xBB (0x5D 7bit) */
     if (GT911_ADDR == 0x14) {
-        GPIO_REG(GPIO_OUTPUT_VAL) |= (1 << CTP_PIN_INT);
+        drv_gpio_set(GPIO_OUTPUT_VAL, GT911_PIN_INT);
     }
 
     /* T3: > 100us */
-    eos_sleep(1);
-    GPIO_REG(GPIO_OUTPUT_EN)    &= ~(1 << CTP_PIN_RST);
+    drv_sleep(1);
+    drv_gpio_clear(GPIO_OUTPUT_EN, GT911_PIN_RST);
 
     /* T4: > 5ms */
-    eos_sleep(6);
-    GPIO_REG(GPIO_OUTPUT_VAL)   &= ~(1 << CTP_PIN_INT);
+    drv_sleep(6);
+    drv_gpio_clear(GPIO_OUTPUT_VAL, GT911_PIN_INT);
     /* end select I2C slave addr */
 
     /* T5: > 50ms */
-    eos_sleep(51);
+    drv_sleep(51);
 
     /* set INT as input */
-    GPIO_REG(GPIO_OUTPUT_EN)    &= ~(1 << CTP_PIN_INT);
+    drv_gpio_clear(GPIO_OUTPUT_EN, GT911_PIN_INT);
+    drv_gpio_set(GPIO_INPUT_EN, GT911_PIN_INT);
 }
 
-int eos_gt911_sleep(void) {
+int gt911_sleep(void) {
     int rv;
 
-    GPIO_REG(GPIO_OUTPUT_VAL)   &= ~(1 << CTP_PIN_INT);
-    GPIO_REG(GPIO_OUTPUT_EN)    |=  (1 << CTP_PIN_INT);
+    drv_gpio_clear(GPIO_INPUT_EN, GT911_PIN_INT);
+    drv_gpio_clear(GPIO_OUTPUT_VAL, GT911_PIN_INT);
+    drv_gpio_set(GPIO_OUTPUT_EN, GT911_PIN_INT);
 
     rv = g911_command(CMD_SLEEP);
     if (rv) return rv;
 
-    return EOS_OK;
+    return DRV_OK;
 }
 
-void eos_gt911_wake(void) {
-    GPIO_REG(GPIO_OUTPUT_VAL)   |=  (1 << CTP_PIN_INT);
-    GPIO_REG(GPIO_OUTPUT_EN)    |=  (1 << CTP_PIN_INT);
+void gt911_wake(void) {
+    drv_gpio_set(GPIO_OUTPUT_VAL, GT911_PIN_INT);
+    drv_gpio_set(GPIO_OUTPUT_EN, GT911_PIN_INT);
 
-    eos_sleep(5);
+    drv_sleep(5);
 
-    GPIO_REG(GPIO_OUTPUT_EN)    &= ~(1 << CTP_PIN_INT);
-    GPIO_REG(GPIO_OUTPUT_VAL)   &= ~(1 << CTP_PIN_INT);
+    drv_gpio_clear(GPIO_OUTPUT_EN, GT911_PIN_INT);
+    drv_gpio_clear(GPIO_OUTPUT_VAL, GT911_PIN_INT);
+    drv_gpio_set(GPIO_INPUT_EN, GT911_PIN_INT);
 }
 
-int eos_gt911_cfg_read(uint8_t *cfg_buf) {
+int gt911_cfg_read(uint8_t *cfg_buf) {
     int rv;
 
-    rv = eos_i2c_read16(GT911_ADDR, REG_CFG, cfg_buf, GT911_SIZE_CFG);
+    rv = drv_i2c_read16(GT911_ADDR, REG_CFG, cfg_buf, GT911_SIZE_CFG);
     return rv;
 }
 
-int eos_gt911_cfg_write(uint8_t *cfg_buf) {
+int gt911_cfg_write(uint8_t *cfg_buf) {
     int rv;
 
     cfg_buf[GT911_SIZE_CFG - 2] = gt911_chksum(cfg_buf, GT911_SIZE_CFG - 2);
     cfg_buf[GT911_SIZE_CFG - 1] = 1;
 
-    rv = eos_i2c_write16(GT911_ADDR, REG_CFG, cfg_buf, GT911_SIZE_CFG);
+    rv = drv_i2c_write16(GT911_ADDR, REG_CFG, cfg_buf, GT911_SIZE_CFG);
     return rv;
 }
 
-int eos_gt911_cfg_print(void) {
+int gt911_cfg_print(void) {
     int i, rv;
     uint8_t cfg_buf[GT911_SIZE_CFG];
 
-    rv = eos_gt911_cfg_read(cfg_buf);
+    rv = gt911_cfg_read(cfg_buf);
     if (rv) return rv;
 
     printf("GT911 CFG:\n");
@@ -165,61 +163,61 @@ int eos_gt911_cfg_print(void) {
 
     printf("GT911 FW VER:%.2X%.2X\n", cfg_buf[1], cfg_buf[0]);
 
-    return EOS_OK;
+    return DRV_OK;
 }
 
-void eos_gt911_set_reg(uint8_t *cfg_buf, uint16_t reg, uint8_t val) {
+void gt911_set_reg(uint8_t *cfg_buf, uint16_t reg, uint8_t val) {
     cfg_buf[reg - REG_CFG] = val;
 }
 
-uint8_t eos_gt911_get_reg(uint8_t *cfg_buf, uint16_t reg) {
+uint8_t gt911_get_reg(uint8_t *cfg_buf, uint16_t reg) {
     return cfg_buf[reg - REG_CFG];
 }
 
-int eos_gt911_configure(void) {
+int gt911_configure(void) {
     int rv;
     uint8_t cfg_buf[GT911_SIZE_CFG];
     uint8_t reg;
 
-    rv = eos_gt911_cfg_read(cfg_buf);
+    rv = gt911_cfg_read(cfg_buf);
     if (rv) return rv;
 
     /* XY coordinate output threshold: 1 */
-    eos_gt911_set_reg(cfg_buf, REG_X_THR, 1);
-    eos_gt911_set_reg(cfg_buf, REG_Y_THR, 1);
+    gt911_set_reg(cfg_buf, REG_X_THR, 1);
+    gt911_set_reg(cfg_buf, REG_Y_THR, 1);
 
     /* INT triggering mechanism: falling edge */
-    reg = eos_gt911_get_reg(cfg_buf, REG_MOD_SW1);
+    reg = gt911_get_reg(cfg_buf, REG_MOD_SW1);
     reg &= 0xFC;
     reg |= 1;
-    eos_gt911_set_reg(cfg_buf, REG_MOD_SW1, reg);
+    gt911_set_reg(cfg_buf, REG_MOD_SW1, reg);
 
     /* Coordinates report rate: 5 ms */
-    reg = eos_gt911_get_reg(cfg_buf, REG_REF_RATE);
+    reg = gt911_get_reg(cfg_buf, REG_REF_RATE);
     reg &= 0xF0;
-    eos_gt911_set_reg(cfg_buf, REG_REF_RATE, reg);
+    gt911_set_reg(cfg_buf, REG_REF_RATE, reg);
 
-    rv = eos_gt911_cfg_write(cfg_buf);
+    rv = gt911_cfg_write(cfg_buf);
     return rv;
 }
 
-int eos_gt911_set_status(uint8_t status) {
+int gt911_set_status(uint8_t status) {
     int rv;
 
-    rv = eos_i2c_write16(GT911_ADDR, REG_STATUS, &status, 1);
+    rv = drv_i2c_write16(GT911_ADDR, REG_STATUS, &status, 1);
     return rv;
 }
 
-int eos_gt911_get_status(uint8_t *status) {
+int gt911_get_status(uint8_t *status) {
     int rv;
 
-    rv = eos_i2c_read16(GT911_ADDR, REG_STATUS, status, 1);
+    rv = drv_i2c_read16(GT911_ADDR, REG_STATUS, status, 1);
     return rv;
 }
 
-int eos_gt911_get_points(int num_points, uint8_t *points) {
+int gt911_get_points(int num_points, uint8_t *points) {
     int rv;
 
-    rv = eos_i2c_read16(GT911_ADDR, REG_POINTS, points, GT911_SIZE_PBUF * num_points);
+    rv = drv_i2c_read16(GT911_ADDR, REG_POINTS, points, GT911_SIZE_PBUF * num_points);
     return rv;
 }