fixed gt911 driver

1 files changed, 59 insertions, 11 deletions

diff --git a/fw/fe310/eos/dev/gt911.c b/fw/fe310/eos/dev/gt911.c
index d047ef2..7487f85 100644
--- a/fw/fe310/eos/dev/gt911.c
+++ b/fw/fe310/eos/dev/gt911.c
@@ -4,6 +4,7 @@
 #include <stdio.h>
 
 #include "platform.h"
+#include "encoding.h"
 #include "board.h"
 
 #include "eos.h"
@@ -11,6 +12,7 @@
 
 #include "soc/interrupt.h"
 #include "soc/timer.h"
+#include "soc/pwr.h"
 #include "soc/i2c.h"
 #include "soc/i2s.h"
 
@@ -32,10 +34,13 @@
 #define REG_CFG         0x8047
 #define REG_CHKSUM      0x80FF
 
+#define REG_MOD_SW1     0x804D
+#define REG_REF_RATE    0x8056
 #define REG_X_THR       0x8057
 #define REG_Y_THR       0x8058
 
-#define REG_PRODID      0x8140
+#define REG_PROD_ID     0x8140
+#define REG_FW_VER      0x8144
 
 #define SIZE_POINT_BUF  8
 #define MAX_POINTS      5
@@ -99,11 +104,11 @@ handle_evt_fin0:
     rv = eos_i2c_write16(GT911_ADDR, REG_STATUS, &status, 1);
 
 handle_evt_fin1:
-    GPIO_REG(GPIO_RISE_IE) |= (1 << CTP_PIN_INT);
+    GPIO_REG(GPIO_FALL_IE) |= (1 << CTP_PIN_INT);
 }
 
 static void handle_intr(void) {
-    GPIO_REG(GPIO_RISE_IE) &= ~(1 << CTP_PIN_INT);
+    GPIO_REG(GPIO_FALL_IE) &= ~(1 << CTP_PIN_INT);
     GPIO_REG(GPIO_RISE_IP) = (1 << CTP_PIN_INT);
     eos_evtq_push_isr(EOS_EVT_CTP | CTP_ETYPE_INTR, NULL, 0);
 }
@@ -139,25 +144,44 @@ static uint8_t gt911_chksum(uint8_t *buf,  uint8_t len) {
 static int gt911_chip_id(char *buf) {
     int rv;
 
-    rv = eos_i2c_read16(GT911_ADDR, REG_PRODID, buf, 4);
+    rv = eos_i2c_read16(GT911_ADDR, REG_PROD_ID, buf, 4);
     return rv;
 }
 
-void eos_gt911_init(void) {
+static int gt911_fw_ver(char *buf) {
+    int rv;
+
+    rv = eos_i2c_read16(GT911_ADDR, REG_FW_VER, buf, 2);
+    return rv;
+}
+
+int eos_gt911_init(uint8_t wakeup_cause) {
+    int rst = (wakeup_cause == EOS_PWR_WAKE_RST);
+
     eos_intr_set_handler(INT_GPIO_BASE + CTP_PIN_INT, handle_intr);
     eos_intr_set_priority(INT_GPIO_BASE + CTP_PIN_INT, IRQ_PRIORITY_CTP);
     eos_evtq_set_handler(EOS_EVT_CTP, handle_evt);
+
+    if (rst) {
+        eos_gt911_reset();
+    } else {
+        /* There is a problem with GT911 and sleep */
+        // eos_gt911_wake();
+        eos_gt911_reset();
+    }
+
+    return EOS_OK;
 }
 
 void eos_gt911_intr_enable(void) {
     GPIO_REG(GPIO_INPUT_EN)     |=  (1 << CTP_PIN_INT);
-    GPIO_REG(GPIO_RISE_IE)      |=  (1 << CTP_PIN_INT);
+    GPIO_REG(GPIO_FALL_IE)      |=  (1 << CTP_PIN_INT);
     eos_intr_enable(INT_GPIO_BASE + CTP_PIN_INT);
 }
 
 void eos_gt911_intr_disable(void) {
     eos_intr_disable(INT_GPIO_BASE + CTP_PIN_INT);
-    GPIO_REG(GPIO_RISE_IE)      &= ~(1 << CTP_PIN_INT);
+    GPIO_REG(GPIO_FALL_IE)      &= ~(1 << CTP_PIN_INT);
     GPIO_REG(GPIO_INPUT_EN)     &= ~(1 << CTP_PIN_INT);
 }
 
@@ -165,7 +189,9 @@ int eos_gt911_intr_enabled(void) {
     return !!(GPIO_REG(GPIO_INPUT_EN) & (1 << CTP_PIN_INT));
 }
 
-void eos_gt911_reset(void) {
+int eos_gt911_reset(void) {
+    if (eos_i2s_running()) return EOS_ERR_BUSY;
+
     eos_gt911_intr_disable();
 
     /* INT and RST output and low */
@@ -195,25 +221,33 @@ void eos_gt911_reset(void) {
     /* set INT as input */
     GPIO_REG(GPIO_OUTPUT_EN)    &= ~(1 << CTP_PIN_INT);
     eos_gt911_intr_enable();
+
+    return EOS_OK;
 }
 
 void eos_gt911_sleep(void) {
     eos_gt911_intr_disable();
 
+    clear_csr(mstatus, MSTATUS_MIE);
     GPIO_REG(GPIO_OUTPUT_VAL)   &= ~(1 << CTP_PIN_INT);
     GPIO_REG(GPIO_OUTPUT_EN)    |=  (1 << CTP_PIN_INT);
+    set_csr(mstatus, MSTATUS_MIE);
 
     g911_command(CMD_SLEEP);
 }
 
 void eos_gt911_wake(void) {
-    /* in case of wake from mcu sleep */
-    GPIO_REG(GPIO_OUTPUT_EN)    |=  (1 << CTP_PIN_INT);
+    clear_csr(mstatus, MSTATUS_MIE);
     GPIO_REG(GPIO_OUTPUT_VAL)   |=  (1 << CTP_PIN_INT);
+    GPIO_REG(GPIO_OUTPUT_EN)    |=  (1 << CTP_PIN_INT);
+    set_csr(mstatus, MSTATUS_MIE);
 
     eos_time_sleep(5);
+
+    clear_csr(mstatus, MSTATUS_MIE);
     GPIO_REG(GPIO_OUTPUT_EN)    &= ~(1 << CTP_PIN_INT);
     GPIO_REG(GPIO_OUTPUT_VAL)   &= ~(1 << CTP_PIN_INT);
+    set_csr(mstatus, MSTATUS_MIE);
 
     eos_gt911_intr_enable();
 }
@@ -252,6 +286,10 @@ int eos_gt911_cfg_print(void) {
         }
     }
 
+    gt911_fw_ver(cfg_buf);
+
+    printf("GT911 FW VER:%.2X%.2X\n", cfg_buf[1], cfg_buf[0]);
+
     return EOS_OK;
 }
 
@@ -263,9 +301,10 @@ uint8_t eos_gt911_get_reg(uint8_t *cfg_buf, uint16_t reg) {
     return cfg_buf[reg - REG_CFG];
 }
 
-int eos_gt911_set_threshold(void) {
+int eos_gt911_configure(void) {
     int rv;
     uint8_t cfg_buf[GT911_SIZE_CFG];
+    uint8_t reg;
 
     rv = eos_gt911_cfg_read(cfg_buf);
     if (rv) return rv;
@@ -273,6 +312,15 @@ int eos_gt911_set_threshold(void) {
     eos_gt911_set_reg(cfg_buf, REG_X_THR, 1);
     eos_gt911_set_reg(cfg_buf, REG_Y_THR, 1);
 
+    reg = eos_gt911_get_reg(cfg_buf, REG_MOD_SW1);
+    reg &= 0xFC;
+    reg |= 1;
+    eos_gt911_set_reg(cfg_buf, REG_MOD_SW1, reg);
+
+    reg = eos_gt911_get_reg(cfg_buf, REG_REF_RATE);
+    reg &= 0xF0;
+    eos_gt911_set_reg(cfg_buf, REG_REF_RATE, reg);
+
     rv = eos_gt911_cfg_write(cfg_buf);
     return rv;
 }