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authorUros Majstorovic <majstor@majstor.org>2022-05-13 12:45:53 +0200
committerUros Majstorovic <majstor@majstor.org>2022-05-13 12:45:53 +0200
commit412a8f99928beff605805807b0f07f6bf8d0a965 (patch)
tree366f1768ddfd32960c5d26ca3fba14e82c3b571e /fw/fe310/eos/soc/spi_cfg.h
parent9ccb4db8d59ec9dab33ee8617d462f21a8bb4fa8 (diff)
code rename
Diffstat (limited to 'fw/fe310/eos/soc/spi_cfg.h')
-rw-r--r--fw/fe310/eos/soc/spi_cfg.h37
1 files changed, 37 insertions, 0 deletions
diff --git a/fw/fe310/eos/soc/spi_cfg.h b/fw/fe310/eos/soc/spi_cfg.h
new file mode 100644
index 0000000..84ab8bb
--- /dev/null
+++ b/fw/fe310/eos/soc/spi_cfg.h
@@ -0,0 +1,37 @@
+#include <stdint.h>
+
+#define EOS_SPI_MAX_DEV 4
+
+typedef struct {
+ uint16_t div;
+ uint8_t csid;
+ uint8_t cspin;
+ unsigned char evt;
+} SPIConfig;
+
+static const SPIConfig spi_cfg[EOS_SPI_MAX_DEV] = {
+ { // DEV_NET
+ .div = SPI_DIV_NET,
+ .csid = SPI_CSID_NET,
+ .cspin = SPI_CSPIN_NET,
+ .evt = 0, // Not SPI event
+ },
+ { // DEV_EVE
+ .div = SPI_DIV_EVE,
+ .csid = SPI_CSID_EVE,
+ .cspin = SPI_CSPIN_EVE,
+ .evt = 0,
+ },
+ { // DEV_SDC
+ .div = SPI_DIV_SDC,
+ .csid = SPI_CSID_SDC,
+ .cspin = SPI_CSPIN_SDC,
+ .evt = EOS_SPI_EVT_SDC,
+ },
+ { // DEV_CAM
+ .div = SPI_DIV_CAM,
+ .csid = SPI_CSID_CAM,
+ .cspin = SPI_CSPIN_CAM,
+ .evt = EOS_SPI_EVT_CAM,
+ },
+};