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authorUros Majstorovic <majstor@majstor.org>2023-04-21 21:13:50 +0200
committerUros Majstorovic <majstor@majstor.org>2023-04-21 21:13:50 +0200
commita0059ab4365f41c84bb8bdf914477f5d4feeb985 (patch)
tree73baeb6706e44c8ccfe675fbf0001aa773af0a77 /fw/fe310/eos/soc/trap_entry.S
parent8c6001b298271bb52fa7142235ce7faa24b3e90e (diff)
improved i2s driver
Diffstat (limited to 'fw/fe310/eos/soc/trap_entry.S')
-rw-r--r--fw/fe310/eos/soc/trap_entry.S25
1 files changed, 17 insertions, 8 deletions
diff --git a/fw/fe310/eos/soc/trap_entry.S b/fw/fe310/eos/soc/trap_entry.S
index 7417254..1d3d1c2 100644
--- a/fw/fe310/eos/soc/trap_entry.S
+++ b/fw/fe310/eos/soc/trap_entry.S
@@ -99,12 +99,11 @@ i2s_handle_sd:
# store channel bit to x25
li x18, I2S_CTRL_ADDR_WS
lw x18, PWM_CFG(x18)
+ # 29th - pwmcmp1ip bit
li x19, (1 << 29)
and x25, x18, x19
srli x25, x25, 29
- bnez x25, i2s_sd_complete
-
la x27, _eos_i2s_drvr
lw x26, I2S_FMT(x27)
@@ -123,10 +122,12 @@ i2s_abuf_pop:
lw x21, I2S_ABUF_OFF_ARRAY(x9)
add x21, x21, x20
beqz x26, 0f
+ mv x22, x18
lbu x8, 0(x21)
addi x18, x18, 1
j 1f
0:
+ srli x22, x18, 1
lb x8, 0(x21)
lbu x20, 1(x21)
slli x8, x8, 8
@@ -135,6 +136,13 @@ i2s_abuf_pop:
1:
sh x18, I2S_ABUF_OFF_IDXR(x9)
+ # check for correct channel if mode is stereo
+ lw x21, I2S_MODE(x27)
+ bnez x21, 2f
+ andi x22, x22, 1
+ xor x22, x22, x25
+ beqz x22, i2s_abuf_pop
+
2:
li x21, 0xffff
sub x18, x19, x18
@@ -194,13 +202,11 @@ i2s_decode:
3:
i2s_sd_xchg:
- # li x18, 0xa5a5
- # mv x8, x18
# read/write shift reg: x8 -> sr -> x8
li x18, GPIO_CTRL_ADDR
- li x19, (0x1 << I2S_PIN_SD_IN)
- li x20, (0x1 << I2S_PIN_SD_OUT)
- li x21, (0x1 << I2S_PIN_SR_CK)
+ li x19, (1 << I2S_PIN_SD_IN)
+ li x20, (1 << I2S_PIN_SD_OUT)
+ li x21, (1 << I2S_PIN_SR_CK)
lw x22, GPIO_OUTPUT_VAL(x18)
lw x9, GPIO_OUTPUT_EN(x18)
@@ -272,6 +278,9 @@ i2s_sd_xchg:
slli x8, x8, 16
srai x8, x8, 16
+ # skip right channel
+ bnez x25, i2s_sd_complete
+
i2s_encode:
beqz x26, i2s_abuf_push
# aLaw encode -> x8
@@ -352,7 +361,7 @@ i2s_abuf_push:
i2s_sd_complete:
li x18, GPIO_CTRL_ADDR
- li x19, (0x1 << I2S_PIN_INT)
+ li x19, (1 << I2S_PIN_INT)
sw x19, GPIO_FALL_IP(x18)
li x18, I2S_IRQ_SD_ID