fixed gpio out val change when i2s is running

2 files changed, 7 insertions, 13 deletions

diff --git a/fw/fe310/eos/soc/spi.c b/fw/fe310/eos/soc/spi.c
index 351c9c8..1806f50 100644
--- a/fw/fe310/eos/soc/spi.c
+++ b/fw/fe310/eos/soc/spi.c
@@ -188,7 +188,9 @@ void eos_spi_handle_xchg(void) {
 void eos_spi_cs_set(void) {
 	/* cs low */
     if (SPI1_REG(SPI_REG_CSMODE) == SPI_CSMODE_OFF) {
+        clear_csr(mstatus, MSTATUS_MIE);
         GPIO_REG(GPIO_OUTPUT_VAL) &= ~(1 << spi_cspin);
+        set_csr(mstatus, MSTATUS_MIE);
     } else {
         SPI1_REG(SPI_REG_CSMODE) = SPI_CSMODE_HOLD;
     }
@@ -197,7 +199,9 @@ void eos_spi_cs_set(void) {
 void eos_spi_cs_clear(void) {
 	/* cs high */
     if (SPI1_REG(SPI_REG_CSMODE) == SPI_CSMODE_OFF) {
+        clear_csr(mstatus, MSTATUS_MIE);
         GPIO_REG(GPIO_OUTPUT_VAL) |= (1 << spi_cspin);
+        set_csr(mstatus, MSTATUS_MIE);
     } else {
         SPI1_REG(SPI_REG_CSMODE) = SPI_CSMODE_AUTO;
     }
@@ -363,14 +367,4 @@ void eos_spi_flush(void) {
         while (!(SPI1_REG(SPI_REG_IP) & SPI_IP_TXWM));
         while (!(SPI1_REG(SPI_REG_RXFIFO) & SPI_RXFIFO_EMPTY));
     }
-
-    /*
-    volatile uint32_t x = 0;
-
-    while (!x) {
-        if (SPI1_REG(SPI_REG_IP) & SPI_IP_TXWM) {
-            x = SPI1_REG(SPI_REG_RXFIFO) & SPI_RXFIFO_EMPTY;
-        }
-    }
-    */
 }
diff --git a/fw/fe310/eos/soc/spi9bit.c b/fw/fe310/eos/soc/spi9bit.c
index 712dc81..e48e9e2 100644
--- a/fw/fe310/eos/soc/spi9bit.c
+++ b/fw/fe310/eos/soc/spi9bit.c
@@ -11,10 +11,10 @@
 #include "spi9bit.h"
 
 #define BIT_GET         ((GPIO_REG(GPIO_INPUT_VAL) & (1 << IOF_SPI1_MISO)) >> IOF_SPI1_MISO)
-#define BIT_PUT(b)      { if (b) GPIO_REG(GPIO_OUTPUT_VAL) |= (1 << IOF_SPI1_MOSI); else GPIO_REG(GPIO_OUTPUT_VAL) &= ~(1 << IOF_SPI1_MOSI); }
+#define BIT_PUT(b)      { clear_csr(mstatus, MSTATUS_MIE); if (b) GPIO_REG(GPIO_OUTPUT_VAL) |= (1 << IOF_SPI1_MOSI); else GPIO_REG(GPIO_OUTPUT_VAL) &= ~(1 << IOF_SPI1_MOSI); set_csr(mstatus, MSTATUS_MIE); }
 
-#define SCK_UP          { GPIO_REG(GPIO_OUTPUT_VAL) |= (1 << IOF_SPI1_SCK); }
-#define SCK_DN          { GPIO_REG(GPIO_OUTPUT_VAL) &= ~(1 << IOF_SPI1_SCK); }
+#define SCK_UP          { clear_csr(mstatus, MSTATUS_MIE); GPIO_REG(GPIO_OUTPUT_VAL) |=  (1 << IOF_SPI1_SCK); set_csr(mstatus, MSTATUS_MIE); }
+#define SCK_DN          { clear_csr(mstatus, MSTATUS_MIE); GPIO_REG(GPIO_OUTPUT_VAL) &= ~(1 << IOF_SPI1_SCK); set_csr(mstatus, MSTATUS_MIE); }
 
 static inline void _sleep(int n) {
     volatile int x = n;