i2s driver fixed; added uart programming;

16 files changed, 257 insertions, 81 deletions

diff --git a/fw/fe310/eos/dev/Makefile b/fw/fe310/eos/dev/Makefile
index a5d3f77..611b24f 100644
--- a/fw/fe310/eos/dev/Makefile
+++ b/fw/fe310/eos/dev/Makefile
@@ -1,7 +1,7 @@
 include ../../common.mk
 CFLAGS += -I$(bsp_dir)/include -I$(ext_dir)/crypto
 
-obj = spi.o net.o bq25895.o sdcard.o sdc_crypto.o lcd.o gt911.o ili9806e.o eve.o ov2640.o cam.o
+obj = flash.o spi.o net.o bq25895.o sdcard.o sdc_crypto.o lcd.o gt911.o ili9806e.o eve.o ov2640.o cam.o
 lib = ../../libeos-dev.a
 
 
diff --git a/fw/fe310/eos/dev/flash.c b/fw/fe310/eos/dev/flash.c
new file mode 100644
index 0000000..4f017b3
--- /dev/null
+++ b/fw/fe310/eos/dev/flash.c
@@ -0,0 +1,162 @@
+#include <stdio.h>
+#include <stdlib.h>
+
+#include "encoding.h"
+#include "platform.h"
+
+#include "eos.h"
+#include "soc/timer.h"
+
+#include "flash.h"
+
+#define IDLE_TICKS  10
+
+__attribute__ ((section (".itim.flash")))
+static void send(uint8_t data) {
+    while (SPI0_REG(SPI_REG_TXFIFO) & SPI_TXFIFO_FULL);
+    SPI0_REG(SPI_REG_TXFIFO) = data;
+}
+
+__attribute__ ((section (".itim.flash")))
+static uint8_t xfer(uint8_t data) {
+    volatile uint32_t x = 0;
+
+    send(data);
+    while ((x = SPI0_REG(SPI_REG_RXFIFO)) & SPI_RXFIFO_EMPTY);
+    return x;
+}
+
+void eos_flash_init(void) {
+    SPI0_REG(SPI_REG_FMT) |= SPI_FMT_DIR(SPI_DIR_TX);
+    SPI0_REG(SPI_REG_TXCTRL) = SPI_TXWM(1);
+    eos_flash_norm();
+}
+
+__attribute__ ((section (".itim.flash")))
+void eos_flash_norm(void) {
+    volatile uint64_t *mtime = (uint64_t *) (CLINT_CTRL_ADDR + CLINT_MTIME);
+    uint32_t mtime0;
+
+    clear_csr(mstatus, MSTATUS_MIE);
+    SPI0_REG(SPI_REG_FCTRL) = 0;
+
+    SPI0_REG(SPI_REG_SCKDIV) = 3;
+    if (SPI0_REG(SPI_REG_FMT) & SPI_FMT_PROTO(SPI_PROTO_Q)) {
+        send(EOS_FLASH_QPIDI);
+        while (!(SPI0_REG(SPI_REG_IP) & SPI_IP_TXWM));
+    }
+
+    SPI0_REG(SPI_REG_FMT) = \
+        SPI_FMT_PROTO(SPI_PROTO_S)      |
+        SPI_FMT_ENDIAN(SPI_ENDIAN_MSB)  |
+        SPI_FMT_DIR(SPI_DIR_TX)         |
+        SPI_FMT_LEN(8);
+
+    SPI0_REG(SPI_REG_FFMT) =
+        SPI_INSN_CMD_EN         |
+        SPI_INSN_ADDR_LEN(3)    |
+	    SPI_INSN_PAD_CNT(0)     |
+	    SPI_INSN_CMD_PROTO(SPI_PROTO_S)     |
+	    SPI_INSN_ADDR_PROTO(SPI_PROTO_S)    |
+	    SPI_INSN_DATA_PROTO(SPI_PROTO_S)    |
+	    SPI_INSN_CMD_CODE(EOS_FLASH_NORD)   |
+	    SPI_INSN_PAD_CODE(0x00);
+
+    mtime0 = *mtime;
+    while ((*mtime - mtime0) < IDLE_TICKS);
+
+    SPI0_REG(SPI_REG_FCTRL) = SPI_FCTRL_EN;
+    set_csr(mstatus, MSTATUS_MIE);
+}
+
+__attribute__ ((section (".itim.flash")))
+void eos_flash_fast(void) {
+    volatile uint64_t *mtime = (uint64_t *) (CLINT_CTRL_ADDR + CLINT_MTIME);
+    uint32_t mtime0;
+
+    clear_csr(mstatus, MSTATUS_MIE);
+    SPI0_REG(SPI_REG_FCTRL) = 0;
+
+    SPI0_REG(SPI_REG_SCKDIV) = 2;
+    if (!(SPI0_REG(SPI_REG_FMT) & SPI_FMT_PROTO(SPI_PROTO_Q))) {
+        send(EOS_FLASH_QPIEN);
+        while (!(SPI0_REG(SPI_REG_IP) & SPI_IP_TXWM));
+    }
+
+    SPI0_REG(SPI_REG_FMT) = \
+        SPI_FMT_PROTO(SPI_PROTO_Q)      |
+        SPI_FMT_ENDIAN(SPI_ENDIAN_MSB)  |
+        SPI_FMT_DIR(SPI_DIR_TX)         |
+        SPI_FMT_LEN(8);
+
+    SPI0_REG(SPI_REG_FFMT) =
+        SPI_INSN_CMD_EN         |
+        SPI_INSN_ADDR_LEN(3)    |
+	    SPI_INSN_PAD_CNT(6)     |
+	    SPI_INSN_CMD_PROTO(SPI_PROTO_Q)     |
+	    SPI_INSN_ADDR_PROTO(SPI_PROTO_Q)    |
+	    SPI_INSN_DATA_PROTO(SPI_PROTO_Q)    |
+	    SPI_INSN_CMD_CODE(EOS_FLASH_FRD)    |
+	    SPI_INSN_PAD_CODE(0x00);
+
+    mtime0 = *mtime;
+    while ((*mtime - mtime0) < IDLE_TICKS);
+
+    SPI0_REG(SPI_REG_FCTRL) = SPI_FCTRL_EN;
+    set_csr(mstatus, MSTATUS_MIE);
+}
+
+__attribute__ ((section (".itim.flash")))
+void eos_flash_wip(void) {
+    uint8_t status;
+
+    do {
+        SPI0_REG(SPI_REG_CSMODE) = SPI_CSMODE_HOLD;
+        xfer(EOS_FLASH_RDSR);
+        status = xfer(0);
+        SPI0_REG(SPI_REG_CSMODE) = SPI_CSMODE_AUTO;
+    } while (status & EOS_FLASH_WIP);
+}
+
+__attribute__ ((section (".itim.flash")))
+void eos_flash_wren(void) {
+    uint8_t status;
+
+    xfer(EOS_FLASH_WREN);
+#if 0
+    do {
+        SPI0_REG(SPI_REG_CSMODE) = SPI_CSMODE_HOLD;
+        xfer(EOS_FLASH_RDSR);
+        status = xfer(0);
+        SPI0_REG(SPI_REG_CSMODE) = SPI_CSMODE_AUTO;
+    } while (!(status & EOS_FLASH_WEL));
+#endif
+}
+
+__attribute__ ((section (".itim.flash")))
+void eos_flash_ser(uint32_t addr) {
+    SPI0_REG(SPI_REG_CSMODE) = SPI_CSMODE_HOLD;
+    xfer(EOS_FLASH_SER);
+    xfer(addr >> 16);
+    xfer(addr >> 8);
+    xfer(addr);
+    SPI0_REG(SPI_REG_CSMODE) = SPI_CSMODE_AUTO;
+}
+
+__attribute__ ((section (".itim.flash")))
+void eos_flash_pp(uint32_t addr, uint8_t *buf) {
+    int i;
+
+    SPI0_REG(SPI_REG_FMT) |= SPI_FMT_DIR(SPI_DIR_TX);
+    SPI0_REG(SPI_REG_CSMODE) = SPI_CSMODE_HOLD;
+    send(EOS_FLASH_PP);
+    send(addr >> 16);
+    send(addr >> 8);
+    send(addr);
+    for (i=0; i<256; i++) {
+        send(buf[i]);
+    }
+    while (!(SPI0_REG(SPI_REG_IP) & SPI_IP_TXWM));
+    SPI0_REG(SPI_REG_CSMODE) = SPI_CSMODE_AUTO;
+    SPI0_REG(SPI_REG_FMT) &= ~SPI_FMT_DIR(SPI_DIR_TX);
+}
diff --git a/fw/fe310/eos/dev/flash.h b/fw/fe310/eos/dev/flash.h
new file mode 100644
index 0000000..6f792cb
--- /dev/null
+++ b/fw/fe310/eos/dev/flash.h
@@ -0,0 +1,25 @@
+#include <stdint.h>
+
+#define EOS_FLASH_RDSR      0x05
+
+#define EOS_FLASH_NORD      0x03
+#define EOS_FLASH_FRD       0x0b
+
+#define EOS_FLASH_WREN      0x06
+#define EOS_FLASH_SER       0x20
+#define EOS_FLASH_PP        0x02
+
+#define EOS_FLASH_QPIEN     0x35
+#define EOS_FLASH_QPIDI     0xF5
+
+#define EOS_FLASH_WIP       0x01
+#define EOS_FLASH_WEL       0x02
+
+void eos_flash_init(void);
+void eos_flash_norm(void);
+void eos_flash_fast(void);
+
+void eos_flash_wip(void);
+void eos_flash_wren(void);
+void eos_flash_ser(uint32_t addr);
+void eos_flash_pp(uint32_t addr, uint8_t *buf);
\ No newline at end of file
diff --git a/fw/fe310/eos/dev/gt911.c b/fw/fe310/eos/dev/gt911.c
index 6fc2e1f..d047ef2 100644
--- a/fw/fe310/eos/dev/gt911.c
+++ b/fw/fe310/eos/dev/gt911.c
@@ -130,7 +130,7 @@ static uint8_t gt911_chksum(uint8_t *buf,  uint8_t len) {
         csum += buf[i];
     }
 
-    //csum %= 256;
+    // csum %= 256;
     csum = (~csum) + 1;
 
     return csum;
diff --git a/fw/fe310/eos/dev/net.c b/fw/fe310/eos/dev/net.c
index 3811368..11250bc 100644
--- a/fw/fe310/eos/dev/net.c
+++ b/fw/fe310/eos/dev/net.c
@@ -91,7 +91,6 @@ static void net_xchg_wake(void) {
     SPI1_REG(SPI_REG_CSMODE) = SPI_CSMODE_AUTO;
 }
 
-__attribute__ ((section (".itim")))
 static void net_xchg_reset(void) {
     volatile uint32_t x = 0;
     net_state_flags &= ~NET_STATE_FLAG_CTS;
@@ -104,7 +103,6 @@ static void net_xchg_reset(void) {
     SPI1_REG(SPI_REG_CSMODE) = SPI_CSMODE_AUTO;
 }
 
-__attribute__ ((section (".itim")))
 static void net_xchg_start(unsigned char type, unsigned char *buffer, uint16_t len) {
     net_state_flags &= ~NET_STATE_FLAG_CTS;
     net_state_flags |= (NET_STATE_FLAG_INIT | NET_STATE_FLAG_XCHG);
@@ -125,7 +123,6 @@ static void net_xchg_start(unsigned char type, unsigned char *buffer, uint16_t l
     SPI1_REG(SPI_REG_IE) = SPI_IP_RXWM;
 }
 
-__attribute__ ((section (".itim")))
 static int net_xchg_next(unsigned char *_buffer) {
     unsigned char type;
     unsigned char *buffer = NULL;
@@ -148,7 +145,6 @@ static int net_xchg_next(unsigned char *_buffer) {
     return ret;
 }
 
-__attribute__ ((section (".itim")))
 static void net_handle_xchg(void) {
     if (net_state_flags & NET_STATE_FLAG_INIT) {
         volatile uint32_t r1, r2, r3;
@@ -207,7 +203,6 @@ static void net_handle_xchg(void) {
     }
 }
 
-// __attribute__ ((section (".itim")))
 static void net_handle_cts(void) {
     GPIO_REG(GPIO_RISE_IP) = (1 << NET_PIN_CTS);
     net_state_flags |= NET_STATE_FLAG_CTS;
@@ -217,7 +212,6 @@ static void net_handle_cts(void) {
     }
 }
 
-__attribute__ ((section (".itim")))
 static void net_handle_rts(void) {
     uint32_t rts_offset = (1 << NET_PIN_RTS);
 
@@ -233,7 +227,6 @@ static void net_handle_rts(void) {
     }
 }
 
-__attribute__ ((section (".itim")))
 static void net_handle_evt(unsigned char type, unsigned char *buffer, uint16_t len) {
     unsigned char idx = (type & ~EOS_EVT_MASK) - 1;
 
@@ -244,7 +237,6 @@ static void net_handle_evt(unsigned char type, unsigned char *buffer, uint16_t l
     }
 }
 
-__attribute__ ((section (".itim")))
 static int net_acquire(unsigned char reserved) {
     int ret = 0;
 
@@ -271,7 +263,6 @@ static int net_acquire(unsigned char reserved) {
     return ret;
 }
 
-__attribute__ ((section (".itim")))
 static void evt_handler_wrapper(unsigned char type, unsigned char *buffer, uint16_t len, unsigned char idx, uint16_t flag) {
     int ok;
 
@@ -286,7 +277,6 @@ static void evt_handler_wrapper(unsigned char type, unsigned char *buffer, uint1
     }
 }
 
-__attribute__ ((section (".itim")))
 static void evt_handler(unsigned char type, unsigned char *buffer, uint16_t len) {
     unsigned char idx = (type & EOS_EVT_MASK) >> 4;
 
@@ -413,8 +403,7 @@ void eos_net_stop(void) {
 }
 
 int eos_net_sleep(uint32_t timeout) {
-    volatile uint64_t *mtime = (uint64_t *) (CLINT_CTRL_ADDR + CLINT_MTIME);
-    uint64_t then_ms = timeout + *mtime * 1000 / EOS_TIMER_RTC_FREQ;
+    uint32_t start;
     uint8_t done = 0;
     int rv = EOS_OK;
 
@@ -424,8 +413,9 @@ int eos_net_sleep(uint32_t timeout) {
 
     if (rv) return rv;
 
+    start = eos_time_get_tick();
     do {
-        if (*mtime * 1000 / EOS_TIMER_RTC_FREQ > then_ms) return EOS_ERR_TIMEOUT;
+        if (eos_time_delta_ms(start) > timeout) return EOS_ERR_TIMEOUT;
         clear_csr(mstatus, MSTATUS_MIE);
         eos_evtq_flush_isr();
         done = (eos_msgq_len(&net_send_q) == 0);
@@ -438,7 +428,7 @@ int eos_net_sleep(uint32_t timeout) {
     } while (!done);
 
     while (!(GPIO_REG(GPIO_RISE_IP) & (1 << NET_PIN_CTS))) {
-        if (*mtime * 1000 / EOS_TIMER_RTC_FREQ > then_ms) {
+        if (eos_time_delta_ms(start) > timeout) {
             rv = EOS_ERR_TIMEOUT;
             break;
         }
@@ -476,13 +466,11 @@ void eos_net_acquire_for_evt(unsigned char type, char acq) {
     }
 }
 
-__attribute__ ((section (".itim")))
 void eos_net_acquire(void) {
     unsigned char acq = net_acquire(0);
     if (!acq) net_acquire(1);
 }
 
-__attribute__ ((section (".itim")))
 void eos_net_release(void) {
     clear_csr(mstatus, MSTATUS_MIE);
     if (!net_state_next_cnt && net_state_next_buf) {
@@ -492,7 +480,6 @@ void eos_net_release(void) {
     set_csr(mstatus, MSTATUS_MIE);
 }
 
-__attribute__ ((section (".itim")))
 unsigned char *eos_net_alloc(void) {
     unsigned char *ret = NULL;
 
@@ -510,7 +497,6 @@ unsigned char *eos_net_alloc(void) {
     return ret;
 }
 
-__attribute__ ((section (".itim")))
 void eos_net_free(unsigned char *buffer, unsigned char more) {
     uint8_t do_release = 1;
 
@@ -528,7 +514,6 @@ void eos_net_free(unsigned char *buffer, unsigned char more) {
     set_csr(mstatus, MSTATUS_MIE);
 }
 
-__attribute__ ((section (".itim")))
 static int net_xchg(unsigned char *type, unsigned char *buffer, uint16_t *len, unsigned char flags) {
     int rv = EOS_OK;
     int _sync = 0;
@@ -594,7 +579,6 @@ int eos_net_send(unsigned char type, unsigned char *buffer, uint16_t len) {
     return net_xchg(&type, buffer, &len, (EOS_NET_FLAG_ONEW | EOS_NET_FLAG_SYNC));
 }
 
-__attribute__ ((section (".itim")))
 int eos_net_send_async(unsigned char type, unsigned char *buffer, uint16_t len, unsigned char more) {
     int rv;
 
diff --git a/fw/fe310/eos/dev/sdcard.c b/fw/fe310/eos/dev/sdcard.c
index 656d27a..a2ee598 100644
--- a/fw/fe310/eos/dev/sdcard.c
+++ b/fw/fe310/eos/dev/sdcard.c
@@ -170,6 +170,7 @@ static int sdc_ready(uint32_t timeout) {
     uint32_t start;
 
     if (timeout == 0) return EOS_ERR_BUSY;
+
     start = eos_time_get_tick();
     do {
         if (eos_time_delta_ms(start) > timeout) break;
@@ -185,6 +186,7 @@ static int sdc_block_read(uint8_t *buffer, uint16_t len, uint32_t timeout) {
     uint32_t start;
 
     if (timeout == 0) return EOS_ERR_BUSY;
+
     start = eos_time_get_tick();
     do {
         if (eos_time_delta_ms(start) > timeout) break;
@@ -254,8 +256,8 @@ static int sdc_init(uint32_t timeout) {
     uint8_t _type;
     uint8_t ocr[4];
     uint32_t start;
-    start = eos_time_get_tick();
 
+    start = eos_time_get_tick();
     eos_time_sleep(100);
     for (i=10; i--;) sdc_xchg8(0xff);     /* 80 dummy cycles */
 
@@ -380,8 +382,9 @@ uint8_t eos_sdc_cap(void) {
 int eos_sdc_get_sect_count(uint32_t timeout, uint32_t *sectors) {
     int rv;
     uint8_t csd[16];
-    uint32_t start = eos_time_get_tick();
+    uint32_t start;
 
+    start = eos_time_get_tick();
     sdc_select();
     rv = sdc_cmd(SEND_CSD, 0, SDC_CMD_FLAG_NOCS, timeout);
     if (rv == SDC_R1_READY) {
@@ -406,8 +409,9 @@ int eos_sdc_get_sect_count(uint32_t timeout, uint32_t *sectors) {
 int eos_sdc_get_blk_size(uint32_t timeout, uint32_t *size) {
     int rv;
     uint8_t rbl[64];    /* SD Status or CSD register */
-    uint32_t start = eos_time_get_tick();
-
+    uint32_t start;
+    
+    start = eos_time_get_tick();
     sdc_select();
     if (sdc_type & EOS_SDC_TYPE_SDC2) {
         rv = sdc_acmd(SD_STATUS, 0, SDC_CMD_FLAG_NOCS, timeout);
diff --git a/fw/fe310/eos/eos.c b/fw/fe310/eos/eos.c
index a099fc1..83ab288 100644
--- a/fw/fe310/eos/eos.c
+++ b/fw/fe310/eos/eos.c
@@ -13,6 +13,7 @@
 #include "soc/uart.h"
 #include "soc/spi.h"
 
+#include "dev/flash.h"
 #include "dev/spi.h"
 #include "dev/net.h"
 #include "dev/lcd.h"
@@ -32,11 +33,11 @@ uint8_t eos_init(void) {
     uint8_t wakeup_cause;
     int rv;
 
-    SPI0_REG(SPI_REG_SCKDIV) = 8;
-
     PRCI_use_default_clocks();
     PRCI_use_pll(PLL_REFSEL_HFXOSC, 0, 1, 31, 1, -1, -1, -1);
 
+    eos_flash_init();
+
     wakeup_cause = eos_pwr_wakeup_cause();
 
     eos_evtq_init(wakeup_cause);
diff --git a/fw/fe310/eos/eve/eve_platform.c b/fw/fe310/eos/eve/eve_platform.c
index a57281c..4c0d551 100644
--- a/fw/fe310/eos/eve/eve_platform.c
+++ b/fw/fe310/eos/eve/eve_platform.c
@@ -22,7 +22,7 @@ void eve_sleep(uint32_t ms) {
 }
 
 uint32_t eve_get_tick(void) {
-    return (uint32_t)eos_time_get_tick();
+    return eos_time_get_tick();
 }
 
 void eve_sys_timer_set(uint32_t ms) {
diff --git a/fw/fe310/eos/event.c b/fw/fe310/eos/event.c
index 9f9a119..f76384a 100644
--- a/fw/fe310/eos/event.c
+++ b/fw/fe310/eos/event.c
@@ -15,7 +15,6 @@ static EOSMsgItem event_q_array[EOS_EVT_SIZE_Q];
 
 static eos_evt_handler_t evt_handler[EOS_EVT_MAX_EVT + 1];
 
-__attribute__ ((section (".itim")))
 static void evtq_handler(unsigned char type, unsigned char *buffer, uint16_t len) {
     unsigned char idx = (type & EOS_EVT_MASK) >> 4;
 
@@ -38,7 +37,6 @@ int eos_evtq_init(uint8_t wakeup_cause) {
     return EOS_OK;
 }
 
-__attribute__ ((section (".itim")))
 int eos_evtq_push(unsigned char type, unsigned char *buffer, uint16_t len) {
     clear_csr(mstatus, MSTATUS_MIE);
     int ret = eos_msgq_push(&_eos_event_q, type, buffer, len);
@@ -46,19 +44,16 @@ int eos_evtq_push(unsigned char type, unsigned char *buffer, uint16_t len) {
     return ret;
 }
 
-__attribute__ ((section (".itim")))
 int eos_evtq_push_isr(unsigned char type, unsigned char *buffer, uint16_t len) {
     return eos_msgq_push(&_eos_event_q, type, buffer, len);
 }
 
-__attribute__ ((section (".itim")))
 void eos_evtq_pop(unsigned char *type, unsigned char **buffer, uint16_t *len) {
     clear_csr(mstatus, MSTATUS_MIE);
     eos_msgq_pop(&_eos_event_q, type, buffer, len);
     set_csr(mstatus, MSTATUS_MIE);
 }
 
-__attribute__ ((section (".itim")))
 void eos_evtq_pop_isr(unsigned char *type, unsigned char **buffer, uint16_t *len) {
     eos_msgq_pop(&_eos_event_q, type, buffer, len);
 }
@@ -125,7 +120,6 @@ void eos_evtq_flush_isr(void) {
     } while (type);
 }
 
-__attribute__ ((section (".itim")))
 void eos_evtq_loop(void) {
     int foo = 1;
 
@@ -134,7 +128,6 @@ void eos_evtq_loop(void) {
     }
 }
 
-__attribute__ ((section (".itim")))
 void eos_evtq_exec(void) {
     unsigned char type;
     unsigned char *buffer;
@@ -163,7 +156,6 @@ void eos_evtq_set_handler(unsigned char type, eos_evt_handler_t handler) {
     if (idx <= EOS_EVT_MAX_EVT) evt_handler[idx] = handler;
 }
 
-__attribute__ ((section (".itim")))
 eos_evt_handler_t eos_evtq_get_handler(unsigned char type) {
     unsigned char idx = (type & EOS_EVT_MASK) >> 4;
 
diff --git a/fw/fe310/eos/msgq.c b/fw/fe310/eos/msgq.c
index 1462ebe..a483a58 100644
--- a/fw/fe310/eos/msgq.c
+++ b/fw/fe310/eos/msgq.c
@@ -17,7 +17,6 @@ void eos_msgq_init(EOSMsgQ *msgq, EOSMsgItem *array, uint8_t size) {
     msgq->array = array;
 }
 
-__attribute__ ((section (".itim")))
 int eos_msgq_push(EOSMsgQ *msgq, unsigned char type, unsigned char *buffer, uint16_t len) {
     if ((uint8_t)(msgq->idx_w - msgq->idx_r) == msgq->size) return EOS_ERR_FULL;
 
@@ -29,7 +28,6 @@ int eos_msgq_push(EOSMsgQ *msgq, unsigned char type, unsigned char *buffer, uint
     return EOS_OK;
 }
 
-__attribute__ ((section (".itim")))
 void eos_msgq_pop(EOSMsgQ *msgq, unsigned char *type, unsigned char **buffer, uint16_t *len) {
     if (msgq->idx_r == msgq->idx_w) {
         *type = 0;
@@ -95,7 +93,6 @@ int eos_msgq_find(EOSMsgQ *msgq, unsigned char type, unsigned char *selector, ui
     return 0;
 }
 
-__attribute__ ((section (".itim")))
 uint8_t eos_msgq_len(EOSMsgQ *msgq) {
     return (uint8_t)(msgq->idx_w - msgq->idx_r);
 }
@@ -107,7 +104,6 @@ void eos_bufq_init(EOSBufQ *bufq, unsigned char **array, uint8_t size) {
     bufq->array = array;
 }
 
-__attribute__ ((section (".itim")))
 int eos_bufq_push(EOSBufQ *bufq, unsigned char *buffer) {
     if ((uint8_t)(bufq->idx_w - bufq->idx_r) == bufq->size) return EOS_ERR_FULL;
 
@@ -115,14 +111,12 @@ int eos_bufq_push(EOSBufQ *bufq, unsigned char *buffer) {
     return EOS_OK;
 }
 
-__attribute__ ((section (".itim")))
 unsigned char *eos_bufq_pop(EOSBufQ *bufq) {
     if (bufq->idx_r == bufq->idx_w) return NULL;
 
     return bufq->array[IDX_MASK(bufq->idx_r++, bufq->size)];
 }
 
-__attribute__ ((section (".itim")))
 uint8_t eos_bufq_len(EOSBufQ *bufq) {
     return (uint8_t)(bufq->idx_w - bufq->idx_r);
 }
diff --git a/fw/fe310/eos/net/cell.c b/fw/fe310/eos/net/cell.c
index c268b04..c1feb0a 100644
--- a/fw/fe310/eos/net/cell.c
+++ b/fw/fe310/eos/net/cell.c
@@ -50,7 +50,6 @@ eos_evt_handler_t eos_cell_get_handler(unsigned char mtype) {
     return NULL;
 }
 
-__attribute__ ((section (".itim")))
 int eos_cell_send_buffer(unsigned char *buffer, uint16_t buf_len, uint16_t offset, int sync) {
     buffer -= offset;
     return eos_net_send_async(EOS_NET_MTYPE_CELL, buffer, buf_len + offset, 1);
@@ -186,7 +185,6 @@ int eos_cell_voice_hangup(unsigned char *buffer, int sync) {
     return _eos_net_send(EOS_NET_MTYPE_CELL, buffer, 1, async, 1);
 }
 
-__attribute__ ((section (".itim")))
 unsigned char *eos_cell_voice_pcm_buffer(uint16_t *offset) {
     unsigned char *buffer;
 
diff --git a/fw/fe310/eos/soc/i2s.c b/fw/fe310/eos/soc/i2s.c
index c5b52bf..8416ec1 100644
--- a/fw/fe310/eos/soc/i2s.c
+++ b/fw/fe310/eos/soc/i2s.c
@@ -108,7 +108,6 @@ static uint16_t _abuf_len(EOSABuf *buf) {
     return buf->idx_w - buf->idx_r;
 }
 
-__attribute__ ((section (".itim")))
 static void i2s_handle_evt(unsigned char type, unsigned char *buffer, uint16_t len) {
     switch(type & ~EOS_EVT_MASK) {
         case EOS_I2S_ETYPE_MIC:
@@ -298,7 +297,6 @@ void eos_i2s_mic_set_wm(uint16_t wm) {
     set_csr(mstatus, MSTATUS_MIE);
 }
 
-__attribute__ ((section (".itim")))
 uint16_t eos_i2s_mic_len(void) {
     uint16_t ret;
 
@@ -309,7 +307,6 @@ uint16_t eos_i2s_mic_len(void) {
     return ret;
 }
 
-__attribute__ ((section (".itim")))
 uint16_t eos_i2s_mic_read(uint8_t *sample, uint16_t ssize) {
     uint16_t i;
     uint16_t _ssize = 0;
@@ -381,7 +378,6 @@ void eos_i2s_spk_set_wm(uint16_t wm) {
     set_csr(mstatus, MSTATUS_MIE);
 }
 
-__attribute__ ((section (".itim")))
 uint16_t eos_i2s_spk_len(void) {
     uint16_t ret;
 
@@ -392,7 +388,6 @@ uint16_t eos_i2s_spk_len(void) {
     return ret;
 }
 
-__attribute__ ((section (".itim")))
 uint16_t eos_i2s_spk_write(uint8_t *sample, uint16_t ssize) {
     uint16_t i;
     uint16_t _ssize = 0;
diff --git a/fw/fe310/eos/soc/pwr.c b/fw/fe310/eos/soc/pwr.c
index a2adfd4..970db8b 100644
--- a/fw/fe310/eos/soc/pwr.c
+++ b/fw/fe310/eos/soc/pwr.c
@@ -6,6 +6,7 @@
 
 #include "eos.h"
 #include "timer.h"
+#include "dev/flash.h"
 #include "dev/net.h"
 
 #include "pwr.h"
@@ -39,6 +40,8 @@ int eos_pwr_sleep(void) {
     rv = eos_net_sleep(1000);
     if (rv) return rv;
 
+    eos_flash_norm();
+
     AON_REG(AON_PMUKEY) = 0x51F15E;
     AON_REG(AON_PMUSLEEP) = 1;
 
diff --git a/fw/fe310/eos/soc/spi.c b/fw/fe310/eos/soc/spi.c
index b722c7e..351c9c8 100644
--- a/fw/fe310/eos/soc/spi.c
+++ b/fw/fe310/eos/soc/spi.c
@@ -57,10 +57,11 @@ int eos_spi_init(uint8_t wakeup_cause) {
     eos_intr_set_priority(INT_SPI1_BASE, IRQ_PRIORITY_SPI_XCHG);
 
     SPI1_REG(SPI_REG_SCKMODE) = SPI_MODE0;
-    SPI1_REG(SPI_REG_FMT) = SPI_FMT_PROTO(SPI_PROTO_S) |
-      SPI_FMT_ENDIAN(SPI_ENDIAN_MSB) |
-      SPI_FMT_DIR(SPI_DIR_RX) |
-      SPI_FMT_LEN(8);
+    SPI1_REG(SPI_REG_FMT) = \
+        SPI_FMT_PROTO(SPI_PROTO_S)      |
+        SPI_FMT_ENDIAN(SPI_ENDIAN_MSB)  |
+        SPI_FMT_DIR(SPI_DIR_RX)         |
+        SPI_FMT_LEN(8);
 
     /* for spi 9bit protocol */
     GPIO_REG(GPIO_OUTPUT_EN)    |=  (1 << IOF_SPI1_SCK);
@@ -69,8 +70,6 @@ int eos_spi_init(uint8_t wakeup_cause) {
 
     eos_spi_enable();
 
-    // There is no way here to change the CS polarity.
-    // SPI1_REG(SPI_REG_CSDEF) = 0xFFFF;
     return EOS_OK;
 }
 
@@ -117,7 +116,6 @@ void eos_spi_set_handler(unsigned char evt, eos_evt_handler_t handler) {
     if (evt && (evt <= EOS_SPI_MAX_EVT)) evt_handler[evt - 1] = handler;
 }
 
-__attribute__ ((section (".itim")))
 void _eos_spi_xchg_init(unsigned char *buffer, uint16_t len, uint8_t flags) {
     spi_state_flags &= 0xF0;
     spi_state_flags |= (SPI_FLAG_XCHG | flags);
@@ -127,7 +125,7 @@ void _eos_spi_xchg_init(unsigned char *buffer, uint16_t len, uint8_t flags) {
     spi_state_idx_rx = 0;
 }
 
-static void spi_xchg_finish(void) {
+static void spi_wait4xchg(void) {
     uint8_t done = 0;
 
     while (!done) {
@@ -140,7 +138,7 @@ static void spi_xchg_finish(void) {
 }
 
 void eos_spi_xchg(unsigned char *buffer, uint16_t len, uint8_t flags) {
-    if (spi_in_xchg) spi_xchg_finish();
+    if (spi_in_xchg) spi_wait4xchg();
 
     spi_in_xchg = 1;
     _eos_spi_xchg_init(buffer, len, flags);
@@ -150,7 +148,6 @@ void eos_spi_xchg(unsigned char *buffer, uint16_t len, uint8_t flags) {
     SPI1_REG(SPI_REG_IE) = SPI_IP_TXWM;
 }
 
-__attribute__ ((section (".itim")))
 void eos_spi_handle_xchg(void) {
     int i;
     uint16_t sz_chunk = MIN(spi_state_len - spi_state_idx_tx, SPI_SIZE_CHUNK);
@@ -162,15 +159,21 @@ void eos_spi_handle_xchg(void) {
     }
     spi_state_idx_tx += i;
 
-    for (i=0; i<spi_state_idx_tx - spi_state_idx_rx; i++) {
-        volatile uint32_t x = SPI1_REG(SPI_REG_RXFIFO);
-        if (x & SPI_RXFIFO_EMPTY) break;
-        spi_state_buf[spi_state_idx_rx+i] = x & 0xFF;
+    if (!(spi_state_flags & EOS_SPI_FLAG_TX)) {
+        for (i=0; i<spi_state_idx_tx - spi_state_idx_rx; i++) {
+            volatile uint32_t x = SPI1_REG(SPI_REG_RXFIFO);
+            if (x & SPI_RXFIFO_EMPTY) break;
+            spi_state_buf[spi_state_idx_rx+i] = x & 0xFF;
+        }
+        spi_state_idx_rx += i;
     }
-    spi_state_idx_rx += i;
 
     if (spi_state_idx_tx == spi_state_len) {
-        if ((spi_state_idx_rx == spi_state_len) || (spi_state_flags & EOS_SPI_FLAG_TX)) {
+        if ((spi_state_flags & EOS_SPI_FLAG_TX) || (spi_state_idx_rx == spi_state_len)) {
+            if ((spi_state_flags & EOS_SPI_FLAG_TX) && (SPI1_REG(SPI_REG_TXCTRL) != SPI_TXWM(1))) {
+                SPI1_REG(SPI_REG_TXCTRL) = SPI_TXWM(1);
+                return;
+            }
             spi_state_flags &= ~SPI_FLAG_XCHG;
             if (!(spi_state_flags & EOS_SPI_FLAG_MORE)) eos_spi_cs_clear();
             SPI1_REG(SPI_REG_IE) = 0x0;
@@ -182,7 +185,6 @@ void eos_spi_handle_xchg(void) {
     }
 }
 
-__attribute__ ((section (".itim")))
 void eos_spi_cs_set(void) {
 	/* cs low */
     if (SPI1_REG(SPI_REG_CSMODE) == SPI_CSMODE_OFF) {
@@ -192,7 +194,6 @@ void eos_spi_cs_set(void) {
     }
 }
 
-__attribute__ ((section (".itim")))
 void eos_spi_cs_clear(void) {
 	/* cs high */
     if (SPI1_REG(SPI_REG_CSMODE) == SPI_CSMODE_OFF) {
@@ -355,12 +356,21 @@ uint32_t eos_spi_xchg32(uint32_t data, uint8_t flags) {
 }
 
 void eos_spi_flush(void) {
-    volatile uint32_t x = 0;
+    if (spi_in_xchg) {
+        spi_wait4xchg();
+    } else {
+        SPI1_REG(SPI_REG_TXCTRL) = SPI_TXWM(1);
+        while (!(SPI1_REG(SPI_REG_IP) & SPI_IP_TXWM));
+        while (!(SPI1_REG(SPI_REG_RXFIFO) & SPI_RXFIFO_EMPTY));
+    }
 
-    if (spi_in_xchg) spi_xchg_finish();
+    /*
+    volatile uint32_t x = 0;
 
-    SPI1_REG(SPI_REG_TXCTRL) = SPI_TXWM(1);
     while (!x) {
-        if (SPI1_REG(SPI_REG_IP) & SPI_IP_TXWM) x = SPI1_REG(SPI_REG_RXFIFO) & SPI_RXFIFO_EMPTY;
+        if (SPI1_REG(SPI_REG_IP) & SPI_IP_TXWM) {
+            x = SPI1_REG(SPI_REG_RXFIFO) & SPI_RXFIFO_EMPTY;
+        }
     }
+    */
 }
diff --git a/fw/fe310/eos/soc/timer.c b/fw/fe310/eos/soc/timer.c
index 91861a3..8d74c6d 100644
--- a/fw/fe310/eos/soc/timer.c
+++ b/fw/fe310/eos/soc/timer.c
@@ -26,12 +26,13 @@ static void timer_handle_evt(unsigned char type, unsigned char *buffer, uint16_t
 }
 
 void _eos_timer_handle(void) {
-    int i;
     volatile uint64_t *mtime = (uint64_t *) (CLINT_CTRL_ADDR + CLINT_MTIME);
     uint64_t *mtimecmp = (uint64_t *) (CLINT_CTRL_ADDR + CLINT_MTIMECMP);
-    uint64_t now = *mtime;
+    uint64_t now;
     uint64_t next = 0;
+    int i;
 
+    now = *mtime;
     for (i=0; i<=EOS_TIMER_MAX_ETYPE; i++) {
         if (timer_next[i] && (timer_next[i] <= now)) {
             timer_next[i] = 0;
@@ -48,8 +49,8 @@ void _eos_timer_handle(void) {
 }
 
 int eos_timer_init(uint8_t wakeup_cause) {
-    int i;
     uint64_t *mtimecmp = (uint64_t *) (CLINT_CTRL_ADDR + CLINT_MTIMECMP);
+    int i;
 
     clear_csr(mie, MIP_MTIP);
     *mtimecmp = 0;
@@ -89,11 +90,11 @@ uint32_t eos_timer_get(unsigned char evt) {
 }
 
 void eos_timer_set(unsigned char evt, uint32_t msec) {
-    int i;
     volatile uint64_t *mtime = (uint64_t *) (CLINT_CTRL_ADDR + CLINT_MTIME);
     uint64_t *mtimecmp = (uint64_t *) (CLINT_CTRL_ADDR + CLINT_MTIMECMP);
     uint64_t tick = *mtime + msec * (uint64_t)EOS_TIMER_RTC_FREQ / 1000;
     uint64_t next = 0;
+    int i;
 
     if (*mtimecmp != 0) clear_csr(mie, MIP_MTIP);
     timer_next[evt] = tick;
@@ -105,9 +106,9 @@ void eos_timer_set(unsigned char evt, uint32_t msec) {
 }
 
 void eos_timer_clear(unsigned char evt) {
-    int i;
     uint64_t *mtimecmp = (uint64_t *) (CLINT_CTRL_ADDR + CLINT_MTIMECMP);
     uint64_t next = 0;
+    int i;
 
     if (*mtimecmp != 0) clear_csr(mie, MIP_MTIP);
     if (timer_next[evt]) {
@@ -122,16 +123,22 @@ void eos_timer_clear(unsigned char evt) {
 
 void eos_time_sleep(uint32_t msec) {
     volatile uint64_t *mtime = (uint64_t *) (CLINT_CTRL_ADDR + CLINT_MTIME);
-    uint64_t mtime0 = *mtime;
+    uint32_t mtime0 = *mtime;
 
     while ((*mtime - mtime0) < (msec * EOS_TIMER_RTC_FREQ / 1000 + 1));
 }
 
-uint64_t eos_time_get_tick(void) {
+uint32_t eos_time_get_tick(void) {
     volatile uint64_t *mtime = (uint64_t *) (CLINT_CTRL_ADDR + CLINT_MTIME);
     return *mtime;
 }
 
+uint64_t eos_time_get_tick64(void) {
+    volatile uint64_t *mtime = (uint64_t *) (CLINT_CTRL_ADDR + CLINT_MTIME);
+    return *mtime;
+}
+
+
 uint32_t eos_time_delta_ms(uint32_t tick) {
-    return ((uint32_t)eos_time_get_tick() - tick) * 1000 / EOS_TIMER_RTC_FREQ;
+    return (eos_time_get_tick() - tick) * 1000 / EOS_TIMER_RTC_FREQ;
 }
diff --git a/fw/fe310/eos/soc/timer.h b/fw/fe310/eos/soc/timer.h
index 6e77502..227aeee 100644
--- a/fw/fe310/eos/soc/timer.h
+++ b/fw/fe310/eos/soc/timer.h
@@ -20,5 +20,6 @@ void eos_timer_set(unsigned char evt, uint32_t msec);
 void eos_timer_clear(unsigned char evt);
 
 void eos_time_sleep(uint32_t msec);
-uint64_t eos_time_get_tick(void);
+uint32_t eos_time_get_tick(void);
+uint64_t eos_time_get_tick64(void);
 uint32_t eos_time_delta_ms(uint32_t tick);