diff options
| author | Uros Majstorovic <majstor@majstor.org> | 2022-09-04 18:39:21 +0200 |
|---|---|---|
| committer | Uros Majstorovic <majstor@majstor.org> | 2022-09-04 18:39:21 +0200 |
| commit | d894eb01e9c979d0eb51f9495a7cf7281c213302 (patch) | |
| tree | 9849af7b4c62cc22e61ff7e51c0169674d073986 /fw/fe310/eos | |
| parent | fc98d3809e0db36d634f290417b9152f87f83e3e (diff) | |
removed old test
Diffstat (limited to 'fw/fe310/eos')
| -rw-r--r-- | fw/fe310/eos/board.h | 33 |
1 files changed, 8 insertions, 25 deletions
diff --git a/fw/fe310/eos/board.h b/fw/fe310/eos/board.h index 3891c61..ad79a17 100644 --- a/fw/fe310/eos/board.h +++ b/fw/fe310/eos/board.h @@ -13,42 +13,25 @@ #define SPI_CSPIN_SDC 0 #define SPI_CSPIN_CAM -1 -#define SPI_CSPIN_LCD 11 +#define SPI_CSPIN_LCD 21 -#define SPI_IOF_MASK ((1 << IOF_SPI1_SCK) | (1 << IOF_SPI1_MOSI) | (1 << IOF_SPI1_MISO) | (1 << IOF_SPI1_SS0) | (1 << IOF_SPI1_SS2) | (1 << IOF_SPI1_SS3)) +// SS2 used as I2S_PIN_INT +// #define SPI_IOF_MASK ((1 << IOF_SPI1_SCK) | (1 << IOF_SPI1_MOSI) | (1 << IOF_SPI1_MISO) | (1 << IOF_SPI1_SS0) | (1 << IOF_SPI1_SS2) | (1 << IOF_SPI1_SS3)) +#define SPI_IOF_MASK ((1 << IOF_SPI1_SCK) | (1 << IOF_SPI1_MOSI) | (1 << IOF_SPI1_MISO) | (1 << IOF_SPI1_SS0) | (1 << IOF_SPI1_SS3)) #define NET_PIN_RTS 20 #define NET_PIN_CTS 22 #define EVE_PIN_INTR 1 -//#define EVE_PIN_INTR 23 #define I2S_PIN_CK 1 /* PWM 0.1 */ -#define I2S_PIN_CK_SW 21 /* PWM 1.2 */ -#define I2S_PIN_CK_SR 18 +#define I2S_PIN_SR_CK 18 +#define I2S_PIN_SR_SEL 11 /* PWM 2.1 */ #define I2S_PIN_WS_MIC 19 /* PWM 1.1 */ -#define I2S_PIN_WS_SPK 11 /* PWM 2.1 */ +#define I2S_PIN_WS_SPK 21 /* PWM 1.2 */ #define I2S_PIN_SD_IN 17 #define I2S_PIN_SD_OUT 16 -//#define I2S_PIN_SD_IN 13 -//#define I2S_PIN_SD_OUT 12 +#define I2S_PIN_INT 9 -#define I2S_IRQ_WS_ID (INT_PWM2_BASE + 0) -#define I2S_IRQ_SD_ID (INT_PWM2_BASE + 3) - -#define I2S_CTRL_ADDR_CK PWM0_CTRL_ADDR -#define I2S_CTRL_ADDR_WS_MIC PWM1_CTRL_ADDR -#define I2S_CTRL_ADDR_WS_SPK PWM2_CTRL_ADDR - -#define I2S_IDLE_CYCLES 1 - -//#define CTP_PIN_INT 1 #define CTP_PIN_INT 23 #define CTP_PIN_RST 19 - -#define EVE_GPIO_DIR 0xf - -#define EVE_GPIO_CAM 0 -#define EVE_GPIO_LCD_EN 1 -#define EVE_GPIO_GAIN 2 -#define EVE_GPIO_HAPT 3 |