diff options
| author | Uros Majstorovic <majstor@majstor.org> | 2021-10-01 04:16:49 +0200 |
|---|---|---|
| committer | Uros Majstorovic <majstor@majstor.org> | 2021-10-01 04:16:49 +0200 |
| commit | 5ae72474e3116df141c5700902e54e516b68e6e0 (patch) | |
| tree | b0e1852f2bab908370639d02a6c531980dfd3d23 /hw/breakout/breakout.kicad_pcb | |
| parent | 498fb8b691aaa62ec12b7326361140321c1a8220 (diff) | |
HW REV 3.0
Diffstat (limited to 'hw/breakout/breakout.kicad_pcb')
| -rw-r--r-- | hw/breakout/breakout.kicad_pcb | 1025 |
1 files changed, 1025 insertions, 0 deletions
diff --git a/hw/breakout/breakout.kicad_pcb b/hw/breakout/breakout.kicad_pcb new file mode 100644 index 0000000..7e933a7 --- /dev/null +++ b/hw/breakout/breakout.kicad_pcb @@ -0,0 +1,1025 @@ +(kicad_pcb (version 20171130) (host pcbnew "(5.1.9-0-10_14)") + + (general + (thickness 1.6) + (drawings 30) + (tracks 120) + (zones 0) + (modules 5) + (nets 17) + ) + + (page A4) + (layers + (0 F.Cu signal) + (1 GND power) + (2 PWR power) + (31 B.Cu signal) + (32 B.Adhes user) + (33 F.Adhes user) + (34 B.Paste user) + (35 F.Paste user) + (36 B.SilkS user) + (37 F.SilkS user) + (38 B.Mask user) + (39 F.Mask user) + (40 Dwgs.User user) + (41 Cmts.User user) + (42 Eco1.User user) + (43 Eco2.User user) + (44 Edge.Cuts user) + (45 Margin user) + (46 B.CrtYd user) + (47 F.CrtYd user) + (48 B.Fab user) + (49 F.Fab user) + ) + + (setup + (last_trace_width 0.2) + (trace_clearance 0.2) + (zone_clearance 0.2032) + (zone_45_only no) + (trace_min 0.1524) + (via_size 0.6) + (via_drill 0.3) + (via_min_size 0.4) + (via_min_drill 0.2) + (uvia_size 0.3) + (uvia_drill 0.1) + (uvias_allowed no) + (uvia_min_size 0.2) + (uvia_min_drill 0.1) + (edge_width 0.05) + (segment_width 0.2) + (pcb_text_width 0.3) + (pcb_text_size 1.5 1.5) + (mod_edge_width 0.12) + (mod_text_size 1 1) + (mod_text_width 0.15) + (pad_size 1.524 1.524) + (pad_drill 0.762) + (pad_to_mask_clearance 0) + (aux_axis_origin 0 0) + (visible_elements FFFFFF7F) + (pcbplotparams + (layerselection 0x010fc_ffffffff) + (usegerberextensions false) + (usegerberattributes true) + (usegerberadvancedattributes true) + (creategerberjobfile true) + (excludeedgelayer true) + (linewidth 0.100000) + (plotframeref false) + (viasonmask false) + (mode 1) + (useauxorigin false) + (hpglpennumber 1) + (hpglpenspeed 20) + (hpglpendiameter 15.000000) + (psnegative false) + (psa4output false) + (plotreference true) + (plotvalue true) + (plotinvisibletext false) + (padsonsilk false) + (subtractmaskfromsilk false) + (outputformat 1) + (mirror false) + (drillshape 1) + (scaleselection 1) + (outputdirectory "")) + ) + + (net 0 "") + (net 1 GND) + (net 2 +3V3) + (net 3 /SPI_MOSI) + (net 4 /SPI_MISO) + (net 5 /SPI_SCK) + (net 6 /UART_TX) + (net 7 /UART_RX) + (net 8 VDD) + (net 9 /SPI_CS) + (net 10 /GPIO0) + (net 11 /I2C_SDA) + (net 12 /I2C_SCL) + (net 13 /PCA_IO0) + (net 14 /PCA_IO1) + (net 15 /PCA_IO2) + (net 16 /PCA_IO3) + + (net_class Default "This is the default net class." + (clearance 0.2) + (trace_width 0.2) + (via_dia 0.6) + (via_drill 0.3) + (uvia_dia 0.3) + (uvia_drill 0.1) + (add_net +3V3) + (add_net /GPIO0) + (add_net /I2C_SCL) + (add_net /I2C_SDA) + (add_net /PCA_IO0) + (add_net /PCA_IO1) + (add_net /PCA_IO2) + (add_net /PCA_IO3) + (add_net /SPI_CS) + (add_net /SPI_MISO) + (add_net /SPI_MOSI) + (add_net /SPI_SCK) + (add_net /UART_RX) + (add_net /UART_TX) + (add_net GND) + (add_net VDD) + ) + + (module Connector_PinHeader_2.54mm:PinHeader_2x08_P2.54mm_Vertical (layer F.Cu) (tedit 614F4BB0) (tstamp 614F4F46) + (at 125.76 122.35 180) + (descr "Through hole straight pin header, 2x08, 2.54mm pitch, double rows") + (tags "Through hole pin header THT 2x08 2.54mm double row") + (path /60DA3522) + (fp_text reference J2 (at -5 0 270) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value Out (at 2.65 0 270) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start -4.15 -1.8) (end 2 -1.8) (layer F.CrtYd) (width 0.05)) + (fp_line (start -4.15 19.55) (end -4.15 -1.8) (layer F.CrtYd) (width 0.05)) + (fp_line (start 2 19.55) (end -4.15 19.55) (layer F.CrtYd) (width 0.05)) + (fp_line (start 2 -1.8) (end 2 19.55) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.53 -1.33) (end 0.2 -1.33) (layer F.SilkS) (width 0.12)) + (fp_line (start 1.53 0) (end 1.53 -1.33) (layer F.SilkS) (width 0.12)) + (fp_line (start -1.07 -1.33) (end -3.67 -1.33) (layer F.SilkS) (width 0.12)) + (fp_line (start -1.07 1.27) (end -1.07 -1.33) (layer F.SilkS) (width 0.12)) + (fp_line (start 1.53 1.27) (end -1.07 1.27) (layer F.SilkS) (width 0.12)) + (fp_line (start -3.67 -1.33) (end -3.67 19.11) (layer F.SilkS) (width 0.12)) + (fp_line (start 1.53 1.27) (end 1.53 19.11) (layer F.SilkS) (width 0.12)) + (fp_line (start 1.53 19.11) (end -3.67 19.11) (layer F.SilkS) (width 0.12)) + (fp_line (start 1.47 0) (end 0.2 -1.27) (layer F.Fab) (width 0.1)) + (fp_line (start 1.47 19.05) (end 1.47 0) (layer F.Fab) (width 0.1)) + (fp_line (start -3.61 19.05) (end 1.47 19.05) (layer F.Fab) (width 0.1)) + (fp_line (start -3.61 -1.27) (end -3.61 19.05) (layer F.Fab) (width 0.1)) + (fp_line (start 0.2 -1.27) (end -3.61 -1.27) (layer F.Fab) (width 0.1)) + (fp_text user %R (at -1.07 8.89 270) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (pad 1 thru_hole rect (at 0.2 0 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) + (net 9 /SPI_CS)) + (pad 2 thru_hole oval (at -2.34 0 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) + (net 16 /PCA_IO3)) + (pad 3 thru_hole oval (at 0.2 2.54 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) + (net 3 /SPI_MOSI)) + (pad 4 thru_hole oval (at -2.34 2.54 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) + (net 15 /PCA_IO2)) + (pad 5 thru_hole oval (at 0.2 5.08 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) + (net 4 /SPI_MISO)) + (pad 6 thru_hole oval (at -2.34 5.08 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) + (net 14 /PCA_IO1)) + (pad 7 thru_hole oval (at 0.2 7.62 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) + (net 5 /SPI_SCK)) + (pad 8 thru_hole oval (at -2.34 7.62 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) + (net 13 /PCA_IO0)) + (pad 9 thru_hole oval (at 0.2 10.16 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) + (net 1 GND)) + (pad 10 thru_hole oval (at -2.34 10.16 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) + (net 10 /GPIO0)) + (pad 11 thru_hole oval (at 0.2 12.7 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) + (net 2 +3V3)) + (pad 12 thru_hole oval (at -2.34 12.7 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) + (net 8 VDD)) + (pad 13 thru_hole oval (at 0.2 15.24 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) + (net 11 /I2C_SDA)) + (pad 14 thru_hole oval (at -2.34 15.24 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) + (net 6 /UART_TX)) + (pad 15 thru_hole oval (at 0.2 17.78 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) + (net 12 /I2C_SCL)) + (pad 16 thru_hole oval (at -2.34 17.78 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) + (net 7 /UART_RX)) + (model ${KISYS3DMOD}/Connector_PinHeader_2.54mm.3dshapes/PinHeader_2x08_P2.54mm_Vertical.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Package_SON:WSON-8-1EP_3x3mm_P0.5mm_EP1.6x2.0mm (layer F.Cu) (tedit 5A6E12B5) (tstamp 614E3FF2) + (at 134.7 113.4 90) + (descr "8-Lead Plastic WSON, 2x2mm Body, 0.5mm Pitch, WSON-8, http://www.ti.com/lit/ds/symlink/lm27761.pdf") + (tags "WSON 8 1EP") + (path /614E50D1) + (attr smd) + (fp_text reference U1 (at -2.7 0.85 180) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value PCA9536DP (at -2.2 3.2 270) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start -1.5 -1.62) (end 1 -1.62) (layer F.SilkS) (width 0.12)) + (fp_line (start 1 1.62) (end -1 1.62) (layer F.SilkS) (width 0.12)) + (fp_line (start -1.95 1.75) (end 1.95 1.75) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.95 -1.75) (end 1.95 -1.75) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.95 -1.75) (end 1.95 1.75) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.95 -1.75) (end -1.95 1.75) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1 -1.5) (end 1.5 -1.5) (layer F.Fab) (width 0.1)) + (fp_line (start 1.5 -1.5) (end 1.5 1.5) (layer F.Fab) (width 0.1)) + (fp_line (start 1.5 1.5) (end -1.5 1.5) (layer F.Fab) (width 0.1)) + (fp_line (start -1.5 1.5) (end -1.5 -1) (layer F.Fab) (width 0.1)) + (fp_line (start -1 -1.5) (end -1.5 -1) (layer F.Fab) (width 0.1)) + (fp_text user %R (at 0 0 90) (layer F.Fab) + (effects (font (size 0.7 0.7) (thickness 0.1))) + ) + (pad 3 smd rect (at -1.4 0.25 90) (size 0.6 0.25) (layers F.Cu F.Paste F.Mask) + (net 15 /PCA_IO2)) + (pad 7 smd rect (at 1.4 -0.25 90) (size 0.6 0.25) (layers F.Cu F.Paste F.Mask) + (net 11 /I2C_SDA)) + (pad 8 smd rect (at 1.4 -0.75 90) (size 0.6 0.25) (layers F.Cu F.Paste F.Mask) + (net 2 +3V3)) + (pad 9 smd rect (at 0 0 90) (size 1.6 2) (layers F.Cu F.Mask)) + (pad 1 smd rect (at -1.4 -0.75 90) (size 0.6 0.25) (layers F.Cu F.Paste F.Mask) + (net 13 /PCA_IO0)) + (pad 2 smd rect (at -1.4 -0.25 90) (size 0.6 0.25) (layers F.Cu F.Paste F.Mask) + (net 14 /PCA_IO1)) + (pad 4 smd rect (at -1.4 0.75 90) (size 0.6 0.25) (layers F.Cu F.Paste F.Mask) + (net 1 GND)) + (pad 5 smd rect (at 1.4 0.75 90) (size 0.6 0.25) (layers F.Cu F.Paste F.Mask) + (net 16 /PCA_IO3)) + (pad 6 smd rect (at 1.4 0.25 90) (size 0.6 0.25) (layers F.Cu F.Paste F.Mask) + (net 12 /I2C_SCL)) + (pad "" smd rect (at -0.45 -0.55 90) (size 0.6 0.8) (layers F.Paste)) + (pad "" smd rect (at 0.45 -0.55 90) (size 0.6 0.8) (layers F.Paste)) + (pad "" smd rect (at -0.45 0.55 90) (size 0.6 0.8) (layers F.Paste)) + (pad "" smd rect (at 0.45 0.55 90) (size 0.6 0.8) (layers F.Paste)) + (model ${KISYS3DMOD}/Package_SON.3dshapes/WSON-8-1EP_3x3mm_P0.5mm_EP1.6x2.0mm.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Connector_Molex:Molex_SlimStack_55560-0161_2x08_P0.50mm_Vertical (layer F.Cu) (tedit 60DA23A1) (tstamp 60DA7D5B) + (at 133.5 106.05 270) + (descr "Molex SlimStack Fine-Pitch SMT Board-to-Board Connectors, 55560-0161, 16 Pins (http://www.molex.com/pdm_docs/sd/555600207_sd.pdf), generated with kicad-footprint-generator") + (tags "connector Molex SlimStack side entry") + (path /60DA2442) + (attr smd) + (fp_text reference J1 (at 3.35 2.65 180) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value In (at 0 -4.4 90) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start -3.22 -2.95) (end 3.22 -2.95) (layer F.CrtYd) (width 0.05)) + (fp_line (start -3.22 2.95) (end -3.22 -2.95) (layer F.CrtYd) (width 0.05)) + (fp_line (start 3.22 2.95) (end -3.22 2.95) (layer F.CrtYd) (width 0.05)) + (fp_line (start 3.22 -2.95) (end 3.22 2.95) (layer F.CrtYd) (width 0.05)) + (fp_line (start -2.835 -1.525) (end -2.16 -1.525) (layer F.SilkS) (width 0.12)) + (fp_line (start -2.835 1.525) (end -2.835 -1.525) (layer F.SilkS) (width 0.12)) + (fp_line (start -2.16 1.525) (end -2.835 1.525) (layer F.SilkS) (width 0.12)) + (fp_line (start 2.16 -1.525) (end 2.16 -2.215) (layer F.SilkS) (width 0.12)) + (fp_line (start 2.835 -1.525) (end 2.16 -1.525) (layer F.SilkS) (width 0.12)) + (fp_line (start 2.835 1.525) (end 2.835 -1.525) (layer F.SilkS) (width 0.12)) + (fp_line (start 2.16 1.525) (end 2.835 1.525) (layer F.SilkS) (width 0.12)) + (fp_line (start 2.16 -1.525) (end 2.16 -2.215) (layer F.Fab) (width 0.1)) + (fp_line (start -2.725 -1.415) (end 2.725 -1.415) (layer F.Fab) (width 0.1)) + (fp_line (start -2.725 1.415) (end -2.725 -1.415) (layer F.Fab) (width 0.1)) + (fp_line (start 2.725 1.415) (end -2.725 1.415) (layer F.Fab) (width 0.1)) + (fp_line (start 2.725 -1.415) (end 2.725 1.415) (layer F.Fab) (width 0.1)) + (fp_text user %R (at 0 0 90) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (pad 1 smd rect (at 1.75 -1.95 270) (size 0.3 1) (layers F.Cu F.Paste F.Mask) + (net 2 +3V3)) + (pad 3 smd rect (at 1.25 -1.95 270) (size 0.3 1) (layers F.Cu F.Paste F.Mask) + (net 2 +3V3)) + (pad 5 smd rect (at 0.75 -1.95 270) (size 0.3 1) (layers F.Cu F.Paste F.Mask) + (net 3 /SPI_MOSI)) + (pad 7 smd rect (at 0.25 -1.95 270) (size 0.3 1) (layers F.Cu F.Paste F.Mask) + (net 4 /SPI_MISO)) + (pad 9 smd rect (at -0.25 -1.95 270) (size 0.3 1) (layers F.Cu F.Paste F.Mask) + (net 5 /SPI_SCK)) + (pad 11 smd rect (at -0.75 -1.95 270) (size 0.3 1) (layers F.Cu F.Paste F.Mask) + (net 1 GND)) + (pad 13 smd rect (at -1.25 -1.95 270) (size 0.3 1) (layers F.Cu F.Paste F.Mask) + (net 6 /UART_TX)) + (pad 15 smd rect (at -1.75 -1.95 270) (size 0.3 1) (layers F.Cu F.Paste F.Mask) + (net 7 /UART_RX)) + (pad 2 smd rect (at 1.75 1.95 270) (size 0.3 1) (layers F.Cu F.Paste F.Mask) + (net 8 VDD)) + (pad 4 smd rect (at 1.25 1.95 270) (size 0.3 1) (layers F.Cu F.Paste F.Mask) + (net 8 VDD)) + (pad 6 smd rect (at 0.75 1.95 270) (size 0.3 1) (layers F.Cu F.Paste F.Mask) + (net 1 GND)) + (pad 8 smd rect (at 0.25 1.95 270) (size 0.3 1) (layers F.Cu F.Paste F.Mask) + (net 9 /SPI_CS)) + (pad 10 smd rect (at -0.25 1.95 270) (size 0.3 1) (layers F.Cu F.Paste F.Mask) + (net 10 /GPIO0)) + (pad 12 smd rect (at -0.75 1.95 270) (size 0.3 1) (layers F.Cu F.Paste F.Mask) + (net 11 /I2C_SDA)) + (pad 14 smd rect (at -1.25 1.95 270) (size 0.3 1) (layers F.Cu F.Paste F.Mask) + (net 12 /I2C_SCL)) + (pad 16 smd rect (at -1.75 1.95 270) (size 0.3 1) (layers F.Cu F.Paste F.Mask) + (net 1 GND)) + (model ${KISYS3DMOD}/Connector_Molex.3dshapes/Molex_SlimStack_55560-0161_2x08_P0.50mm_Vertical.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Capacitor_SMD:C_0603_1608Metric (layer F.Cu) (tedit 5F68FEEE) (tstamp 614E403F) + (at 132.2 112.8 270) + (descr "Capacitor SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: IPC-SM-782 page 76, https://www.pcb-3d.com/wordpress/wp-content/uploads/ipc-sm-782a_amendment_1_and_2.pdf), generated with kicad-footprint-generator") + (tags capacitor) + (path /614E5873) + (attr smd) + (fp_text reference C2 (at 2.45 0 270) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 0.1uF (at 5.4 -0.05 90) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start 1.48 0.73) (end -1.48 0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.48 -0.73) (end 1.48 0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.48 -0.73) (end 1.48 -0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.48 0.73) (end -1.48 -0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start -0.14058 0.51) (end 0.14058 0.51) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.14058 -0.51) (end 0.14058 -0.51) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.8 0.4) (end -0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start 0.8 -0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_text user %R (at 0 0 90) (layer F.Fab) + (effects (font (size 0.4 0.4) (thickness 0.06))) + ) + (pad 1 smd roundrect (at -0.775 0 270) (size 0.9 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 2 +3V3)) + (pad 2 smd roundrect (at 0.775 0 270) (size 0.9 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 1 GND)) + (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Capacitor_SMD:C_0603_1608Metric (layer F.Cu) (tedit 5F68FEEE) (tstamp 614EE6A1) + (at 134.7 110.05 180) + (descr "Capacitor SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: IPC-SM-782 page 76, https://www.pcb-3d.com/wordpress/wp-content/uploads/ipc-sm-782a_amendment_1_and_2.pdf), generated with kicad-footprint-generator") + (tags capacitor) + (path /61713CB1) + (attr smd) + (fp_text reference C1 (at 2.2 -0.05) (layer F.SilkS) + (effects (font (size 0.8 0.8) (thickness 0.15))) + ) + (fp_text value 10uF (at -4.3 0) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_line (start 0.8 -0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start 0.8 0.4) (end -0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start 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