JLCPCB order W2025070409252353

5 files changed, 1403 insertions, 0 deletions

diff --git a/hw/cam2ac/cam2ac.kicad_pcb b/hw/cam2ac/cam2ac.kicad_pcb
new file mode 100644
index 0000000..9b5167c
--- /dev/null
+++ b/hw/cam2ac/cam2ac.kicad_pcb
@@ -0,0 +1,708 @@
+(kicad_pcb (version 20171130) (host pcbnew "(5.1.9-0-10_14)")
+
+  (general
+    (thickness 1.6)
+    (drawings 7)
+    (tracks 102)
+    (zones 0)
+    (modules 3)
+    (nets 27)
+  )
+
+  (page A4)
+  (title_block
+    (title "mikroPhone camera to ArduCAM")
+  )
+
+  (layers
+    (0 F.Cu signal)
+    (1 GND power)
+    (2 PWR power)
+    (31 B.Cu signal)
+    (32 B.Adhes user)
+    (33 F.Adhes user)
+    (34 B.Paste user)
+    (35 F.Paste user)
+    (36 B.SilkS user hide)
+    (37 F.SilkS user hide)
+    (38 B.Mask user)
+    (39 F.Mask user)
+    (40 Dwgs.User user)
+    (41 Cmts.User user)
+    (42 Eco1.User user)
+    (43 Eco2.User user)
+    (44 Edge.Cuts user)
+    (45 Margin user)
+    (46 B.CrtYd user)
+    (47 F.CrtYd user)
+    (48 B.Fab user hide)
+    (49 F.Fab user hide)
+  )
+
+  (setup
+    (last_trace_width 0.2)
+    (trace_clearance 0.2)
+    (zone_clearance 0.2032)
+    (zone_45_only no)
+    (trace_min 0.2)
+    (via_size 0.6)
+    (via_drill 0.3)
+    (via_min_size 0.4)
+    (via_min_drill 0.3)
+    (uvia_size 0.3)
+    (uvia_drill 0.1)
+    (uvias_allowed no)
+    (uvia_min_size 0.2)
+    (uvia_min_drill 0.1)
+    (edge_width 0.05)
+    (segment_width 0.2)
+    (pcb_text_width 0.3)
+    (pcb_text_size 1.5 1.5)
+    (mod_edge_width 0.12)
+    (mod_text_size 1 1)
+    (mod_text_width 0.15)
+    (pad_size 1.524 1.524)
+    (pad_drill 0.762)
+    (pad_to_mask_clearance 0)
+    (aux_axis_origin 138.6 32.95)
+    (grid_origin 138.6 32.95)
+    (visible_elements FFFFF77F)
+    (pcbplotparams
+      (layerselection 0x010fc_ffffffff)
+      (usegerberextensions true)
+      (usegerberattributes false)
+      (usegerberadvancedattributes false)
+      (creategerberjobfile false)
+      (excludeedgelayer true)
+      (linewidth 0.100000)
+      (plotframeref false)
+      (viasonmask false)
+      (mode 1)
+      (useauxorigin false)
+      (hpglpennumber 1)
+      (hpglpenspeed 20)
+      (hpglpendiameter 15.000000)
+      (psnegative false)
+      (psa4output false)
+      (plotreference true)
+      (plotvalue true)
+      (plotinvisibletext false)
+      (padsonsilk false)
+      (subtractmaskfromsilk true)
+      (outputformat 1)
+      (mirror false)
+      (drillshape 0)
+      (scaleselection 1)
+      (outputdirectory "fab/"))
+  )
+
+  (net 0 "")
+  (net 1 APP.CSI.GPIO_5)
+  (net 2 APP.CSI.GPIO_6)
+  (net 3 APP.CSI.I2C4.SCL)
+  (net 4 APP.CSI.I2C4.SDA)
+  (net 5 SPI1.SS3)
+  (net 6 SPI1.SCK)
+  (net 7 SPI1.MISO)
+  (net 8 SPI1.MOSI)
+  (net 9 I2C0.SCL)
+  (net 10 I2C0.SDA)
+  (net 11 GPIO_23)
+  (net 12 ENABLE)
+  (net 13 PRIV_LED_K)
+  (net 14 +3V3)
+  (net 15 +1V8)
+  (net 16 APP.CSI2.D3_P)
+  (net 17 APP.CSI2.D3_N)
+  (net 18 GND)
+  (net 19 APP.CSI2.D2_P)
+  (net 20 APP.CSI2.D2_N)
+  (net 21 APP.CSI2.CLK_P)
+  (net 22 APP.CSI2.CLK_N)
+  (net 23 APP.CSI2.D1_P)
+  (net 24 APP.CSI2.D1_N)
+  (net 25 APP.CSI2.D0_P)
+  (net 26 APP.CSI2.D0_N)
+
+  (net_class Default "This is the default net class."
+    (clearance 0.2)
+    (trace_width 0.2)
+    (via_dia 0.6)
+    (via_drill 0.3)
+    (uvia_dia 0.3)
+    (uvia_drill 0.1)
+    (add_net APP.CSI.GPIO_5)
+    (add_net APP.CSI.GPIO_6)
+    (add_net APP.CSI.I2C4.SCL)
+    (add_net APP.CSI.I2C4.SDA)
+    (add_net APP.CSI2.CLK_N)
+    (add_net APP.CSI2.CLK_P)
+    (add_net APP.CSI2.D0_N)
+    (add_net APP.CSI2.D0_P)
+    (add_net APP.CSI2.D1_N)
+    (add_net APP.CSI2.D1_P)
+    (add_net APP.CSI2.D2_N)
+    (add_net APP.CSI2.D2_P)
+    (add_net APP.CSI2.D3_N)
+    (add_net APP.CSI2.D3_P)
+    (add_net ENABLE)
+    (add_net GPIO_23)
+    (add_net I2C0.SCL)
+    (add_net I2C0.SDA)
+    (add_net PRIV_LED_K)
+    (add_net SPI1.MISO)
+    (add_net SPI1.MOSI)
+    (add_net SPI1.SCK)
+    (add_net SPI1.SS3)
+  )
+
+  (net_class PWR ""
+    (clearance 0.2)
+    (trace_width 0.25)
+    (via_dia 0.6)
+    (via_drill 0.3)
+    (uvia_dia 0.3)
+    (uvia_drill 0.1)
+    (add_net +1V8)
+    (add_net +3V3)
+    (add_net GND)
+  )
+
+  (module Connector_FFC-FPC:Hirose_FH12-14S-0.5SH_1x14-1MP_P0.50mm_Horizontal (layer B.Cu) (tedit 68507BA0) (tstamp 6850CA68)
+    (at 143.6 39.6 90)
+    (descr "Hirose FH12, FFC/FPC connector, FH12-14S-0.5SH, 14 Pins per row (https://www.hirose.com/product/en/products/FH12/FH12-24S-0.5SH(55)/), generated with kicad-footprint-generator")
+    (tags "connector Hirose FH12 horizontal")
+    (path /685358A3)
+    (attr smd)
+    (fp_text reference J2 (at -4.7 2.3 90) (layer B.SilkS)
+      (effects (font (size 1 1) (thickness 0.15)) (justify mirror))
+    )
+    (fp_text value ArduCAM (at 0 -5.6 90) (layer B.Fab)
+      (effects (font (size 1 1) (thickness 0.15)) (justify mirror))
+    )
+    (fp_line (start 0 1.2) (end 5.05 1.2) (layer B.Fab) (width 0.1))
+    (fp_line (start 5.05 1.2) (end 5.05 -3.4) (layer B.Fab) (width 0.1))
+    (fp_line (start 5.05 -3.4) (end 4.45 -3.4) (layer B.Fab) (width 0.1))
+    (fp_line (start 4.45 -3.4) (end 4.45 -3.7) (layer B.Fab) (width 0.1))
+    (fp_line (start 4.45 -3.7) (end 4.95 -3.7) (layer B.Fab) (width 0.1))
+    (fp_line (start 4.95 -3.7) (end 4.95 -4.4) (layer B.Fab) (width 0.1))
+    (fp_line (start 4.95 -4.4) (end 0 -4.4) (layer B.Fab) (width 0.1))
+    (fp_line (start 0 1.2) (end -5.05 1.2) (layer B.Fab) (width 0.1))
+    (fp_line (start -5.05 1.2) (end -5.05 -3.4) (layer B.Fab) (width 0.1))
+    (fp_line (start -5.05 -3.4) (end -4.45 -3.4) (layer B.Fab) (width 0.1))
+    (fp_line (start -4.45 -3.4) (end -4.45 -3.7) (layer B.Fab) (width 0.1))
+    (fp_line (start -4.45 -3.7) (end -4.95 -3.7) (layer B.Fab) (width 0.1))
+    (fp_line (start -4.95 -3.7) (end -4.95 -4.4) (layer B.Fab) (width 0.1))
+    (fp_line (start -4.95 -4.4) (end 0 -4.4) (layer B.Fab) (width 0.1))
+    (fp_line (start 3.66 1.3) (end 5.15 1.3) (layer B.SilkS) (width 0.12))
+    (fp_line (start 5.15 1.3) (end 5.15 -0.04) (layer B.SilkS) (width 0.12))
+    (fp_line (start -3.66 1.3) (end -5.15 1.3) (layer B.SilkS) (width 0.12))
+    (fp_line (start -5.15 1.3) (end -5.15 -0.04) (layer B.SilkS) (width 0.12))
+    (fp_line (start 5.15 -2.76) (end 5.15 -4.5) (layer B.SilkS) (width 0.12))
+    (fp_line (start 5.15 -4.5) (end -5.15 -4.5) (layer B.SilkS) (width 0.12))
+    (fp_line (start -5.15 -4.5) (end -5.15 -2.76) (layer B.SilkS) (width 0.12))
+    (fp_line (start 3.66 1.3) (end 3.66 2.5) (layer B.SilkS) (width 0.12))
+    (fp_line (start 3.75 1.2) (end 3.25 0.492893) (layer B.Fab) (width 0.1))
+    (fp_line (start 3.25 0.492893) (end 2.75 1.2) (layer B.Fab) (width 0.1))
+    (fp_line (start 6.55 3) (end 6.55 -4.9) (layer B.CrtYd) (width 0.05))
+    (fp_line (start 6.55 -4.9) (end -6.55 -4.9) (layer B.CrtYd) (width 0.05))
+    (fp_line (start -6.55 -4.9) (end -6.55 3) (layer B.CrtYd) (width 0.05))
+    (fp_line (start -6.55 3) (end 6.55 3) (layer B.CrtYd) (width 0.05))
+    (fp_text user %R (at 0 -3.7 90) (layer B.Fab)
+      (effects (font (size 1 1) (thickness 0.15)) (justify mirror))
+    )
+    (pad MP smd rect (at -5.15 -1.4 90) (size 1.8 2.2) (layers B.Cu B.Paste B.Mask))
+    (pad MP smd rect (at 5.15 -1.4 90) (size 1.8 2.2) (layers B.Cu B.Paste B.Mask))
+    (pad 1 smd rect (at 3.25 1.85 90) (size 0.3 1.3) (layers B.Cu B.Paste B.Mask)
+      (net 14 +3V3))
+    (pad 2 smd rect (at 2.75 1.85 90) (size 0.3 1.3) (layers B.Cu B.Paste B.Mask)
+      (net 14 +3V3))
+    (pad 3 smd rect (at 2.25 1.85 90) (size 0.3 1.3) (layers B.Cu B.Paste B.Mask)
+      (net 8 SPI1.MOSI))
+    (pad 4 smd rect (at 1.75 1.85 90) (size 0.3 1.3) (layers B.Cu B.Paste B.Mask)
+      (net 7 SPI1.MISO))
+    (pad 5 smd rect (at 1.25 1.85 90) (size 0.3 1.3) (layers B.Cu B.Paste B.Mask)
+      (net 6 SPI1.SCK))
+    (pad 6 smd rect (at 0.75 1.85 90) (size 0.3 1.3) (layers B.Cu B.Paste B.Mask)
+      (net 18 GND))
+    (pad 7 smd rect (at 0.25 1.85 90) (size 0.3 1.3) (layers B.Cu B.Paste B.Mask)
+      (net 5 SPI1.SS3))
+    (pad 8 smd rect (at -0.25 1.85 90) (size 0.3 1.3) (layers B.Cu B.Paste B.Mask)
+      (net 18 GND))
+    (pad 9 smd rect (at -0.75 1.85 90) (size 0.3 1.3) (layers B.Cu B.Paste B.Mask)
+      (net 10 I2C0.SDA))
+    (pad 10 smd rect (at -1.25 1.85 90) (size 0.3 1.3) (layers B.Cu B.Paste B.Mask)
+      (net 9 I2C0.SCL))
+    (pad 11 smd rect (at -1.75 1.85 90) (size 0.3 1.3) (layers B.Cu B.Paste B.Mask)
+      (net 18 GND))
+    (pad 12 smd rect (at -2.25 1.85 90) (size 0.3 1.3) (layers B.Cu B.Paste B.Mask)
+      (net 11 GPIO_23))
+    (pad 13 smd rect (at -2.75 1.85 90) (size 0.3 1.3) (layers B.Cu B.Paste B.Mask)
+      (net 12 ENABLE))
+    (pad 14 smd rect (at -3.25 1.85 90) (size 0.3 1.3) (layers B.Cu B.Paste B.Mask)
+      (net 13 PRIV_LED_K))
+    (model ${KISYS3DMOD}/Connector_FFC-FPC.3dshapes/Hirose_FH12-14S-0.5SH_1x14-1MP_P0.50mm_Horizontal.wrl
+      (at (xyz 0 0 0))
+      (scale (xyz 1 1 1))
+      (rotate (xyz 0 0 0))
+    )
+  )
+
+  (module Connector_Molex:Molex_SlimStack_55560-0301_2x15_P0.50mm_Vertical (layer F.Cu) (tedit 68506D73) (tstamp 6850CA37)
+    (at 142.4 44.15 90)
+    (descr "Molex SlimStack Fine-Pitch SMT Board-to-Board Connectors, 55560-0301, 30 Pins (http://www.molex.com/pdm_docs/sd/555600207_sd.pdf), generated with kicad-footprint-generator")
+    (tags "connector Molex SlimStack side entry")
+    (path /63923BCB)
+    (attr smd)
+    (fp_text reference J1 (at -5.7 0 270) (layer F.SilkS)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value Camera (at 0 3.65 270) (layer F.Fab)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_line (start 4.475 -1.415) (end 4.475 1.415) (layer F.Fab) (width 0.1))
+    (fp_line (start 4.475 1.415) (end -4.475 1.415) (layer F.Fab) (width 0.1))
+    (fp_line (start -4.475 1.415) (end -4.475 -1.415) (layer F.Fab) (width 0.1))
+    (fp_line (start -4.475 -1.415) (end 4.475 -1.415) (layer F.Fab) (width 0.1))
+    (fp_line (start 3.91 -1.525) (end 3.91 -2.215) (layer F.Fab) (width 0.1))
+    (fp_line (start 3.91 1.525) (end 4.585 1.525) (layer F.SilkS) (width 0.12))
+    (fp_line (start 4.585 1.525) (end 4.585 -1.525) (layer F.SilkS) (width 0.12))
+    (fp_line (start 4.585 -1.525) (end 3.91 -1.525) (layer F.SilkS) (width 0.12))
+    (fp_line (start 3.91 -1.525) (end 3.91 -2.215) (layer F.SilkS) (width 0.12))
+    (fp_line (start -3.91 1.525) (end -4.585 1.525) (layer F.SilkS) (width 0.12))
+    (fp_line (start -4.585 1.525) (end -4.585 -1.525) (layer F.SilkS) (width 0.12))
+    (fp_line (start -4.585 -1.525) (end -3.91 -1.525) (layer F.SilkS) (width 0.12))
+    (fp_line (start 4.98 -2.95) (end 4.98 2.95) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 4.98 2.95) (end -4.98 2.95) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -4.98 2.95) (end -4.98 -2.95) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -4.98 -2.95) (end 4.98 -2.95) (layer F.CrtYd) (width 0.05))
+    (fp_text user %R (at 0 0 270) (layer F.Fab)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (pad 1 smd rect (at 3.5 -1.95 90) (size 0.3 1) (layers F.Cu F.Paste F.Mask)
+      (net 1 APP.CSI.GPIO_5))
+    (pad 3 smd rect (at 3 -1.95 90) (size 0.3 1) (layers F.Cu F.Paste F.Mask)
+      (net 2 APP.CSI.GPIO_6))
+    (pad 5 smd rect (at 2.5 -1.95 90) (size 0.3 1) (layers F.Cu F.Paste F.Mask)
+      (net 3 APP.CSI.I2C4.SCL))
+    (pad 7 smd rect (at 2 -1.95 90) (size 0.3 1) (layers F.Cu F.Paste F.Mask)
+      (net 4 APP.CSI.I2C4.SDA))
+    (pad 9 smd rect (at 1.5 -1.95 90) (size 0.3 1) (layers F.Cu F.Paste F.Mask)
+      (net 5 SPI1.SS3))
+    (pad 11 smd rect (at 1 -1.95 90) (size 0.3 1) (layers F.Cu F.Paste F.Mask)
+      (net 6 SPI1.SCK))
+    (pad 13 smd rect (at 0.5 -1.95 90) (size 0.3 1) (layers F.Cu F.Paste F.Mask)
+      (net 7 SPI1.MISO))
+    (pad 15 smd rect (at 0 -1.95 90) (size 0.3 1) (layers F.Cu F.Paste F.Mask)
+      (net 8 SPI1.MOSI))
+    (pad 17 smd rect (at -0.5 -1.95 90) (size 0.3 1) (layers F.Cu F.Paste F.Mask)
+      (net 9 I2C0.SCL))
+    (pad 19 smd rect (at -1 -1.95 90) (size 0.3 1) (layers F.Cu F.Paste F.Mask)
+      (net 10 I2C0.SDA))
+    (pad 21 smd rect (at -1.5 -1.95 90) (size 0.3 1) (layers F.Cu F.Paste F.Mask)
+      (net 11 GPIO_23))
+    (pad 23 smd rect (at -2 -1.95 90) (size 0.3 1) (layers F.Cu F.Paste F.Mask)
+      (net 12 ENABLE))
+    (pad 25 smd rect (at -2.5 -1.95 90) (size 0.3 1) (layers F.Cu F.Paste F.Mask)
+      (net 13 PRIV_LED_K))
+    (pad 27 smd rect (at -3 -1.95 90) (size 0.3 1) (layers F.Cu F.Paste F.Mask)
+      (net 14 +3V3))
+    (pad 29 smd rect (at -3.5 -1.95 90) (size 0.3 1) (layers F.Cu F.Paste F.Mask)
+      (net 14 +3V3))
+    (pad 2 smd rect (at 3.5 1.95 90) (size 0.3 1) (layers F.Cu F.Paste F.Mask)
+      (net 15 +1V8))
+    (pad 4 smd rect (at 3 1.95 90) (size 0.3 1) (layers F.Cu F.Paste F.Mask)
+      (net 16 APP.CSI2.D3_P))
+    (pad 6 smd rect (at 2.5 1.95 90) (size 0.3 1) (layers F.Cu F.Paste F.Mask)
+      (net 17 APP.CSI2.D3_N))
+    (pad 8 smd rect (at 2 1.95 90) (size 0.3 1) (layers F.Cu F.Paste F.Mask)
+      (net 18 GND))
+    (pad 10 smd rect (at 1.5 1.95 90) (size 0.3 1) (layers F.Cu F.Paste F.Mask)
+      (net 19 APP.CSI2.D2_P))
+    (pad 12 smd rect (at 1 1.95 90) (size 0.3 1) (layers F.Cu F.Paste F.Mask)
+      (net 20 APP.CSI2.D2_N))
+    (pad 14 smd rect (at 0.5 1.95 90) (size 0.3 1) (layers F.Cu F.Paste F.Mask)
+      (net 18 GND))
+    (pad 16 smd rect (at 0 1.95 90) (size 0.3 1) (layers F.Cu F.Paste F.Mask)
+      (net 21 APP.CSI2.CLK_P))
+    (pad 18 smd rect (at -0.5 1.95 90) (size 0.3 1) (layers F.Cu F.Paste F.Mask)
+      (net 22 APP.CSI2.CLK_N))
+    (pad 20 smd rect (at -1 1.95 90) (size 0.3 1) (layers F.Cu F.Paste F.Mask)
+      (net 18 GND))
+    (pad 22 smd rect (at -1.5 1.95 90) (size 0.3 1) (layers F.Cu F.Paste F.Mask)
+      (net 23 APP.CSI2.D1_P))
+    (pad 24 smd rect (at -2 1.95 90) (size 0.3 1) (layers F.Cu F.Paste F.Mask)
+      (net 24 APP.CSI2.D1_N))
+    (pad 26 smd rect (at -2.5 1.95 90) (size 0.3 1) (layers F.Cu F.Paste F.Mask)
+      (net 18 GND))
+    (pad 28 smd rect (at -3 1.95 90) (size 0.3 1) (layers F.Cu F.Paste F.Mask)
+      (net 25 APP.CSI2.D0_P))
+    (pad 30 smd rect (at -3.5 1.95 90) (size 0.3 1) (layers F.Cu F.Paste F.Mask)
+      (net 26 APP.CSI2.D0_N))
+    (model ${KISYS3DMOD}/Connector_Molex.3dshapes/Molex_SlimStack_55560-0301_2x15_P0.50mm_Vertical.wrl
+      (at (xyz 0 0 0))
+      (scale (xyz 1 1 1))
+      (rotate (xyz 0 0 0))
+    )
+  )
+
+  (module footprints:Spacer_small (layer B.Cu) (tedit 61BFD32E) (tstamp 6850CA6E)
+    (at 142.4 54.85)
+    (path /6851B3C1)
+    (fp_text reference J3 (at 0 -2.8) (layer B.SilkS) hide
+      (effects (font (size 1 1) (thickness 0.15)) (justify mirror))
+    )
+    (fp_text value Spacer (at 0 2.7) (layer B.Fab)
+      (effects (font (size 1 1) (thickness 0.15)) (justify mirror))
+    )
+    (pad 1 thru_hole circle (at 0 0) (size 3 3) (drill 2.1) (layers *.Cu *.Mask)
+      (net 18 GND))
+    (pad 1 smd circle (at 0 0) (size 4 4) (layers B.Cu B.Mask)
+      (net 18 GND))
+  )
+
+  (gr_text 1 (at 145.8 35.3 90) (layer B.SilkS)
+    (effects (font (size 1 1) (thickness 0.15)) (justify mirror))
+  )
+  (gr_line (start 147.3 47.4) (end 147.3 32.95) (layer Edge.Cuts) (width 0.05))
+  (gr_line (start 145.9 47.4) (end 147.3 47.4) (layer Edge.Cuts) (width 0.05))
+  (gr_line (start 138.6 32.95) (end 138.6 57.55) (layer Edge.Cuts) (width 0.05) (tstamp 6850DF40))
+  (gr_line (start 147.3 32.95) (end 138.6 32.95) (layer Edge.Cuts) (width 0.05))
+  (gr_line (start 145.9 57.55) (end 145.9 47.4) (layer Edge.Cuts) (width 0.05))
+  (gr_line (start 138.6 57.55) (end 145.9 57.55) (layer Edge.Cuts) (width 0.05))
+
+  (segment (start 140.45 42.65) (end 139.85 42.65) (width 0.2) (layer F.Cu) (net 5))
+  (segment (start 139.85 42.65) (end 139.65 42.45) (width 0.2) (layer F.Cu) (net 5))
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diff --git a/hw/cam2ac/cam2ac.pro b/hw/cam2ac/cam2ac.pro
new file mode 100644
index 0000000..fcddce2
--- /dev/null
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+MinMicroViaDrill=0.09999999999999999
+MinHoleToHole=0.25
+TrackWidth1=0.2
+ViaDiameter1=0.6
+ViaDrill1=0.3
+dPairWidth1=0.2
+dPairGap1=0.25
+dPairViaGap1=0.25
+SilkLineWidth=0.12
+SilkTextSizeV=1
+SilkTextSizeH=1
+SilkTextSizeThickness=0.15
+SilkTextItalic=0
+SilkTextUpright=1
+CopperLineWidth=0.2
+CopperTextSizeV=1.5
+CopperTextSizeH=1.5
+CopperTextThickness=0.3
+CopperTextItalic=0
+CopperTextUpright=1
+EdgeCutLineWidth=0.05
+CourtyardLineWidth=0.05
+OthersLineWidth=0.15
+OthersTextSizeV=1
+OthersTextSizeH=1
+OthersTextSizeThickness=0.15
+OthersTextItalic=0
+OthersTextUpright=1
+SolderMaskClearance=0
+SolderMaskMinWidth=0
+SolderPasteClearance=0
+SolderPasteRatio=0
+[pcbnew/Layer.F.Cu]
+Name=F.Cu
+Type=0
+Enabled=1
+[pcbnew/Layer.In1.Cu]
+Name=GND
+Type=1
+Enabled=1
+[pcbnew/Layer.In2.Cu]
+Name=PWR
+Type=1
+Enabled=1
+[pcbnew/Layer.In3.Cu]
+Name=In3.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In4.Cu]
+Name=In4.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In5.Cu]
+Name=In5.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In6.Cu]
+Name=In6.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In7.Cu]
+Name=In7.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In8.Cu]
+Name=In8.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In9.Cu]
+Name=In9.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In10.Cu]
+Name=In10.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In11.Cu]
+Name=In11.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In12.Cu]
+Name=In12.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In13.Cu]
+Name=In13.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In14.Cu]
+Name=In14.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In15.Cu]
+Name=In15.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In16.Cu]
+Name=In16.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In17.Cu]
+Name=In17.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In18.Cu]
+Name=In18.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In19.Cu]
+Name=In19.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In20.Cu]
+Name=In20.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In21.Cu]
+Name=In21.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In22.Cu]
+Name=In22.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In23.Cu]
+Name=In23.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In24.Cu]
+Name=In24.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In25.Cu]
+Name=In25.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In26.Cu]
+Name=In26.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In27.Cu]
+Name=In27.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In28.Cu]
+Name=In28.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In29.Cu]
+Name=In29.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.In30.Cu]
+Name=In30.Cu
+Type=0
+Enabled=0
+[pcbnew/Layer.B.Cu]
+Name=B.Cu
+Type=0
+Enabled=1
+[pcbnew/Layer.B.Adhes]
+Enabled=1
+[pcbnew/Layer.F.Adhes]
+Enabled=1
+[pcbnew/Layer.B.Paste]
+Enabled=1
+[pcbnew/Layer.F.Paste]
+Enabled=1
+[pcbnew/Layer.B.SilkS]
+Enabled=1
+[pcbnew/Layer.F.SilkS]
+Enabled=1
+[pcbnew/Layer.B.Mask]
+Enabled=1
+[pcbnew/Layer.F.Mask]
+Enabled=1
+[pcbnew/Layer.Dwgs.User]
+Enabled=1
+[pcbnew/Layer.Cmts.User]
+Enabled=1
+[pcbnew/Layer.Eco1.User]
+Enabled=1
+[pcbnew/Layer.Eco2.User]
+Enabled=1
+[pcbnew/Layer.Edge.Cuts]
+Enabled=1
+[pcbnew/Layer.Margin]
+Enabled=1
+[pcbnew/Layer.B.CrtYd]
+Enabled=1
+[pcbnew/Layer.F.CrtYd]
+Enabled=1
+[pcbnew/Layer.B.Fab]
+Enabled=1
+[pcbnew/Layer.F.Fab]
+Enabled=1
+[pcbnew/Layer.Rescue]
+Enabled=0
+[pcbnew/Netclasses]
+[pcbnew/Netclasses/Default]
+Name=Default
+Clearance=0.2
+TrackWidth=0.2
+ViaDiameter=0.6
+ViaDrill=0.3
+uViaDiameter=0.3
+uViaDrill=0.1
+dPairWidth=0.2
+dPairGap=0.25
+dPairViaGap=0.25
+[pcbnew/Netclasses/1]
+Name=PWR
+Clearance=0.2
+TrackWidth=0.25
+ViaDiameter=0.6
+ViaDrill=0.3
+uViaDiameter=0.3
+uViaDrill=0.1
+dPairWidth=0.2
+dPairGap=0.25
+dPairViaGap=0.25
diff --git a/hw/cam2ac/cam2ac.sch b/hw/cam2ac/cam2ac.sch
new file mode 100644
index 0000000..453923e
--- /dev/null
+++ b/hw/cam2ac/cam2ac.sch
@@ -0,0 +1,430 @@
+EESchema Schematic File Version 4
+EELAYER 30 0
+EELAYER END
+$Descr A4 11693 8268
+encoding utf-8
+Sheet 1 1
+Title "mikroPhone camera to ArduCAM"
+Date ""
+Rev ""
+Comp ""
+Comment1 ""
+Comment2 ""
+Comment3 ""
+Comment4 ""
+$EndDescr
+Text GLabel 1800 1900 0    55   Output ~ 0
+SPI1.SS3
+Text GLabel 1800 2000 0    55   Output ~ 0
+SPI1.SCK
+Text GLabel 1800 2100 0    55   Input ~ 0
+SPI1.MISO
+Text GLabel 1800 2200 0    55   Output ~ 0
+SPI1.MOSI
+Wire Wire Line
+	1950 1900 1800 1900
+Wire Wire Line
+	1950 2000 1800 2000
+Wire Wire Line
+	1950 2100 1800 2100
+Wire Wire Line
+	1800 2400 1950 2400
+Text GLabel 1800 2300 0    55   Output ~ 0
+I2C0.SCL
+Text GLabel 1800 2400 0    55   BiDi ~ 0
+I2C0.SDA
+Wire Wire Line
+	1800 2300 1950 2300
+$Comp
+L power:+3.3V #PWR?
+U 1 1 6851CA04
+P 1900 1300
+AR Path="/61A17BF3/6851CA04" Ref="#PWR?"  Part="1" 
+AR Path="/619DBCF0/6851CA04" Ref="#PWR0167"  Part="1" 
+AR Path="/6464C617/6851CA04" Ref="#PWR0167"  Part="1" 
+AR Path="/6851CA04" Ref="#PWR0167"  Part="1" 
+F 0 "#PWR0167" H 1900 1150 50  0001 C CNN
+F 1 "+3.3V" H 1900 1450 50  0000 C CNN
+F 2 "" H 1900 1300 50  0001 C CNN
+F 3 "" H 1900 1300 50  0001 C CNN
+	1    1900 1300
+	1    0    0    -1  
+$EndComp
+Wire Wire Line
+	1800 2200 1950 2200
+Text GLabel 1800 2500 0    55   3State ~ 0
+GPIO_23
+$Comp
+L Connector_Generic:Conn_02x15_Odd_Even J1
+U 1 1 63923BCB
+P 2150 2200
+F 0 "J1" H 2150 3000 50  0000 C CNN
+F 1 "Camera" H 2200 1400 50  0000 C CNN
+F 2 "Connector_Molex:Molex_SlimStack_55560-0301_2x15_P0.50mm_Vertical" H 2150 2200 50  0001 C CNN
+F 3 "~" H 2150 2200 50  0001 C CNN
+	1    2150 2200
+	1    0    0    -1  
+$EndComp
+$Comp
+L power:+1V8 #PWR0227
+U 1 1 63C213D7
+P 2500 1300
+F 0 "#PWR0227" H 2500 1150 50  0001 C CNN
+F 1 "+1V8" H 2500 1450 50  0000 C CNN
+F 2 "" H 2500 1300 50  0001 C CNN
+F 3 "" H 2500 1300 50  0001 C CNN
+	1    2500 1300
+	1    0    0    -1  
+$EndComp
+Wire Wire Line
+	1800 2500 1950 2500
+Wire Wire Line
+	1800 2600 1950 2600
+Text GLabel 1800 1500 0    60   BiDi ~ 0
+APP.CSI.GPIO_5
+Text GLabel 1800 1600 0    60   BiDi ~ 0
+APP.CSI.GPIO_6
+Wire Wire Line
+	1800 1500 1950 1500
+Wire Wire Line
+	1800 1600 1950 1600
+Text GLabel 1800 1800 0    60   BiDi ~ 0
+APP.CSI.I2C4.SDA
+Wire Wire Line
+	1800 1700 1950 1700
+Wire Wire Line
+	1800 1800 1950 1800
+Wire Wire Line
+	1900 2900 1950 2900
+Wire Wire Line
+	2450 1800 2500 1800
+Wire Wire Line
+	2500 1800 2500 2100
+Wire Wire Line
+	2450 2100 2500 2100
+Connection ~ 2500 2100
+Wire Wire Line
+	2500 2100 2500 2400
+Wire Wire Line
+	2450 2400 2500 2400
+Connection ~ 2500 2400
+Wire Wire Line
+	2500 2400 2500 2700
+Wire Wire Line
+	2450 2700 2500 2700
+Connection ~ 2500 2700
+Text GLabel 2600 1600 2    60   Input ~ 0
+APP.CSI2.D3_P
+Wire Wire Line
+	2450 1600 2600 1600
+Text GLabel 2600 1700 2    60   Input ~ 0
+APP.CSI2.D3_N
+Text GLabel 2600 1900 2    60   Input ~ 0
+APP.CSI2.D2_P
+Text GLabel 2600 2000 2    60   Input ~ 0
+APP.CSI2.D2_N
+Text GLabel 2600 2500 2    60   Input ~ 0
+APP.CSI2.D1_P
+Text GLabel 2600 2600 2    60   Input ~ 0
+APP.CSI2.D1_N
+Text GLabel 2600 2800 2    60   Input ~ 0
+APP.CSI2.D0_P
+Text GLabel 2600 2900 2    60   Input ~ 0
+APP.CSI2.D0_N
+Text GLabel 2600 2200 2    60   Input ~ 0
+APP.CSI2.CLK_P
+Text GLabel 2600 2300 2    60   Input ~ 0
+APP.CSI2.CLK_N
+Wire Wire Line
+	2450 2900 2600 2900
+Wire Wire Line
+	2450 2600 2600 2600
+Wire Wire Line
+	2450 2500 2600 2500
+Wire Wire Line
+	2450 2300 2600 2300
+Wire Wire Line
+	2450 2200 2600 2200
+Wire Wire Line
+	2450 2000 2600 2000
+Wire Wire Line
+	2450 1900 2600 1900
+Wire Wire Line
+	2450 1700 2600 1700
+$Comp
+L power:GND #PWR0228
+U 1 1 662B5060
+P 2500 3000
+F 0 "#PWR0228" H 2500 2750 50  0001 C CNN
+F 1 "GND" H 2500 2850 50  0000 C CNN
+F 2 "" H 2500 3000 50  0001 C CNN
+F 3 "" H 2500 3000 50  0001 C CNN
+	1    2500 3000
+	1    0    0    -1  
+$EndComp
+Wire Wire Line
+	2500 2700 2500 3000
+Wire Wire Line
+	2600 2800 2450 2800
+Connection ~ 1900 2800
+Wire Wire Line
+	1900 2800 1900 2900
+Wire Wire Line
+	1900 2800 1950 2800
+Text GLabel 1800 2600 0    55   Output ~ 0
+ENABLE
+Text GLabel 1800 2700 0    55   Output ~ 0
+PRIV_LED_K
+Wire Wire Line
+	1800 2700 1950 2700
+Wire Wire Line
+	2450 1500 2500 1500
+Text GLabel 1800 1700 0    60   Output ~ 0
+APP.CSI.I2C4.SCL
+Text GLabel 2000 4150 0    60   Output ~ 0
+APP.CSI2.D3_P
+Text GLabel 2000 4250 0    60   Output ~ 0
+APP.CSI2.D3_N
+Text GLabel 2000 4450 0    60   Output ~ 0
+APP.CSI2.D2_P
+Text GLabel 2000 4550 0    60   Output ~ 0
+APP.CSI2.D2_N
+Text GLabel 2000 5050 0    60   Output ~ 0
+APP.CSI2.D1_P
+Text GLabel 2000 5150 0    60   Output ~ 0
+APP.CSI2.D1_N
+Text GLabel 2000 5350 0    60   Output ~ 0
+APP.CSI2.D0_P
+Text GLabel 2000 5450 0    60   Output ~ 0
+APP.CSI2.D0_N
+Text GLabel 2000 4750 0    60   Output ~ 0
+APP.CSI2.CLK_P
+Text GLabel 2000 4850 0    60   Output ~ 0
+APP.CSI2.CLK_N
+Wire Wire Line
+	2000 4150 2100 4150
+Wire Wire Line
+	2000 4250 2100 4250
+Wire Wire Line
+	2000 4450 2100 4450
+Wire Wire Line
+	2000 4550 2100 4550
+Wire Wire Line
+	2000 4750 2100 4750
+Wire Wire Line
+	2000 4850 2100 4850
+Wire Wire Line
+	2000 5050 2100 5050
+Wire Wire Line
+	2000 5150 2100 5150
+Wire Wire Line
+	2000 5350 2100 5350
+Wire Wire Line
+	2000 5450 2100 5450
+NoConn ~ 2100 4150
+NoConn ~ 2100 4250
+NoConn ~ 2100 4450
+NoConn ~ 2100 4550
+NoConn ~ 2100 4750
+NoConn ~ 2100 4850
+NoConn ~ 2100 5050
+NoConn ~ 2100 5150
+NoConn ~ 2100 5350
+NoConn ~ 2100 5450
+Text GLabel 2000 3650 0    60   BiDi ~ 0
+APP.CSI.GPIO_5
+Text GLabel 2000 3750 0    60   BiDi ~ 0
+APP.CSI.GPIO_6
+Text GLabel 2000 3950 0    60   BiDi ~ 0
+APP.CSI.I2C4.SDA
+Text GLabel 2000 3850 0    60   Input ~ 0
+APP.CSI.I2C4.SCL
+Wire Wire Line
+	2000 3750 2100 3750
+Wire Wire Line
+	2000 3650 2100 3650
+Wire Wire Line
+	2000 3850 2100 3850
+Wire Wire Line
+	2000 3950 2100 3950
+NoConn ~ 2100 3950
+NoConn ~ 2100 3850
+NoConn ~ 2100 3650
+NoConn ~ 2100 3750
+Text GLabel 4550 2100 0    55   Output ~ 0
+SPI1.SS3
+Text GLabel 4550 1900 0    55   Output ~ 0
+SPI1.SCK
+Text GLabel 4550 1800 0    55   Input ~ 0
+SPI1.MISO
+Text GLabel 4550 1700 0    55   Output ~ 0
+SPI1.MOSI
+Text GLabel 4550 2400 0    55   Output ~ 0
+I2C0.SCL
+Text GLabel 4550 2300 0    55   BiDi ~ 0
+I2C0.SDA
+$Comp
+L power:+3.3V #PWR?
+U 1 1 60922AA1
+P 4700 1400
+AR Path="/61A17BF3/60922AA1" Ref="#PWR?"  Part="1" 
+AR Path="/619DBCF0/60922AA1" Ref="#PWR0167"  Part="1" 
+AR Path="/6464C617/60922AA1" Ref="#PWR0167"  Part="1" 
+AR Path="/60922AA1" Ref="#PWR0102"  Part="1" 
+F 0 "#PWR0102" H 4700 1250 50  0001 C CNN
+F 1 "+3.3V" H 4700 1550 50  0000 C CNN
+F 2 "" H 4700 1400 50  0001 C CNN
+F 3 "" H 4700 1400 50  0001 C CNN
+	1    4700 1400
+	1    0    0    -1  
+$EndComp
+Text GLabel 4550 2600 0    55   3State ~ 0
+GPIO_23
+Text GLabel 4550 2700 0    55   Output ~ 0
+ENABLE
+Text GLabel 4550 2800 0    55   Output ~ 0
+PRIV_LED_K
+$Comp
+L Connector_Generic:Conn_01x14 J2
+U 1 1 685358A3
+P 4950 2100
+F 0 "J2" H 4900 2800 50  0000 L CNN
+F 1 "ArduCAM" H 4800 1300 50  0000 L CNN
+F 2 "Connector_FFC-FPC:Hirose_FH12-14S-0.5SH_1x14-1MP_P0.50mm_Horizontal" H 4950 2100 50  0001 C CNN
+F 3 "~" H 4950 2100 50  0001 C CNN
+	1    4950 2100
+	1    0    0    -1  
+$EndComp
+Wire Wire Line
+	4750 1700 4550 1700
+Wire Wire Line
+	4750 1800 4550 1800
+Wire Wire Line
+	4750 1900 4550 1900
+Wire Wire Line
+	4750 2100 4550 2100
+Wire Wire Line
+	4750 2300 4550 2300
+Wire Wire Line
+	4750 2400 4550 2400
+Wire Wire Line
+	4750 2600 4550 2600
+Wire Wire Line
+	4750 2700 4550 2700
+Wire Wire Line
+	4750 1500 4700 1500
+Wire Wire Line
+	4750 1600 4700 1600
+Wire Wire Line
+	4700 1600 4700 1500
+Wire Wire Line
+	4700 2000 4750 2000
+Wire Wire Line
+	4700 2000 4700 2200
+Wire Wire Line
+	4700 2200 4750 2200
+Wire Wire Line
+	4550 2800 4750 2800
+Wire Wire Line
+	4700 2200 4700 2500
+Wire Wire Line
+	4700 2500 4750 2500
+Connection ~ 4700 2200
+Wire Wire Line
+	4700 2500 4700 2900
+Connection ~ 4700 2500
+$Comp
+L power:GND #PWR0101
+U 1 1 686508D3
+P 4700 2900
+F 0 "#PWR0101" H 4700 2650 50  0001 C CNN
+F 1 "GND" H 4700 2750 50  0000 C CNN
+F 2 "" H 4700 2900 50  0001 C CNN
+F 3 "" H 4700 2900 50  0001 C CNN
+	1    4700 2900
+	1    0    0    -1  
+$EndComp
+Wire Wire Line
+	2500 1300 2500 1500
+Wire Wire Line
+	1900 1300 1900 1400
+Wire Wire Line
+	4700 1400 4700 1500
+Connection ~ 4700 1500
+$Comp
+L power:PWR_FLAG #FLG0101
+U 1 1 68508795
+P 1550 1300
+F 0 "#FLG0101" H 1550 1375 50  0001 C CNN
+F 1 "PWR_FLAG" H 1550 1450 50  0000 C CNN
+F 2 "" H 1550 1300 50  0001 C CNN
+F 3 "~" H 1550 1300 50  0001 C CNN
+	1    1550 1300
+	1    0    0    -1  
+$EndComp
+$Comp
+L power:PWR_FLAG #FLG0102
+U 1 1 68509784
+P 2850 1300
+F 0 "#FLG0102" H 2850 1375 50  0001 C CNN
+F 1 "PWR_FLAG" H 2850 1450 50  0000 C CNN
+F 2 "" H 2850 1300 50  0001 C CNN
+F 3 "~" H 2850 1300 50  0001 C CNN
+	1    2850 1300
+	1    0    0    -1  
+$EndComp
+$Comp
+L power:PWR_FLAG #FLG0103
+U 1 1 68509D43
+P 3400 1300
+F 0 "#FLG0103" H 3400 1375 50  0001 C CNN
+F 1 "PWR_FLAG" H 3400 1450 50  0000 C CNN
+F 2 "" H 3400 1300 50  0001 C CNN
+F 3 "~" H 3400 1300 50  0001 C CNN
+	1    3400 1300
+	1    0    0    -1  
+$EndComp
+Wire Wire Line
+	2500 1500 2850 1500
+Wire Wire Line
+	2850 1500 2850 1300
+Connection ~ 2500 1500
+Wire Wire Line
+	2500 1800 3400 1800
+Wire Wire Line
+	3400 1800 3400 1300
+Connection ~ 2500 1800
+Wire Wire Line
+	1550 1300 1550 1400
+Wire Wire Line
+	1550 1400 1900 1400
+Connection ~ 1900 1400
+Wire Wire Line
+	1900 1400 1900 2800
+$Comp
+L myConn:Spacer J3
+U 1 1 6851B3C1
+P 4700 3400
+F 0 "J3" H 4780 3442 50  0000 L CNN
+F 1 "Spacer" H 4780 3351 50  0000 L CNN
+F 2 "footprints:Spacer_small" H 4700 3400 50  0001 C CNN
+F 3 "~" H 4700 3400 50  0001 C CNN
+	1    4700 3400
+	1    0    0    -1  
+$EndComp
+$Comp
+L power:GND #PWR0103
+U 1 1 6851BA40
+P 4400 3500
+F 0 "#PWR0103" H 4400 3250 50  0001 C CNN
+F 1 "GND" H 4400 3350 50  0000 C CNN
+F 2 "" H 4400 3500 50  0001 C CNN
+F 3 "" H 4400 3500 50  0001 C CNN
+	1    4400 3500
+	1    0    0    -1  
+$EndComp
+Wire Wire Line
+	4500 3400 4400 3400
+Wire Wire Line
+	4400 3400 4400 3500
+$EndSCHEMATC
diff --git a/hw/cam2ac/fp-lib-table b/hw/cam2ac/fp-lib-table
new file mode 100644
index 0000000..2322dfd
--- /dev/null
+++ b/hw/cam2ac/fp-lib-table
@@ -0,0 +1,3 @@
+(fp_lib_table
+  (lib (name footprints)(type KiCad)(uri ${KIPRJMOD}/../footprints.pretty)(options "")(descr ""))
+)
diff --git a/hw/cam2ac/sym-lib-table b/hw/cam2ac/sym-lib-table
new file mode 100644
index 0000000..9da3cf7
--- /dev/null
+++ b/hw/cam2ac/sym-lib-table
@@ -0,0 +1,3 @@
+(sym_lib_table
+  (lib (name myConn)(type Legacy)(uri ${KIPRJMOD}/../library/myConn.lib)(options "")(descr ""))
+)