diff options
| author | Uros Majstorovic <majstor@majstor.org> | 2026-05-05 00:05:12 +0200 |
|---|---|---|
| committer | Uros Majstorovic <majstor@majstor.org> | 2026-05-05 00:05:12 +0200 |
| commit | c3c3e5f66fb24c584fefde1c0805e952d539ba9f (patch) | |
| tree | 804f42ba8ca1cc9792b140dec693a801f1d8c9f3 /hw/console | |
| parent | f4c5fb24507080506741b8ac2c6b027b401d02c8 (diff) | |
JLCPCB order W2025070409252353
Diffstat (limited to 'hw/console')
| -rw-r--r-- | hw/console/console.kicad_pcb | 1128 | ||||
| -rw-r--r-- | hw/console/console.pro | 259 | ||||
| -rw-r--r-- | hw/console/console.sch | 465 | ||||
| -rw-r--r-- | hw/console/fp-lib-table | 3 | ||||
| -rw-r--r-- | hw/console/sym-lib-table | 4 |
5 files changed, 1859 insertions, 0 deletions
diff --git a/hw/console/console.kicad_pcb b/hw/console/console.kicad_pcb new file mode 100644 index 0000000..2dac37c --- /dev/null +++ b/hw/console/console.kicad_pcb @@ -0,0 +1,1128 @@ +(kicad_pcb (version 20171130) (host pcbnew "(5.1.9-0-10_14)") + + (general + (thickness 1.6) + (drawings 4) + (tracks 128) + (zones 0) + (modules 13) + (nets 20) + ) + + (page A4) + (layers + (0 F.Cu signal) + (1 GND power) + (2 PWR power) + (31 B.Cu signal) + (32 B.Adhes user) + (33 F.Adhes user) + (34 B.Paste user) + (35 F.Paste user) + (36 B.SilkS user hide) + (37 F.SilkS user hide) + (38 B.Mask user) + (39 F.Mask user) + (40 Dwgs.User user) + (41 Cmts.User user) + (42 Eco1.User user) + (43 Eco2.User user) + (44 Edge.Cuts user) + (45 Margin user) + (46 B.CrtYd user) + (47 F.CrtYd user) + (48 B.Fab user hide) + (49 F.Fab user hide) + ) + + (setup + (last_trace_width 0.2) + (trace_clearance 0.2) + (zone_clearance 0.2032) + (zone_45_only no) + (trace_min 0.2) + (via_size 0.6) + (via_drill 0.3) + (via_min_size 0.4) + (via_min_drill 0.3) + (uvia_size 0.3) + (uvia_drill 0.1) + (uvias_allowed no) + (uvia_min_size 0.2) + (uvia_min_drill 0.1) + (edge_width 0.05) + (segment_width 0.2) + (pcb_text_width 0.3) + (pcb_text_size 1.5 1.5) + (mod_edge_width 0.12) + (mod_text_size 1 1) + (mod_text_width 0.15) + (pad_size 1.524 1.524) + (pad_drill 0.762) + (pad_to_mask_clearance 0) + (aux_axis_origin 0 0) + (visible_elements FFFFF77F) + (pcbplotparams + (layerselection 0x010f0_ffffffff) + (usegerberextensions true) + (usegerberattributes false) + (usegerberadvancedattributes false) + (creategerberjobfile false) + (excludeedgelayer true) + (linewidth 0.100000) + (plotframeref false) + (viasonmask false) + (mode 1) + (useauxorigin false) + (hpglpennumber 1) + (hpglpenspeed 20) + (hpglpendiameter 15.000000) + (psnegative false) + (psa4output false) + (plotreference true) + (plotvalue true) + (plotinvisibletext false) + (padsonsilk false) + (subtractmaskfromsilk true) + (outputformat 1) + (mirror false) + (drillshape 0) + (scaleselection 1) + (outputdirectory "fab/")) + ) + + (net 0 "") + (net 1 +3V3) + (net 2 GND) + (net 3 +1V8) + (net 4 "Net-(D1-Pad2)") + (net 5 "Net-(D1-Pad4)") + (net 6 /USB_D-) + (net 7 /USB_D+) + (net 8 "Net-(J1-Pad4)") + (net 9 "Net-(J1-Pad6)") + (net 10 /APP_TX) + (net 11 /APP_RX) + (net 12 "Net-(R1-Pad2)") + (net 13 "Net-(R2-Pad2)") + (net 14 "Net-(U1-Pad5)") + (net 15 "Net-(U1-Pad11)") + (net 16 "Net-(U1-Pad12)") + (net 17 "Net-(U1-Pad14)") + (net 18 "Net-(U1-Pad16)") + (net 19 /VBUS) + + (net_class Default "This is the default net class." + (clearance 0.2) + (trace_width 0.2) + (via_dia 0.6) + (via_drill 0.3) + (uvia_dia 0.3) + (uvia_drill 0.1) + (add_net /APP_RX) + (add_net /APP_TX) + (add_net /USB_D+) + (add_net /USB_D-) + (add_net "Net-(D1-Pad2)") + (add_net "Net-(D1-Pad4)") + (add_net "Net-(J1-Pad4)") + (add_net "Net-(J1-Pad6)") + (add_net "Net-(R1-Pad2)") + (add_net "Net-(R2-Pad2)") + (add_net "Net-(U1-Pad11)") + (add_net "Net-(U1-Pad12)") + (add_net "Net-(U1-Pad14)") + (add_net "Net-(U1-Pad16)") + (add_net "Net-(U1-Pad5)") + ) + + (net_class PWR "" + (clearance 0.2) + (trace_width 0.25) + (via_dia 0.6) + (via_drill 0.3) + (uvia_dia 0.3) + (uvia_drill 0.1) + (add_net +1V8) + (add_net +3V3) + (add_net /VBUS) + (add_net GND) + ) + + (module Capacitor_SMD:C_0603_1608Metric (layer B.Cu) (tedit 5F68FEEE) (tstamp 65CE72B9) + (at 122.2 62.1) + (descr "Capacitor SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: IPC-SM-782 page 76, https://www.pcb-3d.com/wordpress/wp-content/uploads/ipc-sm-782a_amendment_1_and_2.pdf), generated with kicad-footprint-generator") + (tags capacitor) + (path /65E68D8D) + (attr smd) + (fp_text reference C1 (at 0 1.43) (layer B.SilkS) + (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) + ) + (fp_text value 0.1uF (at 0 -1.43) (layer B.Fab) + (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) + ) + (fp_line (start 1.48 -0.73) (end -1.48 -0.73) (layer B.CrtYd) (width 0.05)) + (fp_line (start 1.48 0.73) (end 1.48 -0.73) (layer B.CrtYd) (width 0.05)) + (fp_line (start -1.48 0.73) (end 1.48 0.73) (layer B.CrtYd) (width 0.05)) + (fp_line (start -1.48 -0.73) (end -1.48 0.73) (layer B.CrtYd) (width 0.05)) + (fp_line (start -0.14058 -0.51) (end 0.14058 -0.51) (layer B.SilkS) (width 0.12)) + (fp_line (start -0.14058 0.51) (end 0.14058 0.51) (layer B.SilkS) (width 0.12)) + (fp_line (start 0.8 -0.4) (end -0.8 -0.4) (layer B.Fab) (width 0.1)) + (fp_line (start 0.8 0.4) (end 0.8 -0.4) (layer B.Fab) (width 0.1)) + (fp_line (start -0.8 0.4) (end 0.8 0.4) (layer B.Fab) (width 0.1)) + (fp_line (start -0.8 -0.4) (end -0.8 0.4) (layer B.Fab) (width 0.1)) + (fp_text user %R (at 0 0) (layer B.Fab) + (effects (font (size 0.4 0.4) (thickness 0.06)) (justify mirror)) + ) + (pad 1 smd roundrect (at -0.775 0) (size 0.9 0.95) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25) + (net 1 +3V3)) + (pad 2 smd roundrect (at 0.775 0) (size 0.9 0.95) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25) + (net 2 GND)) + (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Capacitor_SMD:C_0603_1608Metric (layer B.Cu) (tedit 5F68FEEE) (tstamp 65CE72CA) + (at 120.2 64.5 270) + (descr "Capacitor SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: IPC-SM-782 page 76, https://www.pcb-3d.com/wordpress/wp-content/uploads/ipc-sm-782a_amendment_1_and_2.pdf), generated with kicad-footprint-generator") + (tags capacitor) + (path /65E6961F) + (attr smd) + (fp_text reference C2 (at -2.5 0.075 270) (layer B.SilkS) + (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) + ) + (fp_text value 0.1uF (at 0 -1.43 270) (layer B.Fab) + (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) + ) + (fp_line (start 1.48 -0.73) (end -1.48 -0.73) (layer B.CrtYd) (width 0.05)) + (fp_line (start 1.48 0.73) (end 1.48 -0.73) (layer B.CrtYd) (width 0.05)) + (fp_line (start -1.48 0.73) (end 1.48 0.73) (layer B.CrtYd) (width 0.05)) + (fp_line (start -1.48 -0.73) (end -1.48 0.73) (layer B.CrtYd) (width 0.05)) + (fp_line (start -0.14058 -0.51) (end 0.14058 -0.51) (layer B.SilkS) (width 0.12)) + (fp_line (start -0.14058 0.51) (end 0.14058 0.51) (layer B.SilkS) (width 0.12)) + (fp_line (start 0.8 -0.4) (end -0.8 -0.4) (layer B.Fab) (width 0.1)) + (fp_line (start 0.8 0.4) (end 0.8 -0.4) (layer B.Fab) (width 0.1)) + (fp_line (start -0.8 0.4) (end 0.8 0.4) (layer B.Fab) (width 0.1)) + (fp_line (start -0.8 -0.4) (end -0.8 0.4) (layer B.Fab) (width 0.1)) + (fp_text user %R (at 0 0 270) (layer B.Fab) + (effects (font (size 0.4 0.4) (thickness 0.06)) (justify mirror)) + ) + (pad 1 smd roundrect (at -0.775 0 270) (size 0.9 0.95) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25) + (net 19 /VBUS)) + (pad 2 smd roundrect (at 0.775 0 270) (size 0.9 0.95) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25) + (net 2 GND)) + (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Capacitor_SMD:C_0603_1608Metric (layer B.Cu) (tedit 5F68FEEE) (tstamp 65CE72DB) + (at 123.25 65.05 180) + (descr "Capacitor SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: IPC-SM-782 page 76, https://www.pcb-3d.com/wordpress/wp-content/uploads/ipc-sm-782a_amendment_1_and_2.pdf), generated with kicad-footprint-generator") + (tags capacitor) + (path /65E6938C) + (attr smd) + (fp_text reference C3 (at 0 -1.45 180) (layer B.SilkS) + (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) + ) + (fp_text value 0.1uF (at 0 -1.43 180) (layer B.Fab) + (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) + ) + (fp_line (start -0.8 -0.4) (end -0.8 0.4) (layer B.Fab) (width 0.1)) + (fp_line (start -0.8 0.4) (end 0.8 0.4) (layer B.Fab) (width 0.1)) + (fp_line (start 0.8 0.4) (end 0.8 -0.4) (layer B.Fab) (width 0.1)) + (fp_line (start 0.8 -0.4) (end -0.8 -0.4) (layer B.Fab) (width 0.1)) + (fp_line (start -0.14058 0.51) (end 0.14058 0.51) (layer B.SilkS) (width 0.12)) + (fp_line (start -0.14058 -0.51) (end 0.14058 -0.51) (layer B.SilkS) (width 0.12)) + (fp_line (start -1.48 -0.73) (end -1.48 0.73) (layer B.CrtYd) (width 0.05)) + (fp_line (start -1.48 0.73) (end 1.48 0.73) (layer B.CrtYd) (width 0.05)) + (fp_line (start 1.48 0.73) (end 1.48 -0.73) (layer B.CrtYd) (width 0.05)) + (fp_line (start 1.48 -0.73) (end -1.48 -0.73) (layer B.CrtYd) (width 0.05)) + (fp_text user %R (at 0 0 180) (layer B.Fab) + (effects (font (size 0.4 0.4) (thickness 0.06)) (justify mirror)) + ) + (pad 2 smd roundrect (at 0.775 0 180) (size 0.9 0.95) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25) + (net 2 GND)) + (pad 1 smd roundrect (at -0.775 0 180) (size 0.9 0.95) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25) + (net 3 +1V8)) + (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Capacitor_SMD:C_0603_1608Metric (layer F.Cu) (tedit 5F68FEEE) (tstamp 65CE72EC) + (at 117.2 65.95 270) + (descr "Capacitor SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: IPC-SM-782 page 76, https://www.pcb-3d.com/wordpress/wp-content/uploads/ipc-sm-782a_amendment_1_and_2.pdf), generated with kicad-footprint-generator") + (tags capacitor) + (path /65CE693C) + (attr smd) + (fp_text reference C4 (at 0 -1.43 270) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 0.1uF (at 0 1.43 270) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_line (start 0.8 -0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start 0.8 0.4) (end -0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -0.14058 -0.51) (end 0.14058 -0.51) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.14058 0.51) (end 0.14058 0.51) (layer F.SilkS) (width 0.12)) + (fp_line (start -1.48 0.73) (end -1.48 -0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.48 -0.73) (end 1.48 -0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.48 -0.73) (end 1.48 0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.48 0.73) (end -1.48 0.73) (layer F.CrtYd) (width 0.05)) + (fp_text user %R (at 0 0 270) (layer F.Fab) + (effects (font (size 0.4 0.4) (thickness 0.06))) + ) + (pad 2 smd roundrect (at 0.775 0 270) (size 0.9 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 2 GND)) + (pad 1 smd roundrect (at -0.775 0 270) (size 0.9 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 3 +1V8)) + (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module footprints:ROHM_SML-522MU8WT86 (layer F.Cu) (tedit 6509DA2F) (tstamp 65D376A3) + (at 117.2 61.95 90) + (path /65E6846F) + (fp_text reference D1 (at 0 1.65 90) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value TXD_RXD (at 0 1.65 90) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start -0.75 0.65) (end 0.75 0.65) (layer F.Fab) (width 0.1)) + (fp_line (start 1.45 0.9) (end 1.45 -0.9) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.45 0.9) (end -1.45 0.9) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.3 0.85) (end 1.3 0.85) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.75 -0.65) (end -0.75 0.65) (layer F.Fab) (width 0.1)) + (fp_line (start -1.4 -0.85) (end 1.3 -0.85) (layer F.SilkS) (width 0.12)) + (fp_line (start -1.4 -0.85) (end -1.4 -0.4) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.75 0.65) (end 0.75 -0.65) (layer F.Fab) (width 0.1)) + (fp_line (start 0.75 -0.65) (end -0.75 -0.65) (layer F.Fab) (width 0.1)) + (fp_line (start -0.75 -0.15) (end -0.25 -0.65) (layer F.Fab) (width 0.1)) + (fp_line (start -1.45 -0.9) (end 1.45 -0.9) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.45 -0.9) (end -1.45 0.9) (layer F.CrtYd) (width 0.05)) + (pad 2 smd rect (at -0.75 -0.45 90) (size 0.9 0.4) (layers F.Cu F.Paste F.Mask) + (net 4 "Net-(D1-Pad2)")) + (pad 1 smd rect (at 0.75 -0.45 90) (size 0.9 0.4) (layers F.Cu F.Paste F.Mask) + (net 1 +3V3)) + (pad 4 smd rect (at -0.75 0.45 90) (size 0.9 0.4) (layers F.Cu F.Paste F.Mask) + (net 5 "Net-(D1-Pad4)")) + (pad 3 smd rect (at 0.75 0.45 90) (size 0.9 0.4) (layers F.Cu F.Paste F.Mask) + (net 1 +3V3)) + ) + + (module footprints:GCT_MicroUSB-USB3080-30-00-A (layer B.Cu) (tedit 6512222A) (tstamp 65CE7314) + (at 120.65 59.05) + (descr "Micro USB Type B Receptacle") + (tags "USB USB_B USB_micro USB_OTG") + (path /65E69BA0) + (attr smd) + (fp_text reference J1 (at 3.75 1.85) (layer B.SilkS) + (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) + ) + (fp_text value USB_B_Micro (at 0 -4.9) (layer B.Fab) + (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) + ) + (fp_line (start -4.35 -4) (end -4.35 1.03754) (layer B.SilkS) (width 0.15)) + (fp_line (start 4.35 1.03754) (end 4.35 -4) (layer B.SilkS) (width 0.15)) + (fp_line (start -4.35 1.03754) (end 4.35 1.03754) (layer B.SilkS) (width 0.15)) + (fp_line (start -4.5991 -4.13) (end -4.5991 1.25) (layer B.CrtYd) (width 0.05)) + (fp_line (start 4.6009 -4.13) (end -4.5991 -4.13) (layer B.CrtYd) (width 0.05)) + (fp_line (start 4.6009 1.25) (end 4.6009 -4.13) (layer B.CrtYd) (width 0.05)) + (fp_line (start -4.5991 1.25) (end 4.6009 1.25) (layer B.CrtYd) (width 0.05)) + (pad 1 smd rect (at -1.3 0.01254 270) (size 1.35 0.4) (layers B.Cu B.Paste B.Mask) + (net 19 /VBUS)) + (pad 2 smd rect (at -0.65 0.01254 270) (size 1.35 0.4) (layers B.Cu B.Paste B.Mask) + (net 6 /USB_D-)) + (pad 3 smd rect (at 0 0.01254 270) (size 1.35 0.4) (layers B.Cu B.Paste B.Mask) + (net 7 /USB_D+)) + (pad 4 smd rect (at 0.65 0.01254 270) (size 1.35 0.4) (layers B.Cu B.Paste B.Mask) + (net 8 "Net-(J1-Pad4)")) + (pad 5 smd rect (at 1.3 0.01254 270) (size 1.35 0.4) (layers B.Cu B.Paste B.Mask) + (net 2 GND)) + (pad 6 thru_hole oval (at -2.825 -2.68 270) (size 2.15 1.05) (drill oval 1.55 0.45) (layers *.Cu *.Mask) + (net 9 "Net-(J1-Pad6)")) + (pad 6 thru_hole oval (at 2.825 -2.68 270) (size 2.15 1.05) (drill oval 1.55 0.45) (layers *.Cu *.Mask) + (net 9 "Net-(J1-Pad6)")) + (pad 6 smd rect (at -1.1 -2.68) (size 1.8 1.8) (layers B.Cu B.Paste B.Mask) + (net 9 "Net-(J1-Pad6)")) + (pad 6 smd rect (at 1.1 -2.68) (size 1.8 1.8) (layers B.Cu B.Paste B.Mask) + (net 9 "Net-(J1-Pad6)")) + ) + + (module Connector_PinHeader_1.27mm:PinHeader_1x04_P1.27mm_Vertical (layer B.Cu) (tedit 59FED6E3) (tstamp 65CE732E) + (at 120.35 68.8 270) + (descr "Through hole straight pin header, 1x04, 1.27mm pitch, single row") + (tags "Through hole pin header THT 1x04 1.27mm single row") + (path /65DECD92) + (fp_text reference J2 (at -2.15 0.25) (layer B.SilkS) + (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) + ) + (fp_text value Console (at 0 -5.505 270) (layer B.Fab) + (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) + ) + (fp_line (start 1.55 1.15) (end -1.55 1.15) (layer B.CrtYd) (width 0.05)) + (fp_line (start 1.55 -4.95) (end 1.55 1.15) (layer B.CrtYd) (width 0.05)) + (fp_line (start -1.55 -4.95) (end 1.55 -4.95) (layer B.CrtYd) (width 0.05)) + (fp_line (start -1.55 1.15) (end -1.55 -4.95) (layer B.CrtYd) (width 0.05)) + (fp_line (start -1.11 0.76) (end 0 0.76) (layer B.SilkS) (width 0.12)) + (fp_line (start -1.11 0) (end -1.11 0.76) (layer B.SilkS) (width 0.12)) + (fp_line (start 0.563471 -0.76) (end 1.11 -0.76) (layer B.SilkS) (width 0.12)) + (fp_line (start -1.11 -0.76) (end -0.563471 -0.76) (layer B.SilkS) (width 0.12)) + (fp_line (start 1.11 -0.76) (end 1.11 -4.505) (layer B.SilkS) (width 0.12)) + (fp_line (start -1.11 -0.76) (end -1.11 -4.505) (layer B.SilkS) (width 0.12)) + (fp_line (start 0.30753 -4.505) (end 1.11 -4.505) (layer B.SilkS) (width 0.12)) + (fp_line (start -1.11 -4.505) (end -0.30753 -4.505) (layer B.SilkS) (width 0.12)) + (fp_line (start -1.05 0.11) (end -0.525 0.635) (layer B.Fab) (width 0.1)) + (fp_line (start -1.05 -4.445) (end -1.05 0.11) (layer B.Fab) (width 0.1)) + (fp_line (start 1.05 -4.445) (end -1.05 -4.445) (layer B.Fab) (width 0.1)) + (fp_line (start 1.05 0.635) (end 1.05 -4.445) (layer B.Fab) (width 0.1)) + (fp_line (start -0.525 0.635) (end 1.05 0.635) (layer B.Fab) (width 0.1)) + (fp_text user %R (at 0 -1.905) (layer B.Fab) + (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) + ) + (pad 1 thru_hole rect (at 0 0 270) (size 1 1) (drill 0.65) (layers *.Cu *.Mask) + (net 3 +1V8)) + (pad 2 thru_hole oval (at 0 -1.27 270) (size 1 1) (drill 0.65) (layers *.Cu *.Mask) + (net 10 /APP_TX)) + (pad 3 thru_hole oval (at 0 -2.54 270) (size 1 1) (drill 0.65) (layers *.Cu *.Mask) + (net 11 /APP_RX)) + (pad 4 thru_hole oval (at 0 -3.81 270) (size 1 1) (drill 0.65) (layers *.Cu *.Mask) + (net 2 GND)) + (model ${KISYS3DMOD}/Connector_PinHeader_1.27mm.3dshapes/PinHeader_1x04_P1.27mm_Vertical.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Resistor_SMD:R_0603_1608Metric (layer B.Cu) (tedit 5F68FEEE) (tstamp 65CE733F) + (at 118.2 62.85 270) + (descr "Resistor SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: IPC-SM-782 page 72, https://www.pcb-3d.com/wordpress/wp-content/uploads/ipc-sm-782a_amendment_1_and_2.pdf), generated with kicad-footprint-generator") + (tags resistor) + (path /65CE0544) + (attr smd) + (fp_text reference R1 (at -2 0) (layer B.SilkS) + (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) + ) + (fp_text value 260R (at 0 -1.43 270) (layer B.Fab) + (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) + ) + (fp_line (start -0.8 -0.4125) (end -0.8 0.4125) (layer B.Fab) (width 0.1)) + (fp_line (start -0.8 0.4125) (end 0.8 0.4125) (layer B.Fab) (width 0.1)) + (fp_line (start 0.8 0.4125) (end 0.8 -0.4125) (layer B.Fab) (width 0.1)) + (fp_line (start 0.8 -0.4125) (end -0.8 -0.4125) (layer B.Fab) (width 0.1)) + (fp_line (start -0.237258 0.5225) (end 0.237258 0.5225) (layer B.SilkS) (width 0.12)) + (fp_line (start -0.237258 -0.5225) (end 0.237258 -0.5225) (layer B.SilkS) (width 0.12)) + (fp_line (start -1.48 -0.73) (end -1.48 0.73) (layer B.CrtYd) (width 0.05)) + (fp_line (start -1.48 0.73) (end 1.48 0.73) (layer B.CrtYd) (width 0.05)) + (fp_line (start 1.48 0.73) (end 1.48 -0.73) (layer B.CrtYd) (width 0.05)) + (fp_line (start 1.48 -0.73) (end -1.48 -0.73) (layer B.CrtYd) (width 0.05)) + (fp_text user %R (at 0 0 270) (layer B.Fab) + (effects (font (size 0.4 0.4) (thickness 0.06)) (justify mirror)) + ) + (pad 2 smd roundrect (at 0.825 0 270) (size 0.8 0.95) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25) + (net 12 "Net-(R1-Pad2)")) + (pad 1 smd roundrect (at -0.825 0 270) (size 0.8 0.95) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25) + (net 5 "Net-(D1-Pad4)")) + (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Resistor_SMD:R_0603_1608Metric (layer B.Cu) (tedit 5F68FEEE) (tstamp 65CE7350) + (at 116.2 62.85 270) + (descr "Resistor SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: IPC-SM-782 page 72, https://www.pcb-3d.com/wordpress/wp-content/uploads/ipc-sm-782a_amendment_1_and_2.pdf), generated with kicad-footprint-generator") + (tags resistor) + (path /65CE02DA) + (attr smd) + (fp_text reference R2 (at -2 0) (layer B.SilkS) + (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) + ) + (fp_text value 260R (at 0 -1.43 270) (layer B.Fab) + (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) + ) + (fp_line (start 1.48 -0.73) (end -1.48 -0.73) (layer B.CrtYd) (width 0.05)) + (fp_line (start 1.48 0.73) (end 1.48 -0.73) (layer B.CrtYd) (width 0.05)) + (fp_line (start -1.48 0.73) (end 1.48 0.73) (layer B.CrtYd) (width 0.05)) + (fp_line (start -1.48 -0.73) (end -1.48 0.73) (layer B.CrtYd) (width 0.05)) + (fp_line (start -0.237258 -0.5225) (end 0.237258 -0.5225) (layer B.SilkS) (width 0.12)) + (fp_line (start -0.237258 0.5225) (end 0.237258 0.5225) (layer B.SilkS) (width 0.12)) + (fp_line (start 0.8 -0.4125) (end -0.8 -0.4125) (layer B.Fab) (width 0.1)) + (fp_line (start 0.8 0.4125) (end 0.8 -0.4125) (layer B.Fab) (width 0.1)) + (fp_line (start -0.8 0.4125) (end 0.8 0.4125) (layer B.Fab) (width 0.1)) + (fp_line (start -0.8 -0.4125) (end -0.8 0.4125) (layer B.Fab) (width 0.1)) + (fp_text user %R (at 0 0 270) (layer B.Fab) + (effects (font (size 0.4 0.4) (thickness 0.06)) (justify mirror)) + ) + (pad 1 smd roundrect (at -0.825 0 270) (size 0.8 0.95) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25) + (net 4 "Net-(D1-Pad2)")) + (pad 2 smd roundrect (at 0.825 0 270) (size 0.8 0.95) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25) + (net 13 "Net-(R2-Pad2)")) + (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0603_1608Metric.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Package_DFN_QFN:QFN-16-1EP_4x4mm_P0.65mm_EP2.1x2.1mm (layer F.Cu) (tedit 5DC5F6A3) (tstamp 65CE737A) + (at 122.1 64.05 180) + (descr "QFN, 16 Pin (http://www.thatcorp.com/datashts/THAT_1580_Datasheet.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py") + (tags "QFN NoLead") + (path /65DE5CE9) + (attr smd) + (fp_text reference U1 (at -1.65 3.25) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value FT230XQ (at 0 3.32) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start 2.62 -2.62) (end -2.62 -2.62) (layer F.CrtYd) (width 0.05)) + (fp_line (start 2.62 2.62) (end 2.62 -2.62) (layer F.CrtYd) (width 0.05)) + (fp_line (start -2.62 2.62) (end 2.62 2.62) (layer F.CrtYd) (width 0.05)) + (fp_line (start -2.62 -2.62) (end -2.62 2.62) (layer F.CrtYd) (width 0.05)) + (fp_line (start -2 -1) (end -1 -2) (layer F.Fab) (width 0.1)) + (fp_line (start -2 2) (end -2 -1) (layer F.Fab) (width 0.1)) + (fp_line (start 2 2) (end -2 2) (layer F.Fab) (width 0.1)) + (fp_line (start 2 -2) (end 2 2) (layer F.Fab) (width 0.1)) + (fp_line (start -1 -2) (end 2 -2) (layer F.Fab) (width 0.1)) + (fp_line (start -1.385 -2.11) (end -2.11 -2.11) (layer F.SilkS) (width 0.12)) + (fp_line (start 2.11 2.11) (end 2.11 1.385) (layer F.SilkS) (width 0.12)) + (fp_line (start 1.385 2.11) (end 2.11 2.11) (layer F.SilkS) (width 0.12)) + (fp_line (start -2.11 2.11) (end -2.11 1.385) (layer F.SilkS) (width 0.12)) + (fp_line (start -1.385 2.11) (end -2.11 2.11) (layer F.SilkS) (width 0.12)) + (fp_line (start 2.11 -2.11) (end 2.11 -1.385) (layer F.SilkS) (width 0.12)) + (fp_line (start 1.385 -2.11) (end 2.11 -2.11) (layer F.SilkS) (width 0.12)) + (fp_text user %R (at 0 0) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (pad 1 smd roundrect (at -1.95 -0.975 180) (size 0.85 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 3 +1V8)) + (pad 2 smd roundrect (at -1.95 -0.325 180) (size 0.85 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 10 /APP_TX)) + (pad 3 smd roundrect (at -1.95 0.325 180) (size 0.85 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 2 GND)) + (pad 4 smd roundrect (at -1.95 0.975 180) (size 0.85 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 2 GND)) + (pad 5 smd roundrect (at -0.975 1.95 180) (size 0.3 0.85) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 14 "Net-(U1-Pad5)")) + (pad 6 smd roundrect (at -0.325 1.95 180) (size 0.3 0.85) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 7 /USB_D+)) + (pad 7 smd roundrect (at 0.325 1.95 180) (size 0.3 0.85) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 6 /USB_D-)) + (pad 8 smd roundrect (at 0.975 1.95 180) (size 0.3 0.85) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 1 +3V3)) + (pad 9 smd roundrect (at 1.95 0.975 180) (size 0.85 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 1 +3V3)) + (pad 10 smd roundrect (at 1.95 0.325 180) (size 0.85 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 19 /VBUS)) + (pad 11 smd roundrect (at 1.95 -0.325 180) (size 0.85 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 15 "Net-(U1-Pad11)")) + (pad 12 smd roundrect (at 1.95 -0.975 180) (size 0.85 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 16 "Net-(U1-Pad12)")) + (pad 13 smd roundrect (at 0.975 -1.95 180) (size 0.3 0.85) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 2 GND)) + (pad 14 smd roundrect (at 0.325 -1.95 180) (size 0.3 0.85) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 17 "Net-(U1-Pad14)")) + (pad 15 smd roundrect (at -0.325 -1.95 180) (size 0.3 0.85) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 11 /APP_RX)) + (pad 16 smd roundrect (at -0.975 -1.95 180) (size 0.3 0.85) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 18 "Net-(U1-Pad16)")) + (pad 17 smd rect (at 0 0 180) (size 2.1 2.1) (layers F.Cu F.Mask) + (net 2 GND)) + (pad "" smd roundrect (at -0.525 -0.525 180) (size 0.85 0.85) (layers F.Paste) (roundrect_rratio 0.25)) + (pad "" smd roundrect (at -0.525 0.525 180) (size 0.85 0.85) (layers F.Paste) (roundrect_rratio 0.25)) + (pad "" smd roundrect (at 0.525 -0.525 180) (size 0.85 0.85) (layers F.Paste) (roundrect_rratio 0.25)) + (pad "" smd roundrect (at 0.525 0.525 180) (size 0.85 0.85) (layers F.Paste) (roundrect_rratio 0.25)) + (model ${KISYS3DMOD}/Package_DFN_QFN.3dshapes/QFN-16-1EP_4x4mm_P0.65mm_EP2.1x2.1mm.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Package_TO_SOT_SMD:Texas_R-PDSO-G6 (layer B.Cu) (tedit 5A02FF57) (tstamp 65CE7390) + (at 117.2 65.95 90) + (descr "R-PDSO-G6, http://www.ti.com/lit/ds/slis144b/slis144b.pdf") + (tags "R-PDSO-G6 SC-70-6") + (path /65CDF8DA) + (attr smd) + (fp_text reference U2 (at -2.3 0 180) (layer B.SilkS) + (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) + ) + (fp_text value SN74LVC2G07DCK (at 0 -2 90) (layer B.Fab) + (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) + ) + (fp_line (start -0.175 1.1) (end -0.675 0.6) (layer B.Fab) (width 0.1)) + (fp_line (start 0.675 -1.1) (end -0.675 -1.1) (layer B.Fab) (width 0.1)) + (fp_line (start 0.675 1.1) (end 0.675 -1.1) (layer B.Fab) (width 0.1)) + (fp_line (start -1.6 -1.4) (end 1.6 -1.4) (layer B.CrtYd) (width 0.05)) + (fp_line (start -0.675 0.6) (end -0.675 -1.1) (layer B.Fab) (width 0.1)) + (fp_line (start 0.675 1.1) (end -0.175 1.1) (layer B.Fab) (width 0.1)) + (fp_line (start -1.6 1.4) (end 1.6 1.4) (layer B.CrtYd) (width 0.05)) + (fp_line (start -1.6 1.4) (end -1.6 -1.4) (layer B.CrtYd) (width 0.05)) + (fp_line (start 1.6 -1.4) (end 1.6 1.4) (layer B.CrtYd) (width 0.05)) + (fp_line (start -0.7 -1.16) (end 0.7 -1.16) (layer B.SilkS) (width 0.12)) + (fp_line (start 0.7 1.16) (end -1.2 1.16) (layer B.SilkS) (width 0.12)) + (fp_text user %R (at 0 0 180) (layer B.Fab) + (effects (font (size 0.5 0.5) (thickness 0.075)) (justify mirror)) + ) + (pad 1 smd rect (at -1.1 0.65 90) (size 0.9 0.4) (layers B.Cu B.Paste B.Mask) + (net 15 "Net-(U1-Pad11)")) + (pad 3 smd rect (at -1.1 -0.65 90) (size 0.9 0.4) (layers B.Cu B.Paste B.Mask) + (net 14 "Net-(U1-Pad5)")) + (pad 5 smd rect (at 1.1 0 90) (size 0.9 0.4) (layers B.Cu B.Paste B.Mask) + (net 3 +1V8)) + (pad 2 smd rect (at -1.1 0 90) (size 0.9 0.4) (layers B.Cu B.Paste B.Mask) + (net 2 GND)) + (pad 4 smd rect (at 1.1 -0.65 90) (size 0.9 0.4) (layers B.Cu B.Paste B.Mask) + (net 13 "Net-(R2-Pad2)")) + (pad 6 smd rect (at 1.1 0.65 90) (size 0.9 0.4) (layers B.Cu B.Paste B.Mask) + (net 12 "Net-(R1-Pad2)")) + (model ${KISYS3DMOD}/Package_TO_SOT_SMD.3dshapes/SOT-363_SC-70-6.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Capacitor_SMD:C_0603_1608Metric (layer F.Cu) (tedit 5F68FEEE) (tstamp 65D42ABF) + (at 116.9 59.1 180) + (descr "Capacitor SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: IPC-SM-782 page 76, https://www.pcb-3d.com/wordpress/wp-content/uploads/ipc-sm-782a_amendment_1_and_2.pdf), generated with kicad-footprint-generator") + (tags capacitor) + (path /65E496B2) + (attr smd) + (fp_text reference C5 (at 0.625 1.35) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 4.7uF (at 0 1.43) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1)) + (fp_line (start 0.8 -0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start 0.8 0.4) (end -0.8 0.4) (layer F.Fab) (width 0.1)) + (fp_line (start -0.14058 -0.51) (end 0.14058 -0.51) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.14058 0.51) (end 0.14058 0.51) (layer F.SilkS) (width 0.12)) + (fp_line (start -1.48 0.73) (end -1.48 -0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.48 -0.73) (end 1.48 -0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.48 -0.73) (end 1.48 0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.48 0.73) (end -1.48 0.73) (layer F.CrtYd) (width 0.05)) + (fp_text user %R (at 0 0) (layer F.Fab) + (effects (font (size 0.4 0.4) (thickness 0.06))) + ) + (pad 1 smd roundrect (at -0.775 0 180) (size 0.9 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 19 /VBUS)) + (pad 2 smd roundrect (at 0.775 0 180) (size 0.9 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 2 GND)) + (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0603_1608Metric.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Capacitor_SMD:C_0603_1608Metric (layer F.Cu) (tedit 5F68FEEE) (tstamp 65D42AD0) + (at 120.95 67.45) + (descr "Capacitor SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: IPC-SM-782 page 76, https://www.pcb-3d.com/wordpress/wp-content/uploads/ipc-sm-782a_amendment_1_and_2.pdf), generated with kicad-footprint-generator") + (tags capacitor) + (path /65E4D597) + (attr smd) + (fp_text reference C6 (at 2.4 0) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 1uF (at 0 1.43) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start 1.48 0.73) (end -1.48 0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.48 -0.73) (end 1.48 0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.48 -0.73) (end 1.48 -0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.48 0.73) (end -1.48 -0.73) (layer F.CrtYd) (width 0.05)) + (fp_line (start -0.14058 0.51) (end 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58.564034) (xy 118.264463 58.630221) (xy 118.180221 58.714463) (xy 118.114034 58.81352) + (xy 118.068442 58.923586) (xy 118.0452 59.040432) (xy 115.6548 59.040432) (xy 115.6548 55.2548) (xy 117.215384 55.2548) + ) + ) + ) +) diff --git a/hw/console/console.pro b/hw/console/console.pro new file mode 100644 index 0000000..a69418e --- /dev/null +++ b/hw/console/console.pro @@ -0,0 +1,259 @@ +update=Monday, February 19, 2024 at 05:39:39 PM +version=1 +last_client=kicad +[general] +version=1 +RootSch= +BoardNm= +[cvpcb] +version=1 +NetIExt=net +[eeschema] +version=1 +LibDir= +[eeschema/libraries] +[schematic_editor] +version=1 +PageLayoutDescrFile= +PlotDirectoryName= +SubpartIdSeparator=0 +SubpartFirstId=65 +NetFmtName=Pcbnew +SpiceAjustPassiveValues=0 +LabSize=50 +ERC_TestSimilarLabels=1 +[pcbnew] +version=1 +PageLayoutDescrFile= +LastNetListRead=console.net +CopperLayerCount=4 +BoardThickness=1.6 +AllowMicroVias=0 +AllowBlindVias=0 +RequireCourtyardDefinitions=0 +ProhibitOverlappingCourtyards=1 +MinTrackWidth=0.2 +MinViaDiameter=0.4 +MinViaDrill=0.3 +MinMicroViaDiameter=0.2 +MinMicroViaDrill=0.09999999999999999 +MinHoleToHole=0.25 +TrackWidth1=0.2 +ViaDiameter1=0.6 +ViaDrill1=0.3 +dPairWidth1=0.2 +dPairGap1=0.25 +dPairViaGap1=0.25 +SilkLineWidth=0.12 +SilkTextSizeV=1 +SilkTextSizeH=1 +SilkTextSizeThickness=0.15 +SilkTextItalic=0 +SilkTextUpright=1 +CopperLineWidth=0.2 +CopperTextSizeV=1.5 +CopperTextSizeH=1.5 +CopperTextThickness=0.3 +CopperTextItalic=0 +CopperTextUpright=1 +EdgeCutLineWidth=0.05 +CourtyardLineWidth=0.05 +OthersLineWidth=0.15 +OthersTextSizeV=1 +OthersTextSizeH=1 +OthersTextSizeThickness=0.15 +OthersTextItalic=0 +OthersTextUpright=1 +SolderMaskClearance=0 +SolderMaskMinWidth=0 +SolderPasteClearance=0 +SolderPasteRatio=-0 +[pcbnew/Layer.F.Cu] +Name=F.Cu +Type=0 +Enabled=1 +[pcbnew/Layer.In1.Cu] +Name=GND +Type=1 +Enabled=1 +[pcbnew/Layer.In2.Cu] +Name=PWR +Type=1 +Enabled=1 +[pcbnew/Layer.In3.Cu] +Name=In3.Cu +Type=0 +Enabled=0 +[pcbnew/Layer.In4.Cu] +Name=In4.Cu +Type=0 +Enabled=0 +[pcbnew/Layer.In5.Cu] +Name=In5.Cu +Type=0 +Enabled=0 +[pcbnew/Layer.In6.Cu] +Name=In6.Cu +Type=0 +Enabled=0 +[pcbnew/Layer.In7.Cu] +Name=In7.Cu +Type=0 +Enabled=0 +[pcbnew/Layer.In8.Cu] +Name=In8.Cu +Type=0 +Enabled=0 +[pcbnew/Layer.In9.Cu] +Name=In9.Cu +Type=0 +Enabled=0 +[pcbnew/Layer.In10.Cu] +Name=In10.Cu +Type=0 +Enabled=0 +[pcbnew/Layer.In11.Cu] +Name=In11.Cu +Type=0 +Enabled=0 +[pcbnew/Layer.In12.Cu] +Name=In12.Cu +Type=0 +Enabled=0 +[pcbnew/Layer.In13.Cu] +Name=In13.Cu +Type=0 +Enabled=0 +[pcbnew/Layer.In14.Cu] +Name=In14.Cu +Type=0 +Enabled=0 +[pcbnew/Layer.In15.Cu] +Name=In15.Cu +Type=0 +Enabled=0 +[pcbnew/Layer.In16.Cu] +Name=In16.Cu +Type=0 +Enabled=0 +[pcbnew/Layer.In17.Cu] +Name=In17.Cu +Type=0 +Enabled=0 +[pcbnew/Layer.In18.Cu] +Name=In18.Cu +Type=0 +Enabled=0 +[pcbnew/Layer.In19.Cu] +Name=In19.Cu +Type=0 +Enabled=0 +[pcbnew/Layer.In20.Cu] +Name=In20.Cu +Type=0 +Enabled=0 +[pcbnew/Layer.In21.Cu] +Name=In21.Cu +Type=0 +Enabled=0 +[pcbnew/Layer.In22.Cu] +Name=In22.Cu +Type=0 +Enabled=0 +[pcbnew/Layer.In23.Cu] +Name=In23.Cu +Type=0 +Enabled=0 +[pcbnew/Layer.In24.Cu] +Name=In24.Cu +Type=0 +Enabled=0 +[pcbnew/Layer.In25.Cu] +Name=In25.Cu +Type=0 +Enabled=0 +[pcbnew/Layer.In26.Cu] +Name=In26.Cu +Type=0 +Enabled=0 +[pcbnew/Layer.In27.Cu] +Name=In27.Cu +Type=0 +Enabled=0 +[pcbnew/Layer.In28.Cu] +Name=In28.Cu +Type=0 +Enabled=0 +[pcbnew/Layer.In29.Cu] +Name=In29.Cu +Type=0 +Enabled=0 +[pcbnew/Layer.In30.Cu] +Name=In30.Cu +Type=0 +Enabled=0 +[pcbnew/Layer.B.Cu] +Name=B.Cu +Type=0 +Enabled=1 +[pcbnew/Layer.B.Adhes] +Enabled=1 +[pcbnew/Layer.F.Adhes] +Enabled=1 +[pcbnew/Layer.B.Paste] +Enabled=1 +[pcbnew/Layer.F.Paste] +Enabled=1 +[pcbnew/Layer.B.SilkS] +Enabled=1 +[pcbnew/Layer.F.SilkS] +Enabled=1 +[pcbnew/Layer.B.Mask] +Enabled=1 +[pcbnew/Layer.F.Mask] +Enabled=1 +[pcbnew/Layer.Dwgs.User] +Enabled=1 +[pcbnew/Layer.Cmts.User] +Enabled=1 +[pcbnew/Layer.Eco1.User] +Enabled=1 +[pcbnew/Layer.Eco2.User] +Enabled=1 +[pcbnew/Layer.Edge.Cuts] +Enabled=1 +[pcbnew/Layer.Margin] +Enabled=1 +[pcbnew/Layer.B.CrtYd] +Enabled=1 +[pcbnew/Layer.F.CrtYd] +Enabled=1 +[pcbnew/Layer.B.Fab] +Enabled=1 +[pcbnew/Layer.F.Fab] +Enabled=1 +[pcbnew/Layer.Rescue] +Enabled=0 +[pcbnew/Netclasses] +[pcbnew/Netclasses/Default] +Name=Default +Clearance=0.2 +TrackWidth=0.2 +ViaDiameter=0.6 +ViaDrill=0.3 +uViaDiameter=0.3 +uViaDrill=0.1 +dPairWidth=0.2 +dPairGap=0.25 +dPairViaGap=0.25 +[pcbnew/Netclasses/1] +Name=PWR +Clearance=0.2 +TrackWidth=0.25 +ViaDiameter=0.6 +ViaDrill=0.3 +uViaDiameter=0.3 +uViaDrill=0.1 +dPairWidth=0.2 +dPairGap=0.25 +dPairViaGap=0.25 diff --git a/hw/console/console.sch b/hw/console/console.sch new file mode 100644 index 0000000..bc5e5ad --- /dev/null +++ b/hw/console/console.sch @@ -0,0 +1,465 @@ +EESchema Schematic File Version 4 +EELAYER 30 0 +EELAYER END +$Descr A4 11693 8268 +encoding utf-8 +Sheet 1 1 +Title "" +Date "" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +$Comp +L Device:LED_Dual_ACAC D1 +U 1 1 65E6846F +P 6900 1800 +F 0 "D1" H 6900 2050 50 0000 C CNN +F 1 "TXD_RXD" H 6900 1550 50 0000 C CNN +F 2 "footprints:ROHM_SML-522MU8WT86" H 6930 1800 50 0001 C CNN +F 3 "~" H 6930 1800 50 0001 C CNN + 1 6900 1800 + 0 1 1 0 +$EndComp +$Comp +L Device:C C1 +U 1 1 65E68D8D +P 2750 2000 +F 0 "C1" H 2750 2100 50 0000 L CNN +F 1 "0.1uF" H 2750 1900 50 0000 L CNN +F 2 "Capacitor_SMD:C_0603_1608Metric" H 2788 1850 50 0001 C CNN +F 3 "~" H 2750 2000 50 0001 C CNN + 1 2750 2000 + 1 0 0 -1 +$EndComp +$Comp +L Device:C C3 +U 1 1 65E6938C +P 4700 1600 +F 0 "C3" H 4700 1700 50 0000 L CNN +F 1 "0.1uF" H 4700 1500 50 0000 L CNN +F 2 "Capacitor_SMD:C_0603_1608Metric" H 4738 1450 50 0001 C CNN +F 3 "~" H 4700 1600 50 0001 C CNN + 1 4700 1600 + 1 0 0 -1 +$EndComp +$Comp +L Device:C C2 +U 1 1 65E6961F +P 3000 1600 +F 0 "C2" H 3000 1700 50 0000 L CNN +F 1 "0.1uF" H 3000 1500 50 0000 L CNN +F 2 "Capacitor_SMD:C_0603_1608Metric" H 3038 1450 50 0001 C CNN +F 3 "~" H 3000 1600 50 0001 C CNN + 1 3000 1600 + 1 0 0 -1 +$EndComp +$Comp +L Connector:USB_B_Micro J1 +U 1 1 65E69BA0 +P 1400 1550 +F 0 "J1" H 1400 1900 50 0000 C CNN +F 1 "USB_B_Micro" H 1650 1200 50 0000 C CNN +F 2 "footprints:GCT_MicroUSB-USB3080-30-00-A" H 1550 1500 50 0001 C CNN +F 3 "~" H 1550 1500 50 0001 C CNN + 1 1400 1550 + 1 0 0 -1 +$EndComp +$Comp +L sn74:SN74LVC2G07DCK U2 +U 1 1 65CDF8DA +P 6200 2650 +F 0 "U2" H 6200 2900 60 0000 C CNN +F 1 "SN74LVC2G07DCK" H 6200 2400 60 0000 C CNN +F 2 "Package_TO_SOT_SMD:Texas_R-PDSO-G6" H 6255 2600 60 0001 C CNN +F 3 "" H 6255 2600 60 0000 C CNN + 1 6200 2650 + 1 0 0 -1 +$EndComp +$Comp +L Device:R R2 +U 1 1 65CE02DA +P 7000 2350 +F 0 "R2" V 7100 2350 50 0000 C CNN +F 1 "260R" V 7000 2350 50 0000 C CNN +F 2 "Resistor_SMD:R_0603_1608Metric" V 6930 2350 50 0001 C CNN +F 3 "~" H 7000 2350 50 0001 C CNN + 1 7000 2350 + 1 0 0 -1 +$EndComp +$Comp +L Device:R R1 +U 1 1 65CE0544 +P 6800 2350 +F 0 "R1" V 6900 2350 50 0000 C CNN +F 1 "260R" V 6800 2350 50 0000 C CNN +F 2 "Resistor_SMD:R_0603_1608Metric" V 6730 2350 50 0001 C CNN +F 3 "~" H 6800 2350 50 0001 C CNN + 1 6800 2350 + 1 0 0 -1 +$EndComp +$Comp +L Device:C C4 +U 1 1 65CE693C +P 5350 2300 +F 0 "C4" H 5350 2400 50 0000 L CNN +F 1 "0.1uF" H 5350 2200 50 0000 L CNN +F 2 "Capacitor_SMD:C_0603_1608Metric" H 5388 2150 50 0001 C CNN +F 3 "~" H 5350 2300 50 0001 C CNN + 1 5350 2300 + 1 0 0 -1 +$EndComp +Wire Wire Line + 2650 2300 3200 2300 +Wire Wire Line + 2650 2400 3200 2400 +Text Label 2650 2300 0 50 ~ 0 +USB_D- +Text Label 2650 2400 0 50 ~ 0 +USB_D+ +NoConn ~ 4600 2200 +Wire Wire Line + 4600 2300 4700 2300 +Wire Wire Line + 3000 1750 3000 2200 +Wire Wire Line + 3000 3200 3800 3200 +Wire Wire Line + 3800 3200 3800 3100 +Wire Wire Line + 3800 3200 3900 3200 +Wire Wire Line + 3900 3200 3900 3100 +Connection ~ 3800 3200 +Wire Wire Line + 3900 3200 4000 3200 +Wire Wire Line + 4000 3200 4000 3100 +Connection ~ 3900 3200 +Wire Wire Line + 4000 3200 4700 3200 +Wire Wire Line + 4700 2300 4700 3200 +Connection ~ 4000 3200 +Wire Wire Line + 4700 1750 4700 2300 +Connection ~ 4700 2300 +$Comp +L power:+3.3V #PWR0101 +U 1 1 65DBD7CC +P 2750 1750 +F 0 "#PWR0101" H 2750 1600 50 0001 C CNN +F 1 "+3.3V" H 2750 1900 50 0000 C CNN +F 2 "" H 2750 1750 50 0001 C CNN +F 3 "" H 2750 1750 50 0001 C CNN + 1 2750 1750 + 1 0 0 -1 +$EndComp +Wire Wire Line + 2750 1750 2750 1800 +$Comp +L power:+1V8 #PWR0102 +U 1 1 65DBDF84 +P 4700 1300 +F 0 "#PWR0102" H 4700 1150 50 0001 C CNN +F 1 "+1V8" H 4700 1450 50 0000 C CNN +F 2 "" H 4700 1300 50 0001 C CNN +F 3 "" H 4700 1300 50 0001 C CNN + 1 4700 1300 + 1 0 0 -1 +$EndComp +Wire Wire Line + 3200 2600 3100 2600 +Wire Wire Line + 3100 2600 3100 2000 +Wire Wire Line + 3100 2000 3200 2000 +Wire Wire Line + 2750 1800 3100 1800 +Wire Wire Line + 3100 1800 3100 2000 +Connection ~ 2750 1800 +Wire Wire Line + 2750 1800 2750 1850 +Connection ~ 3100 2000 +Wire Wire Line + 2750 2150 2750 2200 +Wire Wire Line + 2750 2200 3000 2200 +Connection ~ 3000 2200 +Wire Wire Line + 3000 2200 3000 3200 +Wire Wire Line + 4700 1300 4700 1350 +Wire Wire Line + 4000 1700 4000 1350 +Wire Wire Line + 4000 1350 4700 1350 +Connection ~ 4700 1350 +Wire Wire Line + 4700 1350 4700 1450 +$Comp +L power:GND #PWR0103 +U 1 1 65DC2EE1 +P 3900 3300 +F 0 "#PWR0103" H 3900 3050 50 0001 C CNN +F 1 "GND" H 3900 3150 50 0000 C CNN +F 2 "" H 3900 3300 50 0001 C CNN +F 3 "" H 3900 3300 50 0001 C CNN + 1 3900 3300 + 1 0 0 -1 +$EndComp +Wire Wire Line + 3900 3200 3900 3300 +Wire Wire Line + 6800 2100 6800 2200 +Wire Wire Line + 7000 2100 7000 2200 +Wire Wire Line + 6700 2600 6800 2600 +Wire Wire Line + 6800 2600 6800 2500 +Wire Wire Line + 6700 2700 7000 2700 +Wire Wire Line + 7000 2700 7000 2500 +$Comp +L power:+1V8 #PWR0104 +U 1 1 65DCFFE8 +P 5350 2000 +F 0 "#PWR0104" H 5350 1850 50 0001 C CNN +F 1 "+1V8" H 5350 2150 50 0000 C CNN +F 2 "" H 5350 2000 50 0001 C CNN +F 3 "" H 5350 2000 50 0001 C CNN + 1 5350 2000 + 1 0 0 -1 +$EndComp +Wire Wire Line + 5350 2000 5350 2050 +Wire Wire Line + 5700 2500 5600 2500 +Wire Wire Line + 5600 2500 5600 2050 +Wire Wire Line + 5600 2050 5350 2050 +Connection ~ 5350 2050 +Wire Wire Line + 5350 2050 5350 2150 +Wire Wire Line + 5350 2450 5350 2800 +Wire Wire Line + 5350 2800 5700 2800 +Wire Wire Line + 5700 2700 4600 2700 +Wire Wire Line + 5700 2600 4600 2600 +NoConn ~ 4600 2800 +Wire Wire Line + 3800 1700 3800 1350 +Wire Wire Line + 3800 1350 3000 1350 +Wire Wire Line + 3000 1350 3000 1450 +Connection ~ 3000 1350 +Wire Wire Line + 2050 1650 1700 1650 +Wire Wire Line + 2050 1550 1700 1550 +Text Label 2050 1650 2 50 ~ 0 +USB_D- +Text Label 2050 1550 2 50 ~ 0 +USB_D+ +NoConn ~ 1700 1750 +NoConn ~ 1300 1950 +$Comp +L power:GND #PWR0105 +U 1 1 65DE0120 +P 1400 2050 +F 0 "#PWR0105" H 1400 1800 50 0001 C CNN +F 1 "GND" H 1400 1900 50 0000 C CNN +F 2 "" H 1400 2050 50 0001 C CNN +F 3 "" H 1400 2050 50 0001 C CNN + 1 1400 2050 + 1 0 0 -1 +$EndComp +Wire Wire Line + 1400 1950 1400 2050 +$Comp +L power:+3.3V #PWR0106 +U 1 1 65DE1164 +P 6900 1400 +F 0 "#PWR0106" H 6900 1250 50 0001 C CNN +F 1 "+3.3V" H 6900 1550 50 0000 C CNN +F 2 "" H 6900 1400 50 0001 C CNN +F 3 "" H 6900 1400 50 0001 C CNN + 1 6900 1400 + 1 0 0 -1 +$EndComp +Wire Wire Line + 6900 1400 6900 1450 +Wire Wire Line + 7000 1500 7000 1450 +Wire Wire Line + 7000 1450 6900 1450 +Wire Wire Line + 6800 1450 6800 1500 +Connection ~ 6900 1450 +Wire Wire Line + 6900 1450 6800 1450 +$Comp +L Interface_USB:FT230XQ U1 +U 1 1 65DE5CE9 +P 3900 2400 +F 0 "U1" H 4100 3000 50 0000 C CNN +F 1 "FT230XQ" H 3550 1800 50 0000 C CNN +F 2 "Package_DFN_QFN:QFN-16-1EP_4x4mm_P0.65mm_EP2.1x2.1mm" H 5250 1800 50 0001 C CNN +F 3 "https://www.ftdichip.com/Support/Documents/DataSheets/ICs/DS_FT230X.pdf" H 3900 2400 50 0001 C CNN + 1 3900 2400 + 1 0 0 -1 +$EndComp +$Comp +L Connector_Generic:Conn_01x04 J2 +U 1 1 65DECD92 +P 1900 3150 +F 0 "J2" H 1850 3350 50 0000 L CNN +F 1 "Console" H 1750 2850 50 0000 L CNN +F 2 "Connector_PinHeader_1.27mm:PinHeader_1x04_P1.27mm_Vertical" H 1900 3150 50 0001 C CNN +F 3 "~" H 1900 3150 50 0001 C CNN + 1 1900 3150 + 1 0 0 -1 +$EndComp +$Comp +L power:GND #PWR0107 +U 1 1 65DF0467 +P 1450 3450 +F 0 "#PWR0107" H 1450 3200 50 0001 C CNN +F 1 "GND" H 1455 3277 50 0000 C CNN +F 2 "" H 1450 3450 50 0001 C CNN +F 3 "" H 1450 3450 50 0001 C CNN + 1 1450 3450 + 1 0 0 -1 +$EndComp +$Comp +L power:+1V8 #PWR0108 +U 1 1 65DF079A +P 1600 2650 +F 0 "#PWR0108" H 1600 2500 50 0001 C CNN +F 1 "+1V8" H 1600 2800 50 0000 C CNN +F 2 "" H 1600 2650 50 0001 C CNN +F 3 "" H 1600 2650 50 0001 C CNN + 1 1600 2650 + 1 0 0 -1 +$EndComp +Wire Wire Line + 1600 2650 1600 2700 +Wire Wire Line + 1600 3050 1700 3050 +Wire Wire Line + 1700 3250 1100 3250 +Text Label 1100 3150 0 50 ~ 0 +APP_TX +Text Label 1100 3250 0 50 ~ 0 +APP_RX +Wire Wire Line + 4600 2000 5050 2000 +Wire Wire Line + 4600 2100 5050 2100 +Text Label 5050 2100 2 50 ~ 0 +APP_TX +Text Label 5050 2000 2 50 ~ 0 +APP_RX +$Comp +L power:PWR_FLAG #FLG0103 +U 1 1 65DFEE53 +P 1250 2650 +F 0 "#FLG0103" H 1250 2725 50 0001 C CNN +F 1 "PWR_FLAG" H 1250 2800 50 0000 C CNN +F 2 "" H 1250 2650 50 0001 C CNN +F 3 "~" H 1250 2650 50 0001 C CNN + 1 1250 2650 + 1 0 0 -1 +$EndComp +Wire Wire Line + 1250 2650 1250 2700 +Wire Wire Line + 1250 2700 1450 2700 +Wire Wire Line + 1700 1350 2300 1350 +$Comp +L power:GND #PWR0109 +U 1 1 65E10495 +P 5350 2900 +F 0 "#PWR0109" H 5350 2650 50 0001 C CNN +F 1 "GND" H 5350 2750 50 0000 C CNN +F 2 "" H 5350 2900 50 0001 C CNN +F 3 "" H 5350 2900 50 0001 C CNN + 1 5350 2900 + 1 0 0 -1 +$EndComp +Wire Wire Line + 5350 2900 5350 2800 +Connection ~ 5350 2800 +Text Label 2050 1350 2 50 ~ 0 +VBUS +$Comp +L Device:C C5 +U 1 1 65E496B2 +P 2300 1600 +F 0 "C5" H 2300 1700 50 0000 L CNN +F 1 "4.7uF" H 2300 1500 50 0000 L CNN +F 2 "Capacitor_SMD:C_0603_1608Metric" H 2338 1450 50 0001 C CNN +F 3 "~" H 2300 1600 50 0001 C CNN + 1 2300 1600 + 1 0 0 -1 +$EndComp +Wire Wire Line + 2300 1350 2300 1450 +Connection ~ 2300 1350 +Wire Wire Line + 2300 1350 3000 1350 +$Comp +L power:GND #PWR01 +U 1 1 65E4BAE2 +P 2300 1850 +F 0 "#PWR01" H 2300 1600 50 0001 C CNN +F 1 "GND" H 2305 1677 50 0000 C CNN +F 2 "" H 2300 1850 50 0001 C CNN +F 3 "" H 2300 1850 50 0001 C CNN + 1 2300 1850 + 1 0 0 -1 +$EndComp +Wire Wire Line + 2300 1750 2300 1850 +$Comp +L Device:C C6 +U 1 1 65E4D597 +P 1450 2950 +F 0 "C6" H 1450 3050 50 0000 L CNN +F 1 "1uF" H 1450 2850 50 0000 L CNN +F 2 "Capacitor_SMD:C_0603_1608Metric" H 1488 2800 50 0001 C CNN +F 3 "~" H 1450 2950 50 0001 C CNN + 1 1450 2950 + 1 0 0 -1 +$EndComp +Wire Wire Line + 1450 2700 1450 2800 +NoConn ~ 4600 2500 +Wire Wire Line + 1450 3350 1450 3450 +Connection ~ 1450 2700 +Wire Wire Line + 1450 2700 1600 2700 +Wire Wire Line + 1100 3150 1700 3150 +Wire Wire Line + 1600 2700 1600 3050 +Connection ~ 1600 2700 +Wire Wire Line + 1450 3100 1450 3350 +Connection ~ 1450 3350 +Wire Wire Line + 1450 3350 1700 3350 +$EndSCHEMATC diff --git a/hw/console/fp-lib-table b/hw/console/fp-lib-table new file mode 100644 index 0000000..2322dfd --- /dev/null +++ b/hw/console/fp-lib-table @@ -0,0 +1,3 @@ +(fp_lib_table + (lib (name footprints)(type KiCad)(uri ${KIPRJMOD}/../footprints.pretty)(options "")(descr "")) +) diff --git a/hw/console/sym-lib-table b/hw/console/sym-lib-table new file mode 100644 index 0000000..ea5639b --- /dev/null +++ b/hw/console/sym-lib-table @@ -0,0 +1,4 @@ +(sym_lib_table + (lib (name ftdi)(type Legacy)(uri ${KIPRJMOD}/../library/ftdi.lib)(options "")(descr "")) + (lib (name sn74)(type Legacy)(uri ${KIPRJMOD}/../library/sn74.lib)(options "")(descr "")) +) |