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authorUros Majstorovic <majstor@majstor.org>2026-05-05 00:05:12 +0200
committerUros Majstorovic <majstor@majstor.org>2026-05-05 00:05:12 +0200
commitc3c3e5f66fb24c584fefde1c0805e952d539ba9f (patch)
tree804f42ba8ca1cc9792b140dec693a801f1d8c9f3 /hw/library/myPower.lib
parentf4c5fb24507080506741b8ac2c6b027b401d02c8 (diff)
JLCPCB order W2025070409252353
Diffstat (limited to 'hw/library/myPower.lib')
-rw-r--r--hw/library/myPower.lib28
1 files changed, 14 insertions, 14 deletions
diff --git a/hw/library/myPower.lib b/hw/library/myPower.lib
index ed1924e..df4fbfc 100644
--- a/hw/library/myPower.lib
+++ b/hw/library/myPower.lib
@@ -31,33 +31,33 @@ X +5V_BACKUP ~ 0 0 100 U 50 50 1 1 W N
ENDDRAW
ENDDEF
#
-# +VCTP
+# +5V_PMID
#
-DEF +VCTP #PWR 0 0 Y Y 1 F P
-F0 "#PWR" 0 -150 50 H I C CNN
-F1 "+VCTP" 0 140 50 H V C CNN
-F2 "" 0 0 50 H I C CNN
-F3 "" 0 0 50 H I C CNN
+DEF +5V_PMID #PWR 0 0 Y Y 1 F P
+F0 "#PWR" 0 -150 60 H I C CNN
+F1 "+5V_PMID" 0 150 60 H V C CNN
+F2 "" 0 0 60 H I C CNN
+F3 "" 0 0 60 H I C CNN
DRAW
-P 2 0 1 0 -30 50 0 100 N
-P 2 0 1 0 0 0 0 100 N
-P 2 0 1 0 0 100 30 50 N
-X +VCTP 1 0 0 0 U 50 50 1 1 W N
+P 2 1 1 0 -30 50 0 100 N
+P 2 1 1 0 0 0 0 100 N
+P 2 1 1 0 0 100 30 50 N
+X +5V_PMID 1 0 0 100 U 50 50 1 1 W N
ENDDRAW
ENDDEF
#
-# +VSYS
+# VSYS
#
-DEF +VSYS #PWR 0 0 Y Y 1 F P
+DEF VSYS #PWR 0 0 Y Y 1 F P
F0 "#PWR" 0 -150 50 H I C CNN
-F1 "+VSYS" 0 140 50 H V C CNN
+F1 "VSYS" 0 140 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
DRAW
P 2 0 1 0 -30 50 0 100 N
P 2 0 1 0 0 0 0 100 N
P 2 0 1 0 0 100 30 50 N
-X +VSYS 1 0 0 0 U 50 50 1 1 W N
+X VSYS 1 0 0 0 U 50 50 1 1 W N
ENDDRAW
ENDDEF
#