summaryrefslogtreecommitdiff
path: root/hw/library
diff options
context:
space:
mode:
authorUros Majstorovic <majstor@majstor.org>2021-12-23 02:17:12 +0100
committerUros Majstorovic <majstor@majstor.org>2021-12-23 02:17:12 +0100
commit34e5f49b2f5c285e89404763dea33a4d9154beaf (patch)
treead97edcf723e6e7717fd6a3986c9050030f873d9 /hw/library
parent7d03a941be6e9226e71cb5f5b4f7949e06bbfb02 (diff)
REV3.1:
- fixed audio - added spacers - UART is routed through audio mux instead of I2C - proper display connector alignment
Diffstat (limited to 'hw/library')
-rw-r--r--hw/library/sifive.lib8
-rw-r--r--hw/library/sn74.lib20
2 files changed, 24 insertions, 4 deletions
diff --git a/hw/library/sifive.lib b/hw/library/sifive.lib
index 4692592..26ebecb 100644
--- a/hw/library/sifive.lib
+++ b/hw/library/sifive.lib
@@ -100,17 +100,17 @@ X IVDD 32 -1150 -200 200 R 50 50 1 1 W
X GPIO_9/SPI1.SS2 33 1000 0 200 L 50 50 1 1 B
X GPIO_10/SPI1.SS3/PWM2.0 34 1000 100 200 L 50 50 1 1 B
X GPIO_11/PWM2.1 35 1000 200 200 L 50 50 1 1 B
-X GPIO_12/PWM2.2 36 1000 300 200 L 50 50 1 1 B
-X GPIO_13/PWM2.3 37 1000 400 200 L 50 50 1 1 B
+X GPIO_12/I2C0.SDA/PWM2.2 36 1000 300 200 L 50 50 1 1 B
+X GPIO_13/I2C0.SCL/PWM2.3 37 1000 400 200 L 50 50 1 1 B
X GPIO_16/UART0.RX 38 1000 500 200 L 50 50 1 1 B
X GPIO_17/UART0.TX 39 1000 600 200 L 50 50 1 1 B
X QSPI_DQ_0 4 1000 -900 200 L 50 50 1 1 B
-X GPIO_18 40 1000 700 200 L 50 50 1 1 B
+X GPIO_18/UART1.TX 40 1000 700 200 L 50 50 1 1 B
X GPIO_19/PWM1.1 41 1000 800 200 L 50 50 1 1 B
X GPIO_20/PWM1.0 42 1000 900 200 L 50 50 1 1 B
X GPIO_21/PWM1.2 43 1000 1000 200 L 50 50 1 1 B
X GPIO_22/PWM1.3 44 1000 1100 200 L 50 50 1 1 B
-X GPIO_23 45 1000 1200 200 L 50 50 1 1 B
+X GPIO_23/UART1.RX 45 1000 1200 200 L 50 50 1 1 B
X VDD 46 -1150 -900 200 R 50 50 1 1 W
X IVDD 47 -1150 -300 200 R 50 50 1 1 W
X QSPI_CLK 48 1000 -800 200 L 50 50 1 1 O
diff --git a/hw/library/sn74.lib b/hw/library/sn74.lib
index da3af38..087a60c 100644
--- a/hw/library/sn74.lib
+++ b/hw/library/sn74.lib
@@ -156,6 +156,26 @@ X S 6 -400 -50 200 R 50 50 1 1 I
ENDDRAW
ENDDEF
#
+# SN74LVC1G66DBV
+#
+DEF SN74LVC1G66DBV U 0 40 Y Y 1 F N
+F0 "U" 0 200 60 H V C CNN
+F1 "SN74LVC1G66DBV" 0 -200 60 H V C CNN
+F2 "" 0 0 60 H I C CNN
+F3 "" 0 0 60 H I C CNN
+DRAW
+S -200 -150 200 -150 0 1 0 N
+S -200 150 -200 -150 0 1 0 N
+S 200 -150 200 150 0 1 0 N
+S 200 150 -200 150 0 1 0 N
+X A 1 -400 100 200 R 50 50 1 1 P
+X B 2 -400 0 200 R 50 50 1 1 P
+X GND 3 400 -100 200 L 50 50 1 1 W
+X C 4 -400 -100 200 R 50 50 1 1 I
+X VCC 5 400 100 200 L 50 50 1 1 W
+ENDDRAW
+ENDDEF
+#
# SN74LVC2G06DCK
#
DEF SN74LVC2G06DCK U 0 40 Y Y 1 F N