diff options
| author | Uros Majstorovic <majstor@majstor.org> | 2020-08-05 01:01:55 +0200 |
|---|---|---|
| committer | Uros Majstorovic <majstor@majstor.org> | 2020-08-05 01:01:55 +0200 |
| commit | c57ca4c6305ca7fc1ed6c75ddbecc254604b666f (patch) | |
| tree | f234e80060462f32436176908c39b64931e4bc71 /hw/rvPhone/rvPhone.pro | |
| parent | f58166847c49b454c6db8f109252d0e5b929e082 (diff) | |
hw moved
Diffstat (limited to 'hw/rvPhone/rvPhone.pro')
| -rw-r--r-- | hw/rvPhone/rvPhone.pro | 118 |
1 files changed, 118 insertions, 0 deletions
diff --git a/hw/rvPhone/rvPhone.pro b/hw/rvPhone/rvPhone.pro new file mode 100644 index 0000000..d0e8788 --- /dev/null +++ b/hw/rvPhone/rvPhone.pro @@ -0,0 +1,118 @@ +update=Wednesday, August 05, 2020 at 12:24:50 AM +version=1 +last_client=kicad +[cvpcb] +version=1 +NetIExt=net +[general] +version=1 +[schematic_editor] +version=1 +PageLayoutDescrFile= +PlotDirectoryName= +SubpartIdSeparator=0 +SubpartFirstId=65 +NetFmtName= +SpiceForceRefPrefix=0 +SpiceUseNetNumbers=0 +LabSize=60 +[eeschema] +version=1 +LibDir= +[pcbnew] +version=1 +PageLayoutDescrFile= +LastNetListRead=rvPhone.net +CopperLayerCount=4 +BoardThickness=1.6 +AllowMicroVias=0 +AllowBlindVias=0 +RequireCourtyardDefinitions=0 +ProhibitOverlappingCourtyards=1 +MinTrackWidth=0.1524 +MinViaDiameter=0.5 +MinViaDrill=0.2 +MinMicroViaDiameter=0.2 +MinMicroViaDrill=0.09999999999999999 +MinHoleToHole=0.25 +TrackWidth1=0.25 +ViaDiameter1=0.6 +ViaDrill1=0.3 +dPairWidth1=0.2 +dPairGap1=0.25 +dPairViaGap1=0.25 +SilkLineWidth=0.05 +SilkTextSizeV=0.6 +SilkTextSizeH=0.6 +SilkTextSizeThickness=0.125 +SilkTextItalic=0 +SilkTextUpright=1 +CopperLineWidth=0.2 +CopperTextSizeV=0.5 +CopperTextSizeH=0.5 +CopperTextThickness=0.125 +CopperTextItalic=0 +CopperTextUpright=1 +EdgeCutLineWidth=0.09999999999999999 +CourtyardLineWidth=0.05 +OthersLineWidth=0.15 +OthersTextSizeV=1 +OthersTextSizeH=1 +OthersTextSizeThickness=0.15 +OthersTextItalic=0 +OthersTextUpright=1 +SolderMaskClearance=0.045 +SolderMaskMinWidth=0.11 +SolderPasteClearance=0 +SolderPasteRatio=0 +[pcbnew/Layer.In1.Cu] +Name=GND +Type=1 +[pcbnew/Layer.In2.Cu] +Name=PWR +Type=1 +[pcbnew/Netclasses] +[pcbnew/Netclasses/1] +Name=DISPLAY +Clearance=0.1524 +TrackWidth=0.1524 +ViaDiameter=0.508 +ViaDrill=0.254 +uViaDiameter=0.3 +uViaDrill=0.1 +dPairWidth=0.175 +dPairGap=0.1524 +dPairViaGap=0.25 +[pcbnew/Netclasses/2] +Name=FE310 +Clearance=0.1524 +TrackWidth=0.1524 +ViaDiameter=0.6096 +ViaDrill=0.3048 +uViaDiameter=0.3 +uViaDrill=0.1 +dPairWidth=0.2 +dPairGap=0.25 +dPairViaGap=0.25 +[pcbnew/Netclasses/3] +Name=FE310_L +Clearance=0.2 +TrackWidth=0.2 +ViaDiameter=0.6 +ViaDrill=0.3 +uViaDiameter=0.3 +uViaDrill=0.1 +dPairWidth=0.2 +dPairGap=0.25 +dPairViaGap=0.25 +[pcbnew/Netclasses/4] +Name=MODEM_USB +Clearance=0.1524 +TrackWidth=0.1524 +ViaDiameter=0.508 +ViaDrill=0.254 +uViaDiameter=0.3 +uViaDrill=0.1 +dPairWidth=0.2288 +dPairGap=0.1524 +dPairViaGap=0.25 |