upgrade to kicad 5; fixed footprints

1 files changed, 60 insertions, 69 deletions

diff --git a/myPhone/myPhone.pro b/myPhone/myPhone.pro
index 0034003..4d6f5a6 100644
--- a/myPhone/myPhone.pro
+++ b/myPhone/myPhone.pro
@@ -1,25 +1,6 @@
-update=Monday, March 18, 2019 'AMt' 01:04:52 AM
+update=Thursday, August 08, 2019 at 01:05:55 AM
 version=1
 last_client=kicad
-[pcbnew]
-version=1
-LastNetListRead=
-UseCmpFile=1
-PadDrill=0.600000000000
-PadDrillOvalY=0.600000000000
-PadSizeH=1.500000000000
-PadSizeV=1.500000000000
-PcbTextSizeV=1.500000000000
-PcbTextSizeH=1.500000000000
-PcbTextThickness=0.300000000000
-ModuleTextSizeV=1.000000000000
-ModuleTextSizeH=1.000000000000
-ModuleTextSizeThickness=0.150000000000
-SolderMaskClearance=0.000000000000
-SolderMaskMinWidth=0.000000000000
-DrawSegmentWidth=0.200000000000
-BoardOutlineThickness=0.100000000000
-ModuleOutlineThickness=0.150000000000
 [cvpcb]
 version=1
 NetIExt=net
@@ -37,52 +18,62 @@ SpiceUseNetNumbers=0
 LabSize=60
 [eeschema]
 version=1
-LibDir=../library
-[eeschema/libraries]
-LibName1=power
-LibName2=device
-LibName3=transistors
-LibName4=conn
-LibName5=linear
-LibName6=regul
-LibName7=74xx
-LibName8=cmos4000
-LibName9=adc-dac
-LibName10=memory
-LibName11=xilinx
-LibName12=microcontrollers
-LibName13=dsp
-LibName14=microchip
-LibName15=analog_switches
-LibName16=motorola
-LibName17=texas
-LibName18=intel
-LibName19=audio
-LibName20=interface
-LibName21=digital-audio
-LibName22=philips
-LibName23=display
-LibName24=cypress
-LibName25=siliconi
-LibName26=opto
-LibName27=atmel
-LibName28=contrib
-LibName29=valves
-LibName30=switches
-LibName31=bav99
-LibName32=texas-tps
-LibName33=rtl8710af
-LibName34=tpa301
-LibName35=e310-g000
-LibName36=is25lp128
-LibName37=sit1533
-LibName38=ics-43434
-LibName39=max98357
-LibName40=cui-sj
-LibName41=ft81x
-LibName42=fan5333
-LibName43=esp32
-LibName44=drv2605l
-LibName45=myPower
-LibName46=sn74
-LibName47=SODIMM-204
+LibDir=
+[pcbnew]
+version=1
+PageLayoutDescrFile=
+LastNetListRead=myPhone.net
+CopperLayerCount=2
+BoardThickness=1.6
+AllowMicroVias=0
+AllowBlindVias=0
+RequireCourtyardDefinitions=0
+ProhibitOverlappingCourtyards=1
+MinTrackWidth=0.1524
+MinViaDiameter=0.5
+MinViaDrill=0.3
+MinMicroViaDiameter=0.2
+MinMicroViaDrill=0.09999999999999999
+MinHoleToHole=0.25
+TrackWidth1=0.25
+ViaDiameter1=0.6096
+ViaDrill1=0.3048
+dPairWidth1=0.2
+dPairGap1=0.25
+dPairViaGap1=0.25
+SilkLineWidth=0.05
+SilkTextSizeV=0.6
+SilkTextSizeH=0.6
+SilkTextSizeThickness=0.125
+SilkTextItalic=0
+SilkTextUpright=1
+CopperLineWidth=0.2
+CopperTextSizeV=0.5
+CopperTextSizeH=0.5
+CopperTextThickness=0.125
+CopperTextItalic=0
+CopperTextUpright=1
+EdgeCutLineWidth=0.09999999999999999
+CourtyardLineWidth=0.05
+OthersLineWidth=0.15
+OthersTextSizeV=1
+OthersTextSizeH=1
+OthersTextSizeThickness=0.15
+OthersTextItalic=0
+OthersTextUpright=1
+SolderMaskClearance=0.03
+SolderMaskMinWidth=0.13
+SolderPasteClearance=0
+SolderPasteRatio=-0
+[pcbnew/Netclasses]
+[pcbnew/Netclasses/1]
+Name=FE310
+Clearance=0.1524
+TrackWidth=0.1524
+ViaDiameter=0.6096
+ViaDrill=0.3048
+uViaDiameter=0.3
+uViaDrill=0.1
+dPairWidth=0.2
+dPairGap=0.25
+dPairViaGap=0.25