diff options
author | Uros Majstorovic <majstor@majstor.org> | 2019-09-24 23:31:16 +0200 |
---|---|---|
committer | Uros Majstorovic <majstor@majstor.org> | 2019-09-24 23:31:16 +0200 |
commit | a4e7d2b3dcf759a750a1b9cfba1b2788db8ca9ad (patch) | |
tree | 954c0da59740970228bef733400e37511f414a71 /myPhone | |
parent | 75cf363a6fff016a797be24fc7e4436b3c87fedc (diff) |
solder mask clearance/width fixed; REV1 board
Diffstat (limited to 'myPhone')
-rw-r--r-- | myPhone/myPhone.kicad_pcb | 78 | ||||
-rw-r--r-- | myPhone/myPhone.pro | 6 |
2 files changed, 42 insertions, 42 deletions
diff --git a/myPhone/myPhone.kicad_pcb b/myPhone/myPhone.kicad_pcb index b563c90..1b9b7c4 100644 --- a/myPhone/myPhone.kicad_pcb +++ b/myPhone/myPhone.kicad_pcb @@ -59,8 +59,8 @@ (mod_text_width 0.125) (pad_size 0.9 0.95) (pad_drill 0) - (pad_to_mask_clearance 0.03) - (solder_mask_min_width 0.13) + (pad_to_mask_clearance 0.045) + (solder_mask_min_width 0.11) (aux_axis_origin 97.2 71.8) (visible_elements FFFFFFFF) (pcbplotparams @@ -16748,7 +16748,7 @@ (segment (start 165.2 123.8) (end 165.2 124.975) (width 0.2) (layer F.Cu) (net 483)) (segment (start 165.64998 123.35002) (end 165.2 123.8) (width 0.2) (layer F.Cu) (net 483)) - (zone (net 66) (net_name +VSYS) (layer F.Cu) (tstamp 5D83E268) (hatch edge 0.508) + (zone (net 66) (net_name +VSYS) (layer F.Cu) (tstamp 5D84F028) (hatch edge 0.508) (priority 1) (connect_pads yes (clearance 0.2032)) (min_thickness 0.254) @@ -16768,7 +16768,7 @@ ) ) ) - (zone (net 3) (net_name +1V8) (layer F.Cu) (tstamp 5D83E265) (hatch edge 0.508) + (zone (net 3) (net_name +1V8) (layer F.Cu) (tstamp 5D84F025) (hatch edge 0.508) (priority 1) (connect_pads yes (clearance 0.2032)) (min_thickness 0.254) @@ -16789,7 +16789,7 @@ ) ) ) - (zone (net 11) (net_name "Net-(L2-Pad1)") (layer F.Cu) (tstamp 5D83E262) (hatch edge 0.508) + (zone (net 11) (net_name "Net-(L2-Pad1)") (layer F.Cu) (tstamp 5D84F022) (hatch edge 0.508) (priority 1) (connect_pads yes (clearance 0.2032)) (min_thickness 0.254) @@ -16833,7 +16833,7 @@ ) ) ) - (zone (net 20) (net_name "Net-(C5-Pad1)") (layer F.Cu) (tstamp 5D83E25F) (hatch edge 0.508) + (zone (net 20) (net_name "Net-(C5-Pad1)") (layer F.Cu) (tstamp 5D84F01F) (hatch edge 0.508) (priority 1) (connect_pads yes (clearance 0.2032)) (min_thickness 0.254) @@ -16852,7 +16852,7 @@ ) ) ) - (zone (net 66) (net_name +VSYS) (layer F.Cu) (tstamp 5D83E25C) (hatch edge 0.508) + (zone (net 66) (net_name +VSYS) (layer F.Cu) (tstamp 5D84F01C) (hatch edge 0.508) (priority 1) (connect_pads yes (clearance 0.2032)) (min_thickness 0.254) @@ -16881,7 +16881,7 @@ ) ) ) - (zone (net 17) (net_name "Net-(C1-Pad1)") (layer F.Cu) (tstamp 5D83E259) (hatch edge 0.508) + (zone (net 17) (net_name "Net-(C1-Pad1)") (layer F.Cu) (tstamp 5D84F019) (hatch edge 0.508) (priority 1) (connect_pads yes (clearance 0.2032)) (min_thickness 0.254) @@ -16914,7 +16914,7 @@ ) ) ) - (zone (net 19) (net_name VBUS) (layer F.Cu) (tstamp 5D83E256) (hatch edge 0.508) + (zone (net 19) (net_name VBUS) (layer F.Cu) (tstamp 5D84F016) (hatch edge 0.508) (priority 1) (connect_pads yes (clearance 0.2032)) (min_thickness 0.254) @@ -16940,7 +16940,7 @@ ) ) ) - (zone (net 2) (net_name +3V3) (layer F.Cu) (tstamp 5D83E253) (hatch edge 0.508) + (zone (net 2) (net_name +3V3) (layer F.Cu) (tstamp 5D84F013) (hatch edge 0.508) (priority 1) (connect_pads yes (clearance 0.2032)) (min_thickness 0.254) @@ -16962,7 +16962,7 @@ ) ) ) - (zone (net 2) (net_name +3V3) (layer F.Cu) (tstamp 5D83E250) (hatch edge 0.508) + (zone (net 2) (net_name +3V3) (layer F.Cu) (tstamp 5D84F010) (hatch edge 0.508) (priority 1) (connect_pads yes (clearance 0.2032)) (min_thickness 0.254) @@ -16980,7 +16980,7 @@ ) ) ) - (zone (net 3) (net_name +1V8) (layer F.Cu) (tstamp 5D83E24D) (hatch edge 0.508) + (zone (net 3) (net_name +1V8) (layer F.Cu) (tstamp 5D84F00D) (hatch edge 0.508) (priority 1) (connect_pads yes (clearance 0.2032)) (min_thickness 0.254) @@ -16998,7 +16998,7 @@ ) ) ) - (zone (net 2) (net_name +3V3) (layer F.Cu) (tstamp 5D83E24A) (hatch edge 0.508) + (zone (net 2) (net_name +3V3) (layer F.Cu) (tstamp 5D84F00A) (hatch edge 0.508) (priority 1) (connect_pads yes (clearance 0.2032)) (min_thickness 0.254) @@ -17019,7 +17019,7 @@ ) ) ) - (zone (net 3) (net_name +1V8) (layer F.Cu) (tstamp 5D83E247) (hatch edge 0.508) + (zone (net 3) (net_name +1V8) (layer F.Cu) (tstamp 5D84F007) (hatch edge 0.508) (priority 1) (connect_pads yes (clearance 0.2032)) (min_thickness 0.254) @@ -17037,7 +17037,7 @@ ) ) ) - (zone (net 2) (net_name +3V3) (layer F.Cu) (tstamp 5D83E244) (hatch edge 0.508) + (zone (net 2) (net_name +3V3) (layer F.Cu) (tstamp 5D84F004) (hatch edge 0.508) (priority 1) (connect_pads yes (clearance 0.2032)) (min_thickness 0.254) @@ -17055,7 +17055,7 @@ ) ) ) - (zone (net 1) (net_name GND) (layer F.Cu) (tstamp 5D83E241) (hatch edge 0.508) + (zone (net 1) (net_name GND) (layer F.Cu) (tstamp 5D84F001) (hatch edge 0.508) (connect_pads (clearance 0.2032)) (min_thickness 0.254) (fill yes (arc_segments 16) (thermal_gap 0.381) (thermal_bridge_width 0.508)) @@ -21433,7 +21433,7 @@ ) ) ) - (zone (net 1) (net_name GND) (layer B.Cu) (tstamp 5D83E23E) (hatch edge 0.508) + (zone (net 1) (net_name GND) (layer B.Cu) (tstamp 5D84EFFE) (hatch edge 0.508) (connect_pads (clearance 0.2032)) (min_thickness 0.254) (fill yes (arc_segments 16) (thermal_gap 0.381) (thermal_bridge_width 0.508)) @@ -24747,7 +24747,7 @@ ) ) ) - (zone (net 2) (net_name +3V3) (layer F.Cu) (tstamp 5D83E23B) (hatch edge 0.508) + (zone (net 2) (net_name +3V3) (layer F.Cu) (tstamp 5D84EFFB) (hatch edge 0.508) (priority 1) (connect_pads yes (clearance 0.2032)) (min_thickness 0.254) @@ -24769,7 +24769,7 @@ ) ) ) - (zone (net 1) (net_name GND) (layer F.Cu) (tstamp 5D83E238) (hatch edge 0.508) + (zone (net 1) (net_name GND) (layer F.Cu) (tstamp 5D84EFF8) (hatch edge 0.508) (priority 1) (connect_pads yes (clearance 0.2032)) (min_thickness 0.254) @@ -24801,7 +24801,7 @@ ) ) ) - (zone (net 116) (net_name DISP_LED_K) (layer F.Cu) (tstamp 5D83E235) (hatch edge 0.508) + (zone (net 116) (net_name DISP_LED_K) (layer F.Cu) (tstamp 5D84EFF5) (hatch edge 0.508) (priority 1) (connect_pads yes (clearance 0.2032)) (min_thickness 0.254) @@ -24820,7 +24820,7 @@ ) ) ) - (zone (net 51) (net_name "Net-(D2-Pad2)") (layer F.Cu) (tstamp 5D83E232) (hatch edge 0.508) + (zone (net 51) (net_name "Net-(D2-Pad2)") (layer F.Cu) (tstamp 5D84EFF2) (hatch edge 0.508) (priority 1) (connect_pads yes (clearance 0.2032)) (min_thickness 0.254) @@ -24840,7 +24840,7 @@ ) ) ) - (zone (net 115) (net_name DISP_LED_A) (layer F.Cu) (tstamp 5D83E22F) (hatch edge 0.508) + (zone (net 115) (net_name DISP_LED_A) (layer F.Cu) (tstamp 5D84EFEF) (hatch edge 0.508) (priority 1) (connect_pads yes (clearance 0.2032)) (min_thickness 0.254) @@ -24860,7 +24860,7 @@ ) ) ) - (zone (net 66) (net_name +VSYS) (layer F.Cu) (tstamp 5D83E22C) (hatch edge 0.508) + (zone (net 66) (net_name +VSYS) (layer F.Cu) (tstamp 5D84EFEC) (hatch edge 0.508) (priority 1) (connect_pads yes (clearance 0.2032)) (min_thickness 0.254) @@ -24882,7 +24882,7 @@ ) ) ) - (zone (net 31) (net_name "Net-(L3-Pad2)") (layer F.Cu) (tstamp 5D83E229) (hatch edge 0.508) + (zone (net 31) (net_name "Net-(L3-Pad2)") (layer F.Cu) (tstamp 5D84EFE9) (hatch edge 0.508) (priority 1) (connect_pads yes (clearance 0.2032)) (min_thickness 0.254) @@ -24898,7 +24898,7 @@ ) ) ) - (zone (net 30) (net_name "Net-(L3-Pad1)") (layer F.Cu) (tstamp 5D83E226) (hatch edge 0.508) + (zone (net 30) (net_name "Net-(L3-Pad1)") (layer F.Cu) (tstamp 5D84EFE6) (hatch edge 0.508) (priority 1) (connect_pads yes (clearance 0.2032)) (min_thickness 0.254) @@ -24914,7 +24914,7 @@ ) ) ) - (zone (net 30) (net_name "Net-(L3-Pad1)") (layer F.Cu) (tstamp 5D83E223) (hatch edge 0.508) + (zone (net 30) (net_name "Net-(L3-Pad1)") (layer F.Cu) (tstamp 5D84EFE3) (hatch edge 0.508) (priority 1) (connect_pads yes (clearance 0.2032)) (min_thickness 0.254) @@ -24932,7 +24932,7 @@ ) ) ) - (zone (net 31) (net_name "Net-(L3-Pad2)") (layer F.Cu) (tstamp 5D83E220) (hatch edge 0.508) + (zone (net 31) (net_name "Net-(L3-Pad2)") (layer F.Cu) (tstamp 5D84EFE0) (hatch edge 0.508) (priority 1) (connect_pads yes (clearance 0.2032)) (min_thickness 0.254) @@ -24950,7 +24950,7 @@ ) ) ) - (zone (net 31) (net_name "Net-(L3-Pad2)") (layer B.Cu) (tstamp 5D83E21D) (hatch edge 0.508) + (zone (net 31) (net_name "Net-(L3-Pad2)") (layer B.Cu) (tstamp 5D84EFDD) (hatch edge 0.508) (priority 1) (connect_pads yes (clearance 0.2032)) (min_thickness 0.254) @@ -24968,7 +24968,7 @@ ) ) ) - (zone (net 30) (net_name "Net-(L3-Pad1)") (layer B.Cu) (tstamp 5D83E21A) (hatch edge 0.508) + (zone (net 30) (net_name "Net-(L3-Pad1)") (layer B.Cu) (tstamp 5D84EFDA) (hatch edge 0.508) (priority 1) (connect_pads yes (clearance 0.2032)) (min_thickness 0.254) @@ -25019,7 +25019,7 @@ ) ) ) - (zone (net 2) (net_name +3V3) (layer F.Cu) (tstamp 5D83E217) (hatch edge 0.508) + (zone (net 2) (net_name +3V3) (layer F.Cu) (tstamp 5D84EFD7) (hatch edge 0.508) (priority 1) (connect_pads yes (clearance 0.2032)) (min_thickness 0.254) @@ -25042,7 +25042,7 @@ ) ) ) - (zone (net 2) (net_name +3V3) (layer F.Cu) (tstamp 5D83E214) (hatch edge 0.508) + (zone (net 2) (net_name +3V3) (layer F.Cu) (tstamp 5D84EFD4) (hatch edge 0.508) (priority 1) (connect_pads yes (clearance 0.2032)) (min_thickness 0.254) @@ -25095,7 +25095,7 @@ ) ) ) - (zone (net 115) (net_name DISP_LED_A) (layer B.Cu) (tstamp 5D83E211) (hatch edge 0.508) + (zone (net 115) (net_name DISP_LED_A) (layer B.Cu) (tstamp 5D84EFD1) (hatch edge 0.508) (priority 1) (connect_pads yes (clearance 0.2032)) (min_thickness 0.254) @@ -25114,7 +25114,7 @@ ) ) ) - (zone (net 116) (net_name DISP_LED_K) (layer B.Cu) (tstamp 5D83E20E) (hatch edge 0.508) + (zone (net 116) (net_name DISP_LED_K) (layer B.Cu) (tstamp 5D84EFCE) (hatch edge 0.508) (priority 1) (connect_pads yes (clearance 0.2032)) (min_thickness 0.254) @@ -25133,7 +25133,7 @@ ) ) ) - (zone (net 1) (net_name GND) (layer GND) (tstamp 5D83E20B) (hatch edge 0.508) + (zone (net 1) (net_name GND) (layer GND) (tstamp 5D84EFCB) (hatch edge 0.508) (connect_pads (clearance 0.2032)) (min_thickness 0.254) (fill yes (arc_segments 32) (thermal_gap 0.381) (thermal_bridge_width 0.508)) @@ -28943,7 +28943,7 @@ ) ) ) - (zone (net 2) (net_name +3V3) (layer PWR) (tstamp 5D83E208) (hatch edge 0.508) + (zone (net 2) (net_name +3V3) (layer PWR) (tstamp 5D84EFC8) (hatch edge 0.508) (connect_pads (clearance 0.2032)) (min_thickness 0.254) (fill yes (arc_segments 32) (thermal_gap 0.508) (thermal_bridge_width 0.508)) @@ -32368,7 +32368,7 @@ ) ) ) - (zone (net 3) (net_name +1V8) (layer PWR) (tstamp 5D83E205) (hatch edge 0.508) + (zone (net 3) (net_name +1V8) (layer PWR) (tstamp 5D84EFC5) (hatch edge 0.508) (connect_pads (clearance 0.2032)) (min_thickness 0.254) (fill yes (arc_segments 32) (thermal_gap 0.508) (thermal_bridge_width 0.508)) @@ -32515,7 +32515,7 @@ ) ) ) - (zone (net 66) (net_name +VSYS) (layer PWR) (tstamp 5D83E202) (hatch edge 0.508) + (zone (net 66) (net_name +VSYS) (layer PWR) (tstamp 5D84EFC2) (hatch edge 0.508) (connect_pads (clearance 0.2032)) (min_thickness 0.254) (fill yes (arc_segments 32) (thermal_gap 0.508) (thermal_bridge_width 0.508)) @@ -33371,7 +33371,7 @@ ) ) ) - (zone (net 21) (net_name "Net-(C6-Pad1)") (layer F.Cu) (tstamp 5D83E1FF) (hatch edge 0.508) + (zone (net 21) (net_name "Net-(C6-Pad1)") (layer F.Cu) (tstamp 5D84EFBF) (hatch edge 0.508) (priority 1) (connect_pads yes (clearance 0.2032)) (min_thickness 0.254) @@ -33396,7 +33396,7 @@ ) ) ) - (zone (net 478) (net_name "Net-(C55-Pad1)") (layer F.Cu) (tstamp 5D83E1FC) (hatch edge 0.508) + (zone (net 478) (net_name "Net-(C55-Pad1)") (layer F.Cu) (tstamp 5D84EFBC) (hatch edge 0.508) (priority 1) (connect_pads yes (clearance 0.2032)) (min_thickness 0.254) diff --git a/myPhone/myPhone.pro b/myPhone/myPhone.pro index 70acc04..8224ce6 100644 --- a/myPhone/myPhone.pro +++ b/myPhone/myPhone.pro @@ -1,4 +1,4 @@ -update=Thursday, September 19, 2019 at 01:47:09 AM +update=Friday, September 20, 2019 at 04:06:26 PM version=1 last_client=kicad [cvpcb] @@ -61,8 +61,8 @@ OthersTextSizeH=1 OthersTextSizeThickness=0.15 OthersTextItalic=0 OthersTextUpright=1 -SolderMaskClearance=0.03 -SolderMaskMinWidth=0.13 +SolderMaskClearance=0.045 +SolderMaskMinWidth=0.11 SolderPasteClearance=0 SolderPasteRatio=-0 [pcbnew/Layer.In1.Cu] |