diff options
| -rw-r--r-- | fw/esp32/components/eos/bq25895.c | 61 | ||||
| -rw-r--r-- | fw/esp32/components/eos/drv2605l.c | 85 | ||||
| -rw-r--r-- | fw/esp32/components/eos/include/bq25895.h | 3 | ||||
| -rw-r--r-- | fw/esp32/components/eos/include/drv2605l.h | 3 | ||||
| -rw-r--r-- | fw/esp32/main/app_main.c | 4 | ||||
| -rw-r--r-- | fw/fe310/Makefile | 2 | ||||
| -rw-r--r-- | fw/fe310/eos/eos.c | 2 | ||||
| -rw-r--r-- | fw/fe310/eos/i2c/Makefile | 17 | ||||
| -rw-r--r-- | fw/fe310/eos/i2c/bq25895.c | 24 | ||||
| -rw-r--r-- | fw/fe310/eos/i2c/bq25895.h | 5 | ||||
| -rw-r--r-- | fw/fe310/eos/i2c/drv2605.h | 3 | ||||
| -rw-r--r-- | fw/fe310/eos/i2c/lsm9ds1.h | 4 | 
12 files changed, 56 insertions, 157 deletions
diff --git a/fw/esp32/components/eos/bq25895.c b/fw/esp32/components/eos/bq25895.c deleted file mode 100644 index 2c9a551..0000000 --- a/fw/esp32/components/eos/bq25895.c +++ /dev/null @@ -1,61 +0,0 @@ -#include <stdlib.h> - -#include <esp_log.h> - -#include "eos.h" -#include "i2c.h" - -static const char *TAG = "EOS BQ25895"; - -#define BQ25895_ADDR                0x6A - -void eos_bq25895_set_ilim(void) { -    uint8_t data = 0; -    int ret = EOS_OK; -    eos_i2c_write8(BQ25895_ADDR, 0, 0x26);  // input current: 2.0 A -    eos_i2c_write8(BQ25895_ADDR, 2, 0x28); -    eos_i2c_write8(BQ25895_ADDR, 7, 0x8d); - -    ret = eos_i2c_read8(BQ25895_ADDR, 0x00, &data); -    if (!ret) ESP_LOGI(TAG, "REG00: %02x", data); -    ret = eos_i2c_read8(BQ25895_ADDR, 0x01, &data); -    if (!ret) ESP_LOGI(TAG, "REG01: %02x", data); -    ret = eos_i2c_read8(BQ25895_ADDR, 0x02, &data); -    if (!ret) ESP_LOGI(TAG, "REG02: %02x", data); -    ret = eos_i2c_read8(BQ25895_ADDR, 0x03, &data); -    if (!ret) ESP_LOGI(TAG, "REG03: %02x", data); -    ret = eos_i2c_read8(BQ25895_ADDR, 0x04, &data); -    if (!ret) ESP_LOGI(TAG, "REG04: %02x", data); -    ret = eos_i2c_read8(BQ25895_ADDR, 0x05, &data); -    if (!ret) ESP_LOGI(TAG, "REG05: %02x", data); -    ret = eos_i2c_read8(BQ25895_ADDR, 0x06, &data); -    if (!ret) ESP_LOGI(TAG, "REG06: %02x", data); -    ret = eos_i2c_read8(BQ25895_ADDR, 0x07, &data); -    if (!ret) ESP_LOGI(TAG, "REG07: %02x", data); -    ret = eos_i2c_read8(BQ25895_ADDR, 0x08, &data); -    if (!ret) ESP_LOGI(TAG, "REG08: %02x", data); -    ret = eos_i2c_read8(BQ25895_ADDR, 0x09, &data); -    if (!ret) ESP_LOGI(TAG, "REG09: %02x", data); -    ret = eos_i2c_read8(BQ25895_ADDR, 0x0a, &data); -    if (!ret) ESP_LOGI(TAG, "REG0A: %02x", data); -    ret = eos_i2c_read8(BQ25895_ADDR, 0x0b, &data); -    if (!ret) ESP_LOGI(TAG, "REG0B: %02x", data); -    ret = eos_i2c_read8(BQ25895_ADDR, 0x0c, &data); -    if (!ret) ESP_LOGI(TAG, "REG0C: %02x", data); -    ret = eos_i2c_read8(BQ25895_ADDR, 0x0d, &data); -    if (!ret) ESP_LOGI(TAG, "REG0D: %02x", data); -    ret = eos_i2c_read8(BQ25895_ADDR, 0x0e, &data); -    if (!ret) ESP_LOGI(TAG, "REG0E: %02x", data); -    ret = eos_i2c_read8(BQ25895_ADDR, 0x0f, &data); -    if (!ret) ESP_LOGI(TAG, "REG0F: %02x", data); -    ret = eos_i2c_read8(BQ25895_ADDR, 0x10, &data); -    if (!ret) ESP_LOGI(TAG, "REG10: %02x", data); -    ret = eos_i2c_read8(BQ25895_ADDR, 0x11, &data); -    if (!ret) ESP_LOGI(TAG, "REG11: %02x", data); -    ret = eos_i2c_read8(BQ25895_ADDR, 0x12, &data); -    if (!ret) ESP_LOGI(TAG, "REG12: %02x", data); -    ret = eos_i2c_read8(BQ25895_ADDR, 0x13, &data); -    if (!ret) ESP_LOGI(TAG, "REG13: %02x", data); -    ret = eos_i2c_read8(BQ25895_ADDR, 0x14, &data); -    if (!ret) ESP_LOGI(TAG, "REG14: %02x", data); -} diff --git a/fw/esp32/components/eos/drv2605l.c b/fw/esp32/components/eos/drv2605l.c deleted file mode 100644 index 8cf17cd..0000000 --- a/fw/esp32/components/eos/drv2605l.c +++ /dev/null @@ -1,85 +0,0 @@ -#include <stdlib.h> - -#include <esp_log.h> - -#include "eos.h" -#include "i2c.h" - -static const char *TAG = "EOS DRV2605L"; - -#define DRV2605L_ADDR                0x5A - -#define DRV2605_REG_STATUS 0x00       ///< Status register -#define DRV2605_REG_MODE 0x01         ///< Mode register -#define DRV2605_MODE_INTTRIG 0x00     ///< Internal trigger mode -#define DRV2605_MODE_EXTTRIGEDGE 0x01 ///< External edge trigger mode -#define DRV2605_MODE_EXTTRIGLVL 0x02  ///< External level trigger mode -#define DRV2605_MODE_PWMANALOG 0x03   ///< PWM/Analog input mode -#define DRV2605_MODE_AUDIOVIBE 0x04   ///< Audio-to-vibe mode -#define DRV2605_MODE_REALTIME 0x05    ///< Real-time playback (RTP) mode -#define DRV2605_MODE_DIAGNOS 0x06     ///< Diagnostics mode -#define DRV2605_MODE_AUTOCAL 0x07     ///< Auto calibration mode - -#define DRV2605_REG_RTPIN 0x02        ///< Real-time playback input register -#define DRV2605_REG_LIBRARY 0x03      ///< Waveform library selection register -#define DRV2605_REG_WAVESEQ1 0x04     ///< Waveform sequence register 1 -#define DRV2605_REG_WAVESEQ2 0x05     ///< Waveform sequence register 2 -#define DRV2605_REG_WAVESEQ3 0x06     ///< Waveform sequence register 3 -#define DRV2605_REG_WAVESEQ4 0x07     ///< Waveform sequence register 4 -#define DRV2605_REG_WAVESEQ5 0x08     ///< Waveform sequence register 5 -#define DRV2605_REG_WAVESEQ6 0x09     ///< Waveform sequence register 6 -#define DRV2605_REG_WAVESEQ7 0x0A     ///< Waveform sequence register 7 -#define DRV2605_REG_WAVESEQ8 0x0B     ///< Waveform sequence register 8 - -#define DRV2605_REG_GO 0x0C           ///< Go register -#define DRV2605_REG_OVERDRIVE 0x0D    ///< Overdrive time offset register -#define DRV2605_REG_SUSTAINPOS 0x0E   ///< Sustain time offset, positive register -#define DRV2605_REG_SUSTAINNEG 0x0F   ///< Sustain time offset, negative register -#define DRV2605_REG_BREAK 0x10        ///< Brake time offset register -#define DRV2605_REG_AUDIOCTRL 0x11    ///< Audio-to-vibe control register -#define DRV2605_REG_AUDIOLVL 0x12     ///< Audio-to-vibe minimum input level register -#define DRV2605_REG_AUDIOMAX 0x13     ///< Audio-to-vibe maximum input level register -#define DRV2605_REG_AUDIOOUTMIN 0x14  ///< Audio-to-vibe minimum output drive register -#define DRV2605_REG_AUDIOOUTMAX 0x15  ///< Audio-to-vibe maximum output drive register -#define DRV2605_REG_RATEDV 0x16       ///< Rated voltage register -#define DRV2605_REG_CLAMPV 0x17       ///< Overdrive clamp voltage register -#define DRV2605_REG_AUTOCALCOMP 0x18  ///< Auto-calibration compensation result register -#define DRV2605_REG_AUTOCALEMP 0x19   ///< Auto-calibration back-EMF result register -#define DRV2605_REG_FEEDBACK 0x1A     ///< Feedback control register -#define DRV2605_REG_CONTROL1 0x1B     ///< Control1 Register -#define DRV2605_REG_CONTROL2 0x1C     ///< Control2 Register -#define DRV2605_REG_CONTROL3 0x1D     ///< Control3 Register -#define DRV2605_REG_CONTROL4 0x1E     ///< Control4 Register -#define DRV2605_REG_VBAT 0x21         ///< Vbat voltage-monitor register -#define DRV2605_REG_LRARESON 0x22     ///< LRA resonance-period register - -void eos_drv2605l_test(void) { -    uint8_t data = 0; -    int ret; - -    ret = eos_i2c_read8(DRV2605L_ADDR, DRV2605_REG_STATUS, &data); -    if (ret) ESP_LOGE(TAG, "I2C ERROR!"); - -    eos_i2c_write8(DRV2605L_ADDR, DRV2605_REG_MODE, 0x00);      // out of standby -    eos_i2c_write8(DRV2605L_ADDR, DRV2605_REG_RTPIN, 0x00);     // no real-time-playback - -    eos_i2c_write8(DRV2605L_ADDR, DRV2605_REG_WAVESEQ1, 1);     // strong click -    eos_i2c_write8(DRV2605L_ADDR, DRV2605_REG_WAVESEQ2, 0);     // end sequence - -    eos_i2c_write8(DRV2605L_ADDR, DRV2605_REG_OVERDRIVE, 0);    // no overdrive - -    eos_i2c_write8(DRV2605L_ADDR, DRV2605_REG_SUSTAINPOS, 0); -    eos_i2c_write8(DRV2605L_ADDR, DRV2605_REG_SUSTAINNEG, 0); -    eos_i2c_write8(DRV2605L_ADDR, DRV2605_REG_BREAK, 0); -    eos_i2c_write8(DRV2605L_ADDR, DRV2605_REG_AUDIOMAX, 0x64); - -    // LRA open loop -    eos_i2c_read8(DRV2605L_ADDR, DRV2605_REG_FEEDBACK, &data); -    eos_i2c_write8(DRV2605L_ADDR, DRV2605_REG_FEEDBACK, data | 0x80);   // turn on N_ERM_LRA -    eos_i2c_read8(DRV2605L_ADDR, DRV2605_REG_CONTROL3, &data); -    eos_i2c_write8(DRV2605L_ADDR, DRV2605_REG_CONTROL3, data | 0x01);   // turn on LRA_OPEN_LOOP - -    eos_i2c_write8(DRV2605L_ADDR, DRV2605_REG_LIBRARY, 6);      // set LRA library -    eos_i2c_write8(DRV2605L_ADDR, DRV2605_REG_GO, 1);           // go - -} diff --git a/fw/esp32/components/eos/include/bq25895.h b/fw/esp32/components/eos/include/bq25895.h deleted file mode 100644 index b5a7f92..0000000 --- a/fw/esp32/components/eos/include/bq25895.h +++ /dev/null @@ -1,3 +0,0 @@ -#include <stdint.h> - -void eos_bq25895_set_ilim(void);
\ No newline at end of file diff --git a/fw/esp32/components/eos/include/drv2605l.h b/fw/esp32/components/eos/include/drv2605l.h deleted file mode 100644 index de222e4..0000000 --- a/fw/esp32/components/eos/include/drv2605l.h +++ /dev/null @@ -1,3 +0,0 @@ -#include <stdint.h> - -void eos_drv2605l_test(void);
\ No newline at end of file diff --git a/fw/esp32/main/app_main.c b/fw/esp32/main/app_main.c index 8374c45..145739c 100644 --- a/fw/esp32/main/app_main.c +++ b/fw/esp32/main/app_main.c @@ -13,7 +13,6 @@  #include "wifi.h"  #include "sock.h"  #include "power.h" -#include "bq25895.h"  #define ESP_INTR_FLAG_DEFAULT   0 @@ -38,9 +37,6 @@ void app_main() {      eos_sock_init();      eos_power_init(); - -    eos_i2c_init(); -    eos_bq25895_set_ilim();  } diff --git a/fw/fe310/Makefile b/fw/fe310/Makefile index 69ac470..76b43bb 100644 --- a/fw/fe310/Makefile +++ b/fw/fe310/Makefile @@ -2,7 +2,7 @@ include common.mk  CFLAGS += -I./include -subdirs = bsp/drivers bsp/gloss bsp/metal eos eos/eve eos/eve/screen eos/eve/widget eos/app +subdirs = bsp/drivers bsp/gloss bsp/metal eos eos/i2c eos/eve eos/eve/screen eos/eve/widget eos/app  all: libeos.a diff --git a/fw/fe310/eos/eos.c b/fw/fe310/eos/eos.c index 91115f6..2a7f992 100644 --- a/fw/fe310/eos/eos.c +++ b/fw/fe310/eos/eos.c @@ -11,6 +11,7 @@  #include "wifi.h"  #include "cell.h"  #include "sock.h" +#include "i2c/bq25895.h"  #include "eve/eve.h"  #include "eos.h" @@ -33,6 +34,7 @@ void eos_init(void) {      eos_cell_init();      eos_sock_init();      eos_spi_dev_init(); +    eos_bq25895_init();      eos_net_wake(wakeup_cause); diff --git a/fw/fe310/eos/i2c/Makefile b/fw/fe310/eos/i2c/Makefile new file mode 100644 index 0000000..694fbf8 --- /dev/null +++ b/fw/fe310/eos/i2c/Makefile @@ -0,0 +1,17 @@ +include ../../common.mk + +CFLAGS += -I.. + +obj = bq25895.o + + +%.o: %.c %.h +	$(CC) $(CFLAGS) -c $< + +%.o: %.S +	$(CC) $(CFLAGS) -c $< + +all: $(obj) + +clean: +	rm -f *.o diff --git a/fw/fe310/eos/i2c/bq25895.c b/fw/fe310/eos/i2c/bq25895.c new file mode 100644 index 0000000..ab56904 --- /dev/null +++ b/fw/fe310/eos/i2c/bq25895.c @@ -0,0 +1,24 @@ +#include <stdlib.h> +#include <stdint.h> +#include <stdio.h> + +#include "eos.h" +#include "i2c.h" +#include "i2c/bq25895.h" + +void eos_bq25895_init(void) { +    uint8_t data = 0; +    int i, ret = EOS_OK; + +    eos_i2c_start(400000); +    eos_i2c_write8(BQ25895_ADDR, 0, 0x26);  // input current: 2.0 A +    eos_i2c_write8(BQ25895_ADDR, 2, 0x28); +    eos_i2c_write8(BQ25895_ADDR, 7, 0x8d); + +    printf("BQ25895:\n"); +    for (i=0; i<0x15; i++) { +        ret = eos_i2c_read8(BQ25895_ADDR, i, &data); +        if (!ret) printf("REG%02x: %02x\n", i, data); +    } +    eos_i2c_stop(); +} diff --git a/fw/fe310/eos/i2c/bq25895.h b/fw/fe310/eos/i2c/bq25895.h new file mode 100644 index 0000000..f61a46f --- /dev/null +++ b/fw/fe310/eos/i2c/bq25895.h @@ -0,0 +1,5 @@ +#include <stdint.h> + +#define BQ25895_ADDR        0x6A + +void eos_bq25895_init(void); diff --git a/fw/fe310/eos/i2c/drv2605.h b/fw/fe310/eos/i2c/drv2605.h new file mode 100644 index 0000000..fe90a9b --- /dev/null +++ b/fw/fe310/eos/i2c/drv2605.h @@ -0,0 +1,3 @@ +#include <stdint.h> + +#define DRV2605_ADDR        0x5A diff --git a/fw/fe310/eos/i2c/lsm9ds1.h b/fw/fe310/eos/i2c/lsm9ds1.h new file mode 100644 index 0000000..92220e7 --- /dev/null +++ b/fw/fe310/eos/i2c/lsm9ds1.h @@ -0,0 +1,4 @@ +#include <stdint.h> + +#define LSM9DS1_ADDR_AG     0x1E +#define LSM9DS1_ADDR_M      0x6B  | 
