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-rw-r--r--code/fe310/eos/Makefile2
-rw-r--r--code/fe310/eos/eos.c2
-rw-r--r--code/fe310/eos/i2s.c74
-rw-r--r--code/fe310/eos/i2s.h8
-rw-r--r--code/fe310/eos/net.c10
-rw-r--r--code/fe310/eos/spi_def.h3
-rw-r--r--code/fe310/eos/trap_entry.S39
7 files changed, 92 insertions, 46 deletions
diff --git a/code/fe310/eos/Makefile b/code/fe310/eos/Makefile
index a3fb640..f097327 100644
--- a/code/fe310/eos/Makefile
+++ b/code/fe310/eos/Makefile
@@ -5,7 +5,7 @@ FE310_HOME = /opt/my/freedom-e-sdk
CC = $(FE310_HOME)/work/build/riscv-gnu-toolchain/riscv64-unknown-elf/prefix/bin/riscv64-unknown-elf-gcc
AR = $(FE310_HOME)/work/build/riscv-gnu-toolchain/riscv64-unknown-elf/prefix/bin/riscv64-unknown-elf-ar
-CFLAGS = $(CFLAGS_PL) -I../..
+CFLAGS = $(CFLAGS_PL) -I../.. # -DEOS_WITH_SPI_ASM
obj = trap_entry.o eos.o msgq.o event.o interrupt.o timer.o i2s.o net.o ecp.o
diff --git a/code/fe310/eos/eos.c b/code/fe310/eos/eos.c
index 3ad3b68..ad80a47 100644
--- a/code/fe310/eos/eos.c
+++ b/code/fe310/eos/eos.c
@@ -13,5 +13,5 @@ void eos_init(void) {
}
void eos_start(void) {
- eos_net_start(15);
+ eos_net_start(511);
} \ No newline at end of file
diff --git a/code/fe310/eos/i2s.c b/code/fe310/eos/i2s.c
index 543102f..5d68f70 100644
--- a/code/fe310/eos/i2s.c
+++ b/code/fe310/eos/i2s.c
@@ -18,12 +18,11 @@
EOSABuf _eos_i2s_mic_buf;
EOSABuf _eos_i2s_spk_buf;
uint32_t _eos_i2s_ck_period = 0;
-uint32_t _eos_i2s_mic_wm = 0;
-uint32_t _eos_i2s_spk_wm = 0;
uint32_t _eos_i2s_mic_volume = 2;
uint32_t _eos_i2s_spk_volume = 3;
static eos_evt_fptr_t evt_handler[I2S_MAX_HANDLER];
uint32_t _eos_i2s_evt_enable[I2S_MAX_HANDLER];
+uint32_t _eos_i2s_wm[I2S_MAX_HANDLER];
static void _abuf_init(EOSABuf *buf, uint8_t *array, uint16_t size) {
buf->idx_r = 0;
@@ -123,6 +122,11 @@ void eos_i2s_init(uint32_t sample_rate) {
I2S_PWM_REG_WS(PWM_CMP1) = (_eos_i2s_ck_period + 1) * 32;
I2S_PWM_REG_WS(PWM_CMP2) = (_eos_i2s_ck_period + 1) * 64 - 512;
+ _eos_i2s_evt_enable[I2S_EVT_MIC] = 0;
+ _eos_i2s_evt_enable[I2S_EVT_SPK] = 0;
+ evt_handler[I2S_EVT_MIC] = NULL;
+ evt_handler[I2S_EVT_SPK] = NULL;
+
eos_intr_set(I2S_IRQ_SD_ID, 0, NULL);
eos_intr_set(I2S_IRQ_CK_ID, 0, NULL);
eos_intr_set(I2S_IRQ_WS_ID, 0, NULL);
@@ -133,29 +137,10 @@ void eos_i2s_init(uint32_t sample_rate) {
eos_evtq_set_handler(EOS_EVT_AUDIO, audio_handler, EOS_EVT_FLAG_WRAP);
}
-void eos_i2s_init_mic(uint8_t *mic_arr, uint16_t mic_arr_size, eos_evt_fptr_t mic_wm_handler, uint16_t mic_wm) {
- _abuf_init(&_eos_i2s_mic_buf, mic_arr, mic_arr_size);
- _eos_i2s_mic_wm = mic_wm;
- evt_handler[I2S_EVT_MIC] = mic_wm_handler;
- if (mic_wm) {
- _eos_i2s_evt_enable[I2S_EVT_MIC] = 1;
- } else {
- _eos_i2s_evt_enable[I2S_EVT_MIC] = 0;
- }
-}
-
-void eos_i2s_init_spk(uint8_t *spk_arr, uint16_t spk_arr_size, eos_evt_fptr_t spk_wm_handler, uint16_t spk_wm) {
- _abuf_init(&_eos_i2s_spk_buf, spk_arr, spk_arr_size);
- _eos_i2s_spk_wm = spk_wm;
- evt_handler[I2S_EVT_SPK] = spk_wm_handler;
- if (spk_wm) {
- _eos_i2s_evt_enable[I2S_EVT_SPK] = 1;
- } else {
- _eos_i2s_evt_enable[I2S_EVT_SPK] = 0;
- }
-}
-
void eos_i2s_start(void) {
+ _eos_i2s_evt_enable[I2S_EVT_MIC] = 1;
+ _eos_i2s_evt_enable[I2S_EVT_SPK] = 1;
+
eos_intr_set_priority(I2S_IRQ_SD_ID, I2S_IRQ_SD_PRIORITY);
eos_intr_set_priority(I2S_IRQ_CK_ID, I2S_IRQ_CK_PRIORITY);
eos_intr_set_priority(I2S_IRQ_WS_ID, I2S_IRQ_WS_PRIORITY);
@@ -185,8 +170,8 @@ void eos_i2s_stop(void) {
eos_intr_set_priority(I2S_IRQ_WS_ID, 0);
eos_intr_set_priority(I2S_IRQ_CI_ID, 0);
eos_intr_mask(0);
- eos_i2s_init_mic(NULL, 0, NULL, 0);
- eos_i2s_init_spk(NULL, 0, NULL, 0);
+ eos_i2s_mic_init(NULL, 0);
+ eos_i2s_spk_init(NULL, 0);
GPIO_REG(GPIO_IOF_EN) &= ~(1 << I2S_PIN_CK);
GPIO_REG(GPIO_IOF_SEL) &= ~(1 << I2S_PIN_CK);
@@ -197,6 +182,25 @@ void eos_i2s_stop(void) {
GPIO_REG(GPIO_OUTPUT_VAL) &= ~((1 << I2S_PIN_CK) | (1 << I2S_PIN_WS));
}
+void eos_i2s_mic_init(uint8_t *mic_arr, uint16_t mic_arr_size) {
+ clear_csr(mstatus, MSTATUS_MIE);
+ _abuf_init(&_eos_i2s_mic_buf, mic_arr, mic_arr_size);
+ set_csr(mstatus, MSTATUS_MIE);
+}
+
+void eos_i2s_mic_set_handler(eos_evt_fptr_t wm_handler) {
+ clear_csr(mstatus, MSTATUS_MIE);
+ evt_handler[I2S_EVT_MIC] = wm_handler;
+ set_csr(mstatus, MSTATUS_MIE);
+}
+
+void eos_i2s_mic_set_wm(uint16_t wm) {
+ clear_csr(mstatus, MSTATUS_MIE);
+ _eos_i2s_wm[I2S_EVT_MIC] = wm;
+ set_csr(mstatus, MSTATUS_MIE);
+
+}
+
uint16_t eos_i2s_mic_len(void) {
clear_csr(mstatus, MSTATUS_MIE);
uint16_t ret = _abuf_len(&_eos_i2s_mic_buf);
@@ -228,6 +232,24 @@ int eos_i2s_mic_pop(uint8_t *sample) {
return ret;
}
+void eos_i2s_spk_init(uint8_t *spk_arr, uint16_t spk_arr_size) {
+ clear_csr(mstatus, MSTATUS_MIE);
+ _abuf_init(&_eos_i2s_spk_buf, spk_arr, spk_arr_size);
+ set_csr(mstatus, MSTATUS_MIE);
+}
+
+void eos_i2s_spk_set_handler(eos_evt_fptr_t wm_handler) {
+ clear_csr(mstatus, MSTATUS_MIE);
+ evt_handler[I2S_EVT_SPK] = wm_handler;
+ set_csr(mstatus, MSTATUS_MIE);
+}
+
+void eos_i2s_spk_set_wm(uint16_t wm) {
+ clear_csr(mstatus, MSTATUS_MIE);
+ _eos_i2s_wm[I2S_EVT_SPK] = wm;
+ set_csr(mstatus, MSTATUS_MIE);
+}
+
uint16_t eos_i2s_spk_len(void) {
clear_csr(mstatus, MSTATUS_MIE);
uint16_t ret = _abuf_len(&_eos_i2s_spk_buf);
diff --git a/code/fe310/eos/i2s.h b/code/fe310/eos/i2s.h
index 7b267ec..4d65033 100644
--- a/code/fe310/eos/i2s.h
+++ b/code/fe310/eos/i2s.h
@@ -8,13 +8,17 @@ typedef struct EOSABuf {
} EOSABuf;
void eos_i2s_init(uint32_t sample_rate);
-void eos_i2s_init_mic(uint8_t *mic_arr, uint16_t mic_arr_size, eos_evt_fptr_t mic_wm_handler, uint16_t mic_wm);
-void eos_i2s_init_spk(uint8_t *spk_arr, uint16_t spk_arr_size, eos_evt_fptr_t spk_wm_handler, uint16_t spk_wm);
void eos_i2s_start(void);
void eos_i2s_stop(void);
+void eos_i2s_mic_init(uint8_t *mic_arr, uint16_t mic_arr_size);
+void eos_i2s_mic_set_handler(eos_evt_fptr_t wm_handler);
+void eos_i2s_mic_set_wm(uint16_t wm);
uint16_t eos_i2s_mic_len(void);
uint16_t eos_i2s_mic_read(uint8_t *sample, uint16_t ssize);
int eos_i2s_mic_pop(uint8_t *sample);
+void eos_i2s_spk_init(uint8_t *mic_arr, uint16_t mic_arr_size);
+void eos_i2s_spk_set_handler(eos_evt_fptr_t wm_handler);
+void eos_i2s_spk_set_wm(uint16_t wm);
uint16_t eos_i2s_spk_len(void);
uint16_t eos_i2s_spk_write(uint8_t *sample, uint16_t ssize);
int eos_i2s_spk_push(uint8_t sample);
diff --git a/code/fe310/eos/net.c b/code/fe310/eos/net.c
index 8213262..e024896 100644
--- a/code/fe310/eos/net.c
+++ b/code/fe310/eos/net.c
@@ -118,6 +118,8 @@ static void spi_handler_xchg(void) {
return;
} else if (_eos_spi_state_flags & SPI_FLAG_INIT) {
_eos_spi_state_flags &= ~SPI_FLAG_INIT;
+ SPI1_REG(SPI_REG_TXCTRL) = SPI_TXWM(SPI_SIZE_WM);
+ SPI1_REG(SPI_REG_IE) = SPI_IP_TXWM;
r1 = SPI1_REG(SPI_REG_RXFIFO);
r2 = SPI1_REG(SPI_REG_RXFIFO);
@@ -139,8 +141,10 @@ static void spi_handler_xchg(void) {
_eos_spi_state_len = ((_eos_spi_state_len + 2)/4 + 1) * 4 - 2;
}
- SPI1_REG(SPI_REG_TXCTRL) = SPI_TXWM(SPI_SIZE_WM);
- SPI1_REG(SPI_REG_IE) = SPI_IP_TXWM;
+ if (_eos_spi_state_len > SPI_SIZE_BUF) {
+ SPI1_REG(SPI_REG_CSMODE) = SPI_CSMODE_AUTO;
+ SPI1_REG(SPI_REG_IE) = 0x0;
+ }
return;
}
@@ -173,7 +177,7 @@ static void spi_handler_xchg(void) {
spi_bufq_push(_eos_spi_state_buf);
}
} else if (_eos_spi_state_idx_tx == _eos_spi_state_len) {
- SPI1_REG(SPI_REG_RXCTRL) = SPI_RXWM(MIN(_eos_spi_state_len - _eos_spi_state_idx_rx - 1, SPI_SIZE_CHUNK - 1));
+ SPI1_REG(SPI_REG_RXCTRL) = SPI_RXWM(MIN(_eos_spi_state_len - _eos_spi_state_idx_rx - 1, SPI_SIZE_WM - 1));
SPI1_REG(SPI_REG_IE) = SPI_IP_RXWM;
}
}
diff --git a/code/fe310/eos/spi_def.h b/code/fe310/eos/spi_def.h
index 4c558fb..69ca168 100644
--- a/code/fe310/eos/spi_def.h
+++ b/code/fe310/eos/spi_def.h
@@ -6,8 +6,9 @@
#define SPI_MODE2 0x02
#define SPI_MODE3 0x03
+/* DO NOT TOUCH THEESE */
#define SPI_SIZE_CHUNK 4
-#define SPI_SIZE_WM 4
+#define SPI_SIZE_WM 2
#define SPI_PIN_RTS 0 // pin 8
#define SPI_PIN_CTS 23 // pin 7
diff --git a/code/fe310/eos/trap_entry.S b/code/fe310/eos/trap_entry.S
index 33f863b..0c5278b 100644
--- a/code/fe310/eos/trap_entry.S
+++ b/code/fe310/eos/trap_entry.S
@@ -87,12 +87,14 @@ eos_trap_entry:
beq x9, x18, i2s_handler_ws
li x18, I2S_IRQ_CI_ID
beq x9, x18, i2s_handler_ci
+#ifdef EOS_WITH_SPI_ASM
li x18, INT_SPI1_BASE
beq x9, x18, spi_handler_xchg
li x18, INT_GPIO_BASE + SPI_PIN_CTS
beq x9, x18, spi_handler_cts
li x18, INT_GPIO_BASE + SPI_PIN_RTS
beq x9, x18, spi_handler_rts
+#endif
j handler
i2s_handler_sd:
@@ -239,7 +241,7 @@ i2s_handler_sd:
5:
# check for push to event queue
- la x9, _eos_i2s_mic_wm
+ la x9, _eos_i2s_wm
lw x20, 0(x9)
beqz x20, i2s_handler_sd_exit
bltu x18, x20, i2s_handler_sd_exit
@@ -391,6 +393,8 @@ i2s_handler_ci_exit:
# exit
j trap_exit_data
+#ifdef EOS_WITH_SPI_ASM
+
# x9 - cmd, x18 - buffer, x19 - len, x20 - &flags, x21 - flags
spi_xchg_start:
ori x21, x21, SPI_FLAG_INIT
@@ -453,7 +457,7 @@ spi_handler_xchg:
la x18, _eos_spi_state_flags
lbu x20, 0(x18)
andi x8, x20, SPI_FLAG_RST
- beqz x8, 1f
+ beqz x8, 0f
andi x20, x20, ~SPI_FLAG_RST
sb x20, 0(x18)
@@ -463,7 +467,7 @@ spi_handler_xchg:
sw x0, SPI_REG_IE(x19)
j spi_handler_xchg_exit
-1:
+0:
andi x8, x20, SPI_FLAG_INIT
beqz x8, 6f
@@ -480,10 +484,10 @@ spi_handler_xchg:
la x18, _eos_spi_state_cmd
lbu x23, 0(x18)
andi x23, x23, EOS_NET_CMD_FLAG_ONEW
- beqz x23, 2f
+ beqz x23, 1f
mv x8, x0
mv x9, x0
-2:
+1:
srli x23, x8, 3
sb x23, 0(x18)
andi x22, x8, 0x07
@@ -493,24 +497,33 @@ spi_handler_xchg:
sw x22, 0(x18)
la x18, _eos_spi_state_len_tx
lw x21, 0(x18)
- bgeu x21, x22, 3f
+ bgeu x21, x22, 2f
mv x21, x22
-3:
+2:
li x8, 6
- bgeu x21, x8, 4f
+ bgeu x21, x8, 3f
mv x21, x8
- j 5f
-4:
+ j 4f
+3:
addi x8, x21, 2
li x9, 4
remu x18, x8, x9
- beqz x18, 5f
+ beqz x18, 4f
divu x21, x8, x9
addi x21, x21, 1
mul x21, x21, x9
addi x21, x21, -2
+4:
+ li x8, SPI_SIZE_BUF + 1
+ bltu x21, x8, 5f
+ li x8, SPI_CSMODE_AUTO
+ sw x8, SPI_REG_CSMODE(x19)
+ sw x0, SPI_REG_IE(x19)
+
+ j spi_handler_xchg_exit
+
5:
la x18, _eos_spi_state_len
sw x21, 0(x18)
@@ -622,7 +635,7 @@ spi_handler_xchg:
bne x21, x20, spi_handler_xchg_exit
sub x8, x20, x22
addi x8, x8, -1
- li x9, SPI_SIZE_CHUNK - 1
+ li x9, SPI_SIZE_WM - 1
bltu x8, x9, 16f
mv x8, x9
16:
@@ -787,6 +800,8 @@ spi_handler_rts_exit:
# exit
j trap_exit_data
+#endif /* EOS_WITH_SPI_ASM */
+
trap_exit_data:
# Remain in M-mode after mret
li x18, MSTATUS_MPP
generated by cgit v1.2.3 (git 2.25.1) at 2024-09-20 14:26:01 +0000