diff options
Diffstat (limited to 'fw/fe310/eos/dev/drv')
-rw-r--r-- | fw/fe310/eos/dev/drv/arducam.c | 28 | ||||
-rw-r--r-- | fw/fe310/eos/dev/drv/gt911.c | 14 | ||||
-rw-r--r-- | fw/fe310/eos/dev/drv/gt911.h | 1 | ||||
-rw-r--r-- | fw/fe310/eos/dev/drv/ili9806e.c | 22 | ||||
-rw-r--r-- | fw/fe310/eos/dev/drv/pcm1770.c | 4 | ||||
-rw-r--r-- | fw/fe310/eos/dev/drv/platform.h | 23 | ||||
-rw-r--r-- | fw/fe310/eos/dev/drv/sdc_platform.h | 16 | ||||
-rw-r--r-- | fw/fe310/eos/dev/drv/sdcard.c | 33 | ||||
-rw-r--r-- | fw/fe310/eos/dev/drv/sdcard.h | 4 |
9 files changed, 83 insertions, 62 deletions
diff --git a/fw/fe310/eos/dev/drv/arducam.c b/fw/fe310/eos/dev/drv/arducam.c index a50830a..8ac3823 100644 --- a/fw/fe310/eos/dev/drv/arducam.c +++ b/fw/fe310/eos/dev/drv/arducam.c @@ -36,21 +36,21 @@ #define ARDUCAM_VAL_GPIO_PWREN 0x04 static uint8_t reg_read(uint8_t addr) { - uint8_t ret; + uint8_t rv; - drv_spi_cs_set(); + drv_spi_set_cs(); drv_spi_xchg8(addr, 0); - ret = drv_spi_xchg8(0, 0); - drv_spi_cs_clear(); + rv = drv_spi_xchg8(0, 0); + drv_spi_clear_cs(); - return ret; + return rv; } static void reg_write(uint8_t addr, uint8_t val) { - drv_spi_cs_set(); + drv_spi_set_cs(); drv_spi_xchg8(addr | 0x80, 0); drv_spi_xchg8(val, 0); - drv_spi_cs_clear(); + drv_spi_clear_cs(); } void arducam_capture(void) { @@ -70,25 +70,25 @@ void arducam_capture_wait(void) { } uint32_t arducam_fbuf_size(void) { - uint32_t ret; + uint32_t rv; - ret = reg_read(ARDUCAM_REG_FIFO_SIZE1); - ret |= reg_read(ARDUCAM_REG_FIFO_SIZE2) << 8; - ret |= (reg_read(ARDUCAM_REG_FIFO_SIZE3) & 0x7f) << 16; - return ret; + rv = reg_read(ARDUCAM_REG_FIFO_SIZE1); + rv |= reg_read(ARDUCAM_REG_FIFO_SIZE2) << 8; + rv |= (reg_read(ARDUCAM_REG_FIFO_SIZE3) & 0x7f) << 16; + return rv; } void arducam_fbuf_read(uint8_t *buffer, uint16_t sz, int first) { int i; - drv_spi_cs_set(); + drv_spi_set_cs(); drv_spi_xchg8(ARDUCAM_REG_READ_BURST, 0); if (first) drv_spi_xchg8(0, 0); for (i=0; i<sz; i++) { buffer[i] = drv_spi_xchg8(0, 0); } - drv_spi_cs_clear(); + drv_spi_clear_cs(); } void arducam_fbuf_done(void) { diff --git a/fw/fe310/eos/dev/drv/gt911.c b/fw/fe310/eos/dev/drv/gt911.c index cd71d9a..8eb4358 100644 --- a/fw/fe310/eos/dev/drv/gt911.c +++ b/fw/fe310/eos/dev/drv/gt911.c @@ -124,6 +124,10 @@ void gt911_wake(void) { drv_gpio_set(GPIO_INPUT_EN, GT911_PIN_INT); } +int gt911_running(void) { + return drv_gpio_get(GPIO_INPUT_EN, GT911_PIN_INT); +} + int gt911_cfg_read(uint8_t *cfg_buf) { int rv; @@ -148,20 +152,20 @@ int gt911_cfg_print(void) { rv = gt911_cfg_read(cfg_buf); if (rv) return rv; - printf("GT911 CFG:\n"); + DRV_LOG(DRV_LOG_INFO, "GT911 CFG:\n"); for (i=0; i<GT911_SIZE_CFG-2; i++) { - printf("%.2X", cfg_buf[i]); + DRV_LOG(DRV_LOG_INFO, "%.2X", cfg_buf[i]); if (i % 8 == 7) { - printf("\n"); + DRV_LOG(DRV_LOG_INFO, "\n"); } else { - printf(" "); + DRV_LOG(DRV_LOG_INFO, " "); } } rv = gt911_fw_ver(cfg_buf); if (rv) return rv; - printf("GT911 FW VER:%.2X%.2X\n", cfg_buf[1], cfg_buf[0]); + DRV_LOG(DRV_LOG_INFO, "GT911 FW VER:%.2X%.2X\n", cfg_buf[1], cfg_buf[0]); return DRV_OK; } diff --git a/fw/fe310/eos/dev/drv/gt911.h b/fw/fe310/eos/dev/drv/gt911.h index 9db6981..61a6593 100644 --- a/fw/fe310/eos/dev/drv/gt911.h +++ b/fw/fe310/eos/dev/drv/gt911.h @@ -10,6 +10,7 @@ void gt911_reset(void); int gt911_sleep(void); void gt911_wake(void); +int gt911_running(void); int gt911_cfg_read(uint8_t *cfg_buf); int gt911_cfg_write(uint8_t *cfg_buf); diff --git a/fw/fe310/eos/dev/drv/ili9806e.c b/fw/fe310/eos/dev/drv/ili9806e.c index 45aabb7..b57a14c 100644 --- a/fw/fe310/eos/dev/drv/ili9806e.c +++ b/fw/fe310/eos/dev/drv/ili9806e.c @@ -5,15 +5,11 @@ #include "platform.h" #include "ili9806e.h" -#ifdef DRV_DEBUG -#include <stdio.h> -#endif - int ili9806e_init(void) { int rv; uint8_t chip_id[3]; - drv_spi_cs_set(); + drv_spi_set_cs(); /* LCD Setting */ drv_spi9bit_write(0, 0xFF); // change to Page 1 CMD @@ -38,15 +34,13 @@ int ili9806e_init(void) { drv_spi9bit_write(0, 0x02); drv_spi9bit_read(&chip_id[2]); -#ifdef DRV_DEBUG - printf("LCD CHIP ID: %.2x%.2x%.2x\n", chip_id[0], chip_id[1], chip_id[2]); -#endif + DRV_LOG(DRV_LOG_INFO, "LCD CHIP ID: %.2x%.2x%.2x\n", chip_id[0], chip_id[1], chip_id[2]); drv_spi9bit_write(0, 0xFE); // disable read drv_spi9bit_write(1, 0x00); if (memcmp(chip_id, "\x98\x06\x04", sizeof(chip_id))) { - drv_spi_cs_clear(); + drv_spi_clear_cs(); return DRV_ERR_NOTFOUND; } @@ -404,28 +398,28 @@ int ili9806e_init(void) { drv_spi9bit_write(0, 0x29); drv_sleep(25); - drv_spi_cs_clear(); + drv_spi_clear_cs(); return DRV_OK; } void ili9806e_sleep(void) { - drv_spi_cs_set(); + drv_spi_set_cs(); drv_spi9bit_write(0, 0x28); drv_sleep(10); drv_spi9bit_write(0, 0x10); - drv_spi_cs_clear(); + drv_spi_clear_cs(); } void ili9806e_wake(void) { - drv_spi_cs_set(); + drv_spi_set_cs(); drv_spi9bit_write(0, 0x11); drv_sleep(120); drv_spi9bit_write(0, 0x29); - drv_spi_cs_clear(); + drv_spi_clear_cs(); } diff --git a/fw/fe310/eos/dev/drv/pcm1770.c b/fw/fe310/eos/dev/drv/pcm1770.c index c617ae9..eec7bd0 100644 --- a/fw/fe310/eos/dev/drv/pcm1770.c +++ b/fw/fe310/eos/dev/drv/pcm1770.c @@ -5,8 +5,8 @@ #include "pcm1770.h" void pcm1770_reg_write(uint8_t addr, uint8_t val) { - drv_spi_cs_set(); + drv_spi_set_cs(); drv_spi_xchg8(addr, 0); drv_spi_xchg8(val, 0); - drv_spi_cs_clear(); + drv_spi_clear_cs(); } diff --git a/fw/fe310/eos/dev/drv/platform.h b/fw/fe310/eos/dev/drv/platform.h index d1f7248..a2405d5 100644 --- a/fw/fe310/eos/dev/drv/platform.h +++ b/fw/fe310/eos/dev/drv/platform.h @@ -1,6 +1,7 @@ #include "board.h" #include "eos.h" +#include "log.h" #include "soc/timer.h" #include "soc/i2c.h" #include "soc/spi.h" @@ -16,17 +17,18 @@ #define DRV_ERR EOS_ERR #define DRV_ERR_NOTFOUND EOS_ERR_NOTFOUND -/* should define theese for non-EOS platforms: -#define GPIO_INPUT_EN -#define GPIO_OUTPUT_EN -#define GPIO_OUTPUT_VAL -*/ +#define DRV_LOG_DEBUG EOS_LOG_DEBUG +#define DRV_LOG_INFO EOS_LOG_INFO +#define DRV_LOG_ERR EOS_LOG_ERR +#define DRV_LOG_NONE EOS_LOG_NONE +#define DRV_LOG_LEVEL EOS_LOG_LEVEL +#define DRV_LOG(l, ...) EOS_LOG(l, __VA_ARGS__) #define GT911_PIN_INT CTP_PIN_INT #define GT911_PIN_RST CTP_PIN_RST -#define drv_spi_cs_set eos_spi_cs_set -#define drv_spi_cs_clear eos_spi_cs_clear +#define drv_spi_set_cs eos_spi_set_cs +#define drv_spi_clear_cs eos_spi_clear_cs #define drv_spi_xchg8 eos_spi_xchg8 #define drv_spi9bit_read eos_spi9bit_read #define drv_spi9bit_write eos_spi9bit_write @@ -38,5 +40,12 @@ #define drv_sleep eos_sleep +/* should define theese for non-EOS platforms: +#define GPIO_INPUT_EN +#define GPIO_OUTPUT_EN +#define GPIO_OUTPUT_VAL +*/ + +#define drv_gpio_get eos_gpio_get #define drv_gpio_set eos_gpio_set #define drv_gpio_clear eos_gpio_clear diff --git a/fw/fe310/eos/dev/drv/sdc_platform.h b/fw/fe310/eos/dev/drv/sdc_platform.h index 5d562c2..daf2670 100644 --- a/fw/fe310/eos/dev/drv/sdc_platform.h +++ b/fw/fe310/eos/dev/drv/sdc_platform.h @@ -1,19 +1,31 @@ /* included from sdcard.h - needs relative includes */ #include "../../eos.h" +#include "../../log.h" #include "../../soc/timer.h" #include "../../soc/spi.h" #include "../sdc_crypto.h" +#ifdef EOS_DEBUG +#define SDC_DEBUG +#endif + #define SDC_OK EOS_OK #define SDC_ERR EOS_ERR #define SDC_ERR_BUSY EOS_ERR_BUSY +#define SDC_LOG_DEBUG EOS_LOG_DEBUG +#define SDC_LOG_INFO EOS_LOG_INFO +#define SDC_LOG_ERR EOS_LOG_ERR +#define SDC_LOG_NONE EOS_LOG_NONE +#define SDC_LOG_LEVEL EOS_LOG_LEVEL +#define SDC_LOG(l, ...) EOS_LOG(l, __VA_ARGS__) + #define sdc_spi_xchg8 eos_spi_xchg8 #define sdc_spi_xchg16 eos_spi_xchg16 #define sdc_spi_xchg32 eos_spi_xchg32 -#define sdc_spi_cs_set eos_spi_cs_set -#define sdc_spi_cs_clear eos_spi_cs_clear +#define sdc_spi_set_cs eos_spi_set_cs +#define sdc_spi_clear_cs eos_spi_clear_cs #define sdc_sleep eos_sleep #define sdc_get_tick eos_get_tick #define sdc_tdelta_ms eos_tdelta_ms diff --git a/fw/fe310/eos/dev/drv/sdcard.c b/fw/fe310/eos/dev/drv/sdcard.c index 96b01ae..7d21b3d 100644 --- a/fw/fe310/eos/dev/drv/sdcard.c +++ b/fw/fe310/eos/dev/drv/sdcard.c @@ -126,18 +126,18 @@ static void sdc_buf_recv(unsigned char *buffer, uint16_t len) { } static void sdc_select(void) { - sdc_spi_cs_set(); + sdc_spi_set_cs(); sdc_spi_xchg8(0xff, 0); } static void sdc_deselect(void) { - sdc_spi_cs_clear(); + sdc_spi_clear_cs(); sdc_spi_xchg8(0xff, 0); } static int sdc_xchg_cmd(uint8_t cmd, uint32_t arg, uint8_t flags) { int i; - uint8_t ret; + uint8_t rv; uint8_t crc = 0x7f; cmd |= 0x40; @@ -156,11 +156,11 @@ static int sdc_xchg_cmd(uint8_t cmd, uint32_t arg, uint8_t flags) { i = SDC_NCR; do { - ret = sdc_xchg8(0xff); - } while ((ret & 0x80) && --i); - if (ret & 0x80) return SDC_ERR_BUSY; + rv = sdc_xchg8(0xff); + } while ((rv & 0x80) && --i); + if (rv & 0x80) return SDC_ERR_BUSY; - return ret; + return rv; } static int sdc_ready(uint32_t timeout) { @@ -256,11 +256,12 @@ int sdc_init(uint32_t timeout) { uint32_t start; start = sdc_get_tick(); - sdc_sleep(5); - for (i=10; i--;) sdc_xchg8(0xff); /* 80 dummy cycles */ + do { + if (sdc_tdelta_ms(start) > timeout) return SDC_ERR_BUSY; + for (i=10; i--;) sdc_xchg8(0xff); /* 80 dummy cycles */ - rv = sdc_cmd(GO_IDLE_STATE, 0, SDC_CMD_FLAG_CRC, SDC_TIMEOUT_CMD); - if (rv != SDC_R1_IDLE_STATE) return SDC_RV2ERR(rv); + rv = sdc_cmd(GO_IDLE_STATE, 0, SDC_CMD_FLAG_CRC, SDC_TIMEOUT_CMD); + } while (rv != SDC_R1_IDLE_STATE); sdc_select(); rv = sdc_cmd(SEND_IF_COND, 0x1aa, SDC_CMD_FLAG_CRC | SDC_CMD_FLAG_NOCS, sdc_nto(start, timeout)); @@ -341,11 +342,11 @@ int sdc_init(uint32_t timeout) { if (rv) return rv; #ifdef SDC_DEBUG - printf("SDCARD CSD: "); + SDC_LOG(SDC_LOG_INFO, "SDCARD CSD: "); for (i=0; i<16; i++) { - printf("%.2x ", csd[i]); + SDC_LOG(SDC_LOG_INFO, "%.2x ", csd[i]); } - printf("\n"); + SDC_LOG(SDC_LOG_INFO, "\n"); #endif if (csd[10] & 0x40) _type |= SDC_CAP_ERASE_EN; } @@ -366,7 +367,7 @@ void sdc_clear(void) { sdc_type = SDC_TYPE_NONE; } -int sdc_get_sect_count(uint32_t timeout, uint32_t *sectors) { +int sdc_get_sect_count(uint32_t *sectors, uint32_t timeout) { int rv; uint8_t csd[16]; uint32_t start; @@ -393,7 +394,7 @@ int sdc_get_sect_count(uint32_t timeout, uint32_t *sectors) { return SDC_OK; } -int sdc_get_blk_size(uint32_t timeout, uint32_t *size) { +int sdc_get_blk_size(uint32_t *size, uint32_t timeout) { int rv; uint8_t rbl[64]; /* SD Status or CSD register */ uint32_t start; diff --git a/fw/fe310/eos/dev/drv/sdcard.h b/fw/fe310/eos/dev/drv/sdcard.h index 39891bb..b4da896 100644 --- a/fw/fe310/eos/dev/drv/sdcard.h +++ b/fw/fe310/eos/dev/drv/sdcard.h @@ -20,8 +20,8 @@ uint8_t sdc_get_type(void); uint8_t sdc_get_cap(void); void sdc_clear(void); -int sdc_get_sect_count(uint32_t timeout, uint32_t *sectors); -int sdc_get_blk_size(uint32_t timeout, uint32_t *size); +int sdc_get_sect_count(uint32_t *sectors, uint32_t timeout); +int sdc_get_blk_size(uint32_t *size, uint32_t timeout); int sdc_sync(uint32_t timeout); int sdc_erase(uint32_t blk_start, uint32_t blk_end, uint32_t timeout); int sdc_sect_read(uint32_t sect, unsigned int count, uint8_t *buffer); |