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authorUros Majstorovic <majstor@majstor.org>2019-10-18 18:54:04 +0200
committerUros Majstorovic <majstor@majstor.org>2019-10-18 18:54:04 +0200
commit15385be32753cd928c708e9478eda546c3eb1644 (patch)
tree6a193ce6cf425ae16c752a57c21689307d989738
parent85500fe0d01b691a9bdd8c2330d26d66bc2bc177 (diff)
fixed interrupt priority defs
-rw-r--r--code/fe310/eos/i2s.c3
-rw-r--r--code/fe310/eos/i2s_def.h3
-rw-r--r--code/fe310/eos/irq_def.h7
-rw-r--r--code/fe310/eos/net.c5
-rw-r--r--code/fe310/eos/spi.c3
-rw-r--r--code/fe310/eos/trap_entry.S3
6 files changed, 16 insertions, 8 deletions
diff --git a/code/fe310/eos/i2s.c b/code/fe310/eos/i2s.c
index 12a482f..3d3e007 100644
--- a/code/fe310/eos/i2s.c
+++ b/code/fe310/eos/i2s.c
@@ -10,6 +10,7 @@
#include "i2s.h"
#include "i2s_def.h"
+#include "irq_def.h"
#define I2S_PWM_REG_CK PWM0_REG
#define I2S_PWM_REG_WS_MIC PWM1_REG
@@ -169,7 +170,7 @@ void eos_i2s_start(uint32_t sample_rate, unsigned char fmt) {
_eos_i2s_mic_evt_enable = 1;
_eos_i2s_spk_evt_enable = 1;
- eos_intr_set_priority(I2S_IRQ_WS_ID, I2S_IRQ_WS_PRIORITY);
+ eos_intr_set_priority(I2S_IRQ_WS_ID, IRQ_PRIORITY_I2S_WS);
eos_intr_set_priority(I2S_IRQ_SD_ID, 0);
eos_intr_enable(I2S_IRQ_WS_ID);
eos_intr_enable(I2S_IRQ_SD_ID);
diff --git a/code/fe310/eos/i2s_def.h b/code/fe310/eos/i2s_def.h
index a1b087d..f2e8aa1 100644
--- a/code/fe310/eos/i2s_def.h
+++ b/code/fe310/eos/i2s_def.h
@@ -12,9 +12,6 @@
#define I2S_IRQ_WS_ID (INT_PWM2_BASE + 0)
#define I2S_IRQ_SD_ID (INT_PWM2_BASE + 2)
-#define I2S_IRQ_WS_PRIORITY 6
-#define I2S_IRQ_SD_PRIORITY 7
-
#define I2S_IDLE_CYCLES 8
#define I2S_PWM_SCALE_CK 2
diff --git a/code/fe310/eos/irq_def.h b/code/fe310/eos/irq_def.h
new file mode 100644
index 0000000..4584b01
--- /dev/null
+++ b/code/fe310/eos/irq_def.h
@@ -0,0 +1,7 @@
+#define IRQ_PRIORITY_I2S_SD 7
+#define IRQ_PRIORITY_I2S_WS 6
+
+#define IRQ_PRIORITY_SPI_XCHG 5
+
+#define IRQ_PRIORITY_NET_CTS 4
+#define IRQ_PRIORITY_NET_RTS 4 \ No newline at end of file
diff --git a/code/fe310/eos/net.c b/code/fe310/eos/net.c
index 7d1803d..2d5e05e 100644
--- a/code/fe310/eos/net.c
+++ b/code/fe310/eos/net.c
@@ -14,6 +14,7 @@
#include "net.h"
#include "net_def.h"
+#include "irq_def.h"
#define MIN(X, Y) (((X) < (Y)) ? (X) : (Y))
#define MAX(X, Y) (((X) > (Y)) ? (X) : (Y))
@@ -247,14 +248,14 @@ void eos_net_init(void) {
GPIO_REG(GPIO_PULLUP_EN) |= (1 << NET_PIN_CTS);
GPIO_REG(GPIO_INPUT_EN) |= (1 << NET_PIN_CTS);
GPIO_REG(GPIO_RISE_IE) |= (1 << NET_PIN_CTS);
- eos_intr_set(INT_GPIO_BASE + NET_PIN_CTS, 4, net_handler_cts);
+ eos_intr_set(INT_GPIO_BASE + NET_PIN_CTS, IRQ_PRIORITY_NET_CTS, net_handler_cts);
GPIO_REG(GPIO_OUTPUT_EN) &= ~(1 << NET_PIN_RTS);
GPIO_REG(GPIO_PULLUP_EN) |= (1 << NET_PIN_RTS);
GPIO_REG(GPIO_INPUT_EN) |= (1 << NET_PIN_RTS);
GPIO_REG(GPIO_RISE_IE) |= (1 << NET_PIN_RTS);
GPIO_REG(GPIO_FALL_IE) |= (1 << NET_PIN_RTS);
- eos_intr_set(INT_GPIO_BASE + NET_PIN_RTS, 4, net_handler_rts);
+ eos_intr_set(INT_GPIO_BASE + NET_PIN_RTS, IRQ_PRIORITY_NET_RTS, net_handler_rts);
net_bufq_init();
eos_msgq_init(&net_send_q, net_sndq_array, NET_SIZE_BUFQ);
diff --git a/code/fe310/eos/spi.c b/code/fe310/eos/spi.c
index 86a967d..abc7de5 100644
--- a/code/fe310/eos/spi.c
+++ b/code/fe310/eos/spi.c
@@ -12,6 +12,7 @@
#include "net.h"
#include "spi.h"
#include "spi_def.h"
+#include "irq_def.h"
#define MIN(X, Y) (((X) < (Y)) ? (X) : (Y))
#define MAX(X, Y) (((X) > (Y)) ? (X) : (Y))
@@ -89,7 +90,7 @@ void eos_spi_init(void) {
// There is no way here to change the CS polarity.
// SPI1_REG(SPI_REG_CSDEF) = 0xFFFF;
- eos_intr_set(INT_SPI1_BASE, 5, NULL);
+ eos_intr_set(INT_SPI1_BASE, IRQ_PRIORITY_SPI_XCHG, NULL);
eos_evtq_set_handler(EOS_EVT_SPI, spi_handler_evt);
eos_spi_dev_release();
}
diff --git a/code/fe310/eos/trap_entry.S b/code/fe310/eos/trap_entry.S
index 91a44dc..efa61ec 100644
--- a/code/fe310/eos/trap_entry.S
+++ b/code/fe310/eos/trap_entry.S
@@ -43,6 +43,7 @@
#include "net_def.h"
#include "spi_def.h"
+#include "irq_def.h"
.section .data.entry
@@ -359,7 +360,7 @@ i2s_handler_sd_exit:
i2s_handler_ws:
# enable sd irq
li x18, PLIC_PRIORITY
- li x19, I2S_IRQ_SD_PRIORITY
+ li x19, IRQ_PRIORITY_I2S_SD
sw x19, 4*I2S_IRQ_SD_ID(x18)
# complete