summaryrefslogtreecommitdiff
path: root/fw/fe310/bsp/metal/metal.c
diff options
context:
space:
mode:
authorUros Majstorovic <majstor@majstor.org>2020-08-05 03:39:22 +0200
committerUros Majstorovic <majstor@majstor.org>2020-08-05 03:39:22 +0200
commitcf7c06297d04bade9cd04c056f9ed510e64dd7bd (patch)
treea3b8cc23574b98e10874b51d33c9fe1bfc012663 /fw/fe310/bsp/metal/metal.c
parent5cd610a07468137066ea4daa5176c3e7045113b0 (diff)
code -> fw
Diffstat (limited to 'fw/fe310/bsp/metal/metal.c')
-rw-r--r--fw/fe310/bsp/metal/metal.c34
1 files changed, 34 insertions, 0 deletions
diff --git a/fw/fe310/bsp/metal/metal.c b/fw/fe310/bsp/metal/metal.c
new file mode 100644
index 0000000..00849b9
--- /dev/null
+++ b/fw/fe310/bsp/metal/metal.c
@@ -0,0 +1,34 @@
+#include <sys/cdefs.h>
+
+#include "encoding.h"
+#include "platform.h"
+#include "prci_driver.h"
+
+extern void eos_trap_entry();
+
+static void uart_init(size_t baud_rate) {
+ GPIO_REG(GPIO_IOF_SEL) &= ~IOF0_UART0_MASK;
+ GPIO_REG(GPIO_IOF_EN) |= IOF0_UART0_MASK;
+ UART0_REG(UART_REG_DIV) = PRCI_get_cpu_freq() / baud_rate - 1;
+ UART0_REG(UART_REG_TXCTRL) |= UART_TXEN;
+ UART0_REG(UART_REG_RXCTRL) |= UART_RXEN;
+}
+
+__attribute__((constructor))
+void metal_init(void) {
+ SPI0_REG(SPI_REG_SCKDIV) = 8;
+
+ PRCI_use_default_clocks();
+ PRCI_use_pll(PLL_REFSEL_HFXOSC, 0, 1, 31, 1, -1, -1, -1);
+ uart_init(115200);
+
+ write_csr(mtvec, &eos_trap_entry);
+ if (read_csr(misa) & (1 << ('F' - 'A'))) { // if F extension is present
+ write_csr(mstatus, MSTATUS_FS); // allow FPU instructions without trapping
+ write_csr(fcsr, 0); // initialize rounding mode, undefined at reset
+ }
+}
+
+__attribute__((section(".init")))
+void __metal_synchronize_harts() {
+}