diff options
| author | Uros Majstorovic <majstor@majstor.org> | 2021-10-01 04:16:49 +0200 |
|---|---|---|
| committer | Uros Majstorovic <majstor@majstor.org> | 2021-10-01 04:16:49 +0200 |
| commit | 5ae72474e3116df141c5700902e54e516b68e6e0 (patch) | |
| tree | b0e1852f2bab908370639d02a6c531980dfd3d23 /hw/panel/panel.pro | |
| parent | 498fb8b691aaa62ec12b7326361140321c1a8220 (diff) | |
HW REV 3.0
Diffstat (limited to 'hw/panel/panel.pro')
| -rw-r--r-- | hw/panel/panel.pro | 116 |
1 files changed, 14 insertions, 102 deletions
diff --git a/hw/panel/panel.pro b/hw/panel/panel.pro index 98fdddd..5acf488 100644 --- a/hw/panel/panel.pro +++ b/hw/panel/panel.pro @@ -1,4 +1,4 @@ -update=Tuesday, June 29, 2021 at 02:35:56 AM +update=Sunday, September 26, 2021 at 10:41:17 AM version=1 last_client=pcbnew [general] @@ -23,30 +23,30 @@ AllowBlindVias=0 RequireCourtyardDefinitions=0 ProhibitOverlappingCourtyards=1 MinTrackWidth=0.1524 -MinViaDiameter=0.5 +MinViaDiameter=0.4 MinViaDrill=0.2 MinMicroViaDiameter=0.2 MinMicroViaDrill=0.09999999999999999 MinHoleToHole=0.25 -TrackWidth1=0.25 -ViaDiameter1=0.6 -ViaDrill1=0.3 +TrackWidth1=0.1524 +ViaDiameter1=0.508 +ViaDrill1=0.254 dPairWidth1=0.2 dPairGap1=0.25 dPairViaGap1=0.25 -SilkLineWidth=0.05 -SilkTextSizeV=0.6 -SilkTextSizeH=0.6 -SilkTextSizeThickness=0.125 +SilkLineWidth=0.12 +SilkTextSizeV=1 +SilkTextSizeH=1 +SilkTextSizeThickness=0.15 SilkTextItalic=0 SilkTextUpright=1 CopperLineWidth=0.2 -CopperTextSizeV=0.5 -CopperTextSizeH=0.5 -CopperTextThickness=0.125 +CopperTextSizeV=1.5 +CopperTextSizeH=1.5 +CopperTextThickness=0.3 CopperTextItalic=0 CopperTextUpright=1 -EdgeCutLineWidth=0.09999999999999999 +EdgeCutLineWidth=0.05 CourtyardLineWidth=0.05 OthersLineWidth=0.15 OthersTextSizeV=1 @@ -54,7 +54,7 @@ OthersTextSizeH=1 OthersTextSizeThickness=0.15 OthersTextItalic=0 OthersTextUpright=1 -SolderMaskClearance=0.05 +SolderMaskClearance=0 SolderMaskMinWidth=0 SolderPasteClearance=0 SolderPasteRatio=-0 @@ -227,28 +227,6 @@ Enabled=0 [pcbnew/Netclasses] [pcbnew/Netclasses/Default] Name=Default -Clearance=0.2 -TrackWidth=0.25 -ViaDiameter=0.6 -ViaDrill=0.3 -uViaDiameter=0.3 -uViaDrill=0.1 -dPairWidth=0.2 -dPairGap=0.25 -dPairViaGap=0.25 -[pcbnew/Netclasses/1] -Name=AUDIO -Clearance=0.2 -TrackWidth=0.2 -ViaDiameter=0.6 -ViaDrill=0.3 -uViaDiameter=0.3 -uViaDrill=0.1 -dPairWidth=0.2 -dPairGap=0.25 -dPairViaGap=0.25 -[pcbnew/Netclasses/2] -Name=BT81X Clearance=0.1524 TrackWidth=0.1524 ViaDiameter=0.508 @@ -258,69 +236,3 @@ uViaDrill=0.1 dPairWidth=0.2 dPairGap=0.25 dPairViaGap=0.25 -[pcbnew/Netclasses/3] -Name=CTP -Clearance=0.2 -TrackWidth=0.2 -ViaDiameter=0.6 -ViaDrill=0.3 -uViaDiameter=0.3 -uViaDrill=0.1 -dPairWidth=0.2 -dPairGap=0.25 -dPairViaGap=0.25 -[pcbnew/Netclasses/4] -Name=DISPLAY -Clearance=0.1524 -TrackWidth=0.1524 -ViaDiameter=0.508 -ViaDrill=0.254 -uViaDiameter=0.3 -uViaDrill=0.1 -dPairWidth=0.175 -dPairGap=0.1524 -dPairViaGap=0.25 -[pcbnew/Netclasses/5] -Name=FE310 -Clearance=0.1524 -TrackWidth=0.1524 -ViaDiameter=0.508 -ViaDrill=0.254 -uViaDiameter=0.3 -uViaDrill=0.1 -dPairWidth=0.2 -dPairGap=0.25 -dPairViaGap=0.25 -[pcbnew/Netclasses/6] -Name=FE310_L -Clearance=0.2 -TrackWidth=0.2 -ViaDiameter=0.6 -ViaDrill=0.3 -uViaDiameter=0.3 -uViaDrill=0.1 -dPairWidth=0.2 -dPairGap=0.25 -dPairViaGap=0.25 -[pcbnew/Netclasses/7] -Name=USB -Clearance=0.2 -TrackWidth=0.2 -ViaDiameter=0.6 -ViaDrill=0.3 -uViaDiameter=0.3 -uViaDrill=0.1 -dPairWidth=0.2 -dPairGap=0.25 -dPairViaGap=0.25 -[pcbnew/Netclasses/8] -Name=USB2DIFF -Clearance=0.1524 -TrackWidth=0.2288 -ViaDiameter=0.508 -ViaDrill=0.254 -uViaDiameter=0.3 -uViaDrill=0.1 -dPairWidth=0.2288 -dPairGap=0.1524 -dPairViaGap=0.25 |