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authorUros Majstorovic <majstor@majstor.org>2021-08-27 02:50:19 +0200
committerUros Majstorovic <majstor@majstor.org>2021-08-27 02:50:19 +0200
commit01270b114be7a82a4dbeae7a3d40c83495224842 (patch)
treea1a37b6fbc3a7e09c47695a0ef980500ad258320 /recipes-kernel/linux/rvphone/cl-imx8/dts/cl-imx8-lvds.dtsi
parent52bbf971706df3752d5a41879495740041a4a735 (diff)
parent5c6a2266ffa6780935959af6c96ffc8dd8e2dc1a (diff)
Merge remote-tracking branch 'meta-bsp-rvphone/master'
Diffstat (limited to 'recipes-kernel/linux/rvphone/cl-imx8/dts/cl-imx8-lvds.dtsi')
-rw-r--r--recipes-kernel/linux/rvphone/cl-imx8/dts/cl-imx8-lvds.dtsi87
1 files changed, 87 insertions, 0 deletions
diff --git a/recipes-kernel/linux/rvphone/cl-imx8/dts/cl-imx8-lvds.dtsi b/recipes-kernel/linux/rvphone/cl-imx8/dts/cl-imx8-lvds.dtsi
new file mode 100644
index 0000000..e74ca95
--- /dev/null
+++ b/recipes-kernel/linux/rvphone/cl-imx8/dts/cl-imx8-lvds.dtsi
@@ -0,0 +1,87 @@
+&iomuxc {
+ rvphone-cl-imx8-lvds {
+ pinctrl_dsi_lvds: dsilvdsgrp {
+ fsl,pins = <
+ MX8MQ_IOMUXC_GPIO1_IO06_GPIO1_IO6 0x16
+ >;
+ };
+ };
+};
+
+&i2c2 {
+ ti_bridge: sn65dsi83@2c {
+ compatible = "ti,sn65dsi83";
+ reg = <0x2c>;
+ ti,dsi-lanes = <1>;
+ ti,lvds-format = <1>;
+ ti,lvds-bpp = <24>;
+ ti,width-mm = <149>;
+ ti,height-mm = <93>;
+ enable-gpios = <&gpio1 6 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_dsi_lvds>;
+ status = "okay";
+
+ display-timings {
+ lvds {
+ clock-frequency = <30000000>;
+ hactive = <800>;
+ vactive = <480>;
+ hback-porch = <46>;
+ hfront-porch = <210>;
+ vback-porch = <23>;
+ vfront-porch = <22>;
+ hsync-len = <20>;
+ vsync-len = <10>;
+ hsync-active = <0>;
+ vsync-active = <0>;
+ de-active = <0>;
+ pixelclk-active = <0>;
+ };
+ };
+
+ port {
+ sn65dsi83_in: endpoint {
+ remote-endpoint = <&mipi_dsi_bridge_out>;
+ };
+ };
+ };
+};
+
+&mipi_dsi_bridge {
+ status = "okay";
+
+ port@1 {
+ mipi_dsi_bridge_out: endpoint {
+ remote-endpoint = <&sn65dsi83_in>;
+ };
+ };
+};
+
+&lcdif {
+ status = "okay";
+ max-res = <800>, <480>;
+
+ port@0 {
+ lcdif_mipi_dsi: mipi-dsi-endpoint {
+ remote-endpoint = <&mipi_dsi_in>;
+ };
+ };
+};
+
+&mipi_dsi_phy {
+ status = "okay";
+};
+
+&mipi_dsi {
+ status = "okay";
+ as_bridge;
+ sync-pol = <1>;
+ pwr-delay = <10>;
+
+ port@1 {
+ mipi_dsi_in: endpoint {
+ remote-endpoint = <&lcdif_mipi_dsi>;
+ };
+ };
+};