added escp1 to dts

3 files changed, 100 insertions, 69 deletions

diff --git a/recipes-kernel/linux/rvphone/cl-imx8/dts/cl-imx8-base.dtsi b/recipes-kernel/linux/rvphone/cl-imx8/dts/cl-imx8-base.dtsi
index 96e9a3e..6b413cc 100644
--- a/recipes-kernel/linux/rvphone/cl-imx8/dts/cl-imx8-base.dtsi
+++ b/recipes-kernel/linux/rvphone/cl-imx8/dts/cl-imx8-base.dtsi
@@ -1,3 +1,5 @@
+#include "../freescale/fsl-imx8mq.dtsi"
+
 / {
 	chosen {
 		bootargs = "console=ttymxc2,115200 earlycon=ec_imx6q,0x30880000,115200";
@@ -41,18 +43,6 @@
 			off-on-delay = <20000>;
 			enable-active-high;
 		};
-
-		reg_usb_mux: regulator-usb-mux {
-			compatible = "regulator-fixed";
-			pinctrl-names = "default";
-			pinctrl-0 = <&pinctrl_usbimux1>;
-			regulator-name = "usb_mux";
-			regulator-min-microvolt = <3300000>;
-			regulator-max-microvolt = <3300000>;
-			gpio = <&gpio1 4 GPIO_ACTIVE_HIGH>;
-			regulator-always-on;
-			enable-active-low;
-		};
 	};
 
 	pwmleds {
@@ -77,12 +67,6 @@
 			>;
 		};
 
-		pinctrl_usbimux1: usbmux1grp {
-			fsl,pins = <
-				MX8MQ_IOMUXC_GPIO1_IO04_GPIO1_IO4		0x16
-			>;
-		};
-
 		pinctrl_usdhc1_reg: usdhc1reggrp {
 			fsl,pins = <
 				MX8MQ_IOMUXC_SD1_RESET_B_GPIO2_IO10		0x1c
@@ -95,36 +79,6 @@
 			>;
 		};
 
-		pinctrl_i2c2: i2c2grp {
-			fsl,pins = <
-				MX8MQ_IOMUXC_I2C2_SCL_I2C2_SCL			0x4000007f
-				MX8MQ_IOMUXC_I2C2_SDA_I2C2_SDA			0x4000007f
-			>;
-		};
-
-		pinctrl_i2c3: i2c3grp {
-			fsl,pins = <
-				MX8MQ_IOMUXC_I2C3_SCL_I2C3_SCL			0x4000007f
-				MX8MQ_IOMUXC_I2C3_SDA_I2C3_SDA			0x4000007f
-			>;
-		};
-
-		pinctrl_pwm2: pwm2grp {
-			fsl,pins = <
-				MX8MQ_IOMUXC_I2C4_SCL_PWM2_OUT 			0x16
-			>;
-		};
-
-		pinctrl_uart3: uart3grp {
-			fsl,pins = <
-				MX8MQ_IOMUXC_UART3_TXD_UART3_DCE_TX		0x79
-				MX8MQ_IOMUXC_UART3_RXD_UART3_DCE_RX		0x79
-				MX8MQ_IOMUXC_ECSPI1_MISO_UART3_DCE_CTS_B	0x79
-				MX8MQ_IOMUXC_ECSPI1_SS0_UART3_DCE_RTS_B		0x79
-				MX8MQ_IOMUXC_NAND_CLE_GPIO3_IO5			0x19
-			>;
-		};
-
 		pinctrl_usdhc1: usdhc1grp {
 			fsl,pins = <
 				MX8MQ_IOMUXC_SD1_CLK_USDHC1_CLK			0x83
@@ -213,6 +167,45 @@
 			>;
 		};
 
+		pinctrl_i2c2: i2c2grp {
+			fsl,pins = <
+				MX8MQ_IOMUXC_I2C2_SCL_I2C2_SCL			0x4000007f
+				MX8MQ_IOMUXC_I2C2_SDA_I2C2_SDA			0x4000007f
+			>;
+		};
+
+		pinctrl_i2c3: i2c3grp {
+			fsl,pins = <
+				MX8MQ_IOMUXC_I2C3_SCL_I2C3_SCL			0x4000007f
+				MX8MQ_IOMUXC_I2C3_SDA_I2C3_SDA			0x4000007f
+			>;
+		};
+
+		pinctrl_uart3: uart3grp {
+			fsl,pins = <
+				MX8MQ_IOMUXC_UART3_TXD_UART3_DCE_TX		0x79
+				MX8MQ_IOMUXC_UART3_RXD_UART3_DCE_RX		0x79
+				MX8MQ_IOMUXC_ECSPI1_MISO_UART3_DCE_CTS_B	0x79
+				MX8MQ_IOMUXC_ECSPI1_SS0_UART3_DCE_RTS_B		0x79
+				MX8MQ_IOMUXC_NAND_CLE_GPIO3_IO5			0x19
+			>;
+		};
+
+		pinctrl_ecspi1: ecspi1grp {
+			fsl,pins = <
+				MX8MQ_IOMUXC_ECSPI1_SCLK_ECSPI1_SCLK		0x82 /* P1.13 */
+				MX8MQ_IOMUXC_ECSPI1_MOSI_ECSPI1_MOSI		0x82 /* P1.11 */
+				MX8MQ_IOMUXC_ECSPI1_MISO_ECSPI1_MISO		0x82 /* P1.15 */
+				MX8MQ_IOMUXC_ECSPI1_SS0_GPIO5_IO9		0x82 /* P1.17 */
+			>;
+		};
+
+		pinctrl_pwm2: pwm2grp {
+			fsl,pins = <
+				MX8MQ_IOMUXC_I2C4_SCL_PWM2_OUT 			0x16
+			>;
+		};
+
 		pinctrl_wdog: wdoggrp {
 			fsl,pins = <
 				MX8MQ_IOMUXC_GPIO1_IO02_WDOG1_WDOG_B		0xc6
@@ -322,12 +315,6 @@
 	status = "disabled";
 };
 
-&pwm2 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&pinctrl_pwm2>;
-	status = "okay";
-};
-
 &uart3 { /* console */
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_uart3>;
@@ -336,6 +323,23 @@
 	status = "okay";
 };
 
+&ecspi1 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_ecspi1>;
+	fsl,spi-num-chipselects = <1>;
+	cs-gpios = <&gpio5 9 GPIO_ACTIVE_LOW>;
+	status = "okay";
+	#address-cells = <1>;
+	#size-cells = <0>;
+
+	spidev: spidev@0 {
+		compatible = "spidev";
+		spi-max-frequency = <10000000>;
+		reg = <0>;
+		status = "okay";
+	};
+};
+
 &usdhc1 {
 	pinctrl-names = "default", "state_100mhz", "state_200mhz";
 	pinctrl-0 = <&pinctrl_usdhc1>;
@@ -360,6 +364,12 @@
 	status = "okay";
 };
 
+&pwm2 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_pwm2>;
+	status = "okay";
+};
+
 &usb3_phy0 {
 	status = "okay";
 };
@@ -373,19 +383,6 @@
 	dr_mode = "otg";
 };
 
-&usb3_phy1 {
-	status = "okay";
-};
-
-&usb3_1 {
-	status = "okay";
-};
-
-&usb_dwc3_1 {
-	status = "okay";
-	dr_mode = "host";
-};
-
 &gpu_pd {
 	power-supply = <&sw1a_reg>;
 };
diff --git a/recipes-kernel/linux/rvphone/cl-imx8/dts/cl-imx8-wifi.dtsi b/recipes-kernel/linux/rvphone/cl-imx8/dts/cl-imx8-wifi.dtsi
index 45acca5..943a219 100644
--- a/recipes-kernel/linux/rvphone/cl-imx8/dts/cl-imx8-wifi.dtsi
+++ b/recipes-kernel/linux/rvphone/cl-imx8/dts/cl-imx8-wifi.dtsi
@@ -1,5 +1,28 @@
+/ {
+	regulators {
+		reg_usb_mux: regulator-usb-mux {
+			compatible = "regulator-fixed";
+			pinctrl-names = "default";
+			pinctrl-0 = <&pinctrl_usbimux1>;
+			regulator-name = "usb_mux";
+			regulator-min-microvolt = <3300000>;
+			regulator-max-microvolt = <3300000>;
+			gpio = <&gpio1 4 GPIO_ACTIVE_HIGH>;
+			regulator-always-on;
+			enable-active-low;
+		};
+	};
+};
+
+
 &iomuxc {
 	rvphone-cl-imx8-wifi {
+		pinctrl_usbimux1: usbmux1grp {
+			fsl,pins = <
+				MX8MQ_IOMUXC_GPIO1_IO04_GPIO1_IO4		0x16
+			>;
+		};
+
 		pinctrl_pcie1: pcie1grp {
 			fsl,pins = <
 				MX8MQ_IOMUXC_SAI3_RXC_GPIO4_IO29 		0x16 /* WIFI reset-gpio   */
@@ -9,7 +32,6 @@
 				MX8MQ_IOMUXC_GPIO1_IO00_ANAMIX_REF_CLK_32K	0x16
 			>;
 		};
-
 	};
 };
 
@@ -22,3 +44,16 @@
 	hard-wired = <1>;
 	status = "okay";
 };
+
+&usb3_phy1 {
+	status = "okay";
+};
+
+&usb3_1 {
+	status = "okay";
+};
+
+&usb_dwc3_1 {
+	status = "okay";
+	dr_mode = "host";
+};
diff --git a/recipes-kernel/linux/rvphone/cl-imx8/dts/cl-imx8.dts b/recipes-kernel/linux/rvphone/cl-imx8/dts/cl-imx8.dts
index 8902e54..3cda84b 100644
--- a/recipes-kernel/linux/rvphone/cl-imx8/dts/cl-imx8.dts
+++ b/recipes-kernel/linux/rvphone/cl-imx8/dts/cl-imx8.dts
@@ -1,5 +1,4 @@
 /dts-v1/;
-#include "../freescale/fsl-imx8mq.dtsi"
 #include "cl-imx8-base.dtsi"
 #include "cl-imx8-wifi.dtsi"
 #include "cl-imx8-lvds.dtsi"
\ No newline at end of file